From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Mohamed Mediouni <mohamed@unpredictable.fr>,
Paolo Bonzini <pbonzini@redhat.com>,
Phil Dennis-Jordan <phil@philjordan.eu>,
Roman Bolshakov <rbolshakov@ddn.com>,
Pierrick Bouvier <pierrick.bouvier@linaro.org>,
Pedro Barbuda <pbarbuda@microsoft.com>,
Wei Liu <wei.liu@kernel.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>,
Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v2 06/38] whpx: i386: reintroduce enlightenments for Windows 10
Date: Mon, 20 Apr 2026 12:42:16 +0200 [thread overview]
Message-ID: <20260420104248.86702-7-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20260420104248.86702-1-mohamed@unpredictable.fr>
Was removed in 2c08624 but it's still useful for
Windows 10 so reintroduce it there.
And this time, actually make it work by reporting
the hypervisor bit in CPUID.
Pretend to be vmware to be able to use vmport's functionality.
If the vmware frequency leaf is disabled, pretend to be
KVM, with the only capability reported being X2APIC support.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
accel/whpx/whpx-common.c | 2 ++
include/system/whpx-internal.h | 1 +
target/arm/whpx/whpx-all.c | 1 +
target/i386/whpx/whpx-all.c | 63 +++++++++++++++++++++++++++++-----
4 files changed, 58 insertions(+), 9 deletions(-)
diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c
index b813a5d9d2..59be996aef 100644
--- a/accel/whpx/whpx-common.c
+++ b/accel/whpx/whpx-common.c
@@ -550,6 +550,8 @@ static void whpx_accel_instance_init(Object *obj)
whpx->hyperv_enlightenments_allowed = true;
whpx->hyperv_enlightenments_required = false;
+ /* Value determined at whpx_accel_init */
+ whpx->hyperv_enlightenments_enabled = false;
}
static const TypeInfo whpx_accel_type = {
diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h
index 5902124b63..cf782cf5f8 100644
--- a/include/system/whpx-internal.h
+++ b/include/system/whpx-internal.h
@@ -45,6 +45,7 @@ struct whpx_state {
bool hyperv_enlightenments_allowed;
bool hyperv_enlightenments_required;
+ bool hyperv_enlightenments_enabled;
};
diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c
index bbf0f6be96..4019a513aa 100644
--- a/target/arm/whpx/whpx-all.c
+++ b/target/arm/whpx/whpx-all.c
@@ -968,6 +968,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
* as they're not needed for performance.
*/
if (whpx->hyperv_enlightenments_required) {
+ whpx->hyperv_enlightenments_enabled = true;
hr = whp_dispatch.WHvSetPartitionProperty(
whpx->partition,
WHvPartitionPropertyCodeSyntheticProcessorFeaturesBanks,
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index 66f263558f..c2a78312f8 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -2083,14 +2083,57 @@ int whpx_vcpu_run(CPUState *cpu)
vcpu->exit_ctx.VpContext.Rip +
vcpu->exit_ctx.VpContext.InstructionLength;
- reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;
- reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;
- reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;
- reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;
-
- if (vcpu->exit_ctx.CpuidAccess.Rax == 1) {
- if (cpu_has_x2apic_feature(env)) {
- reg_values[2].Reg64 |= CPUID_EXT_X2APIC;
+ if (whpx_is_legacy_os()) {
+ reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;
+ reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;
+ reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;
+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;
+ } else {
+ cpu_x86_cpuid(env, vcpu->exit_ctx.CpuidAccess.Rax,
+ vcpu->exit_ctx.CpuidAccess.Rcx,
+ (UINT32 *)®_values[1].Reg32,
+ (UINT32 *)®_values[4].Reg32, (UINT32 *)®_values[2].Reg32,
+ (UINT32 *)®_values[3].Reg32);
+ }
+
+ if (!whpx->hyperv_enlightenments_enabled) {
+ switch (vcpu->exit_ctx.CpuidAccess.Rax) {
+ case 1:
+ reg_values[2].Reg64 |= CPUID_EXT_HYPERVISOR;
+ break;
+ case 0x40000000:
+ /*
+ * Use vmware_cpuid_freq as a proxy to report VMware.
+ * This is to get the TSC/APIC frequency query functionality
+ * provided through vmport, as Linux doesn't use leaf
+ * 0x40000010 for getting those frequencies.
+ */
+ if (x86_cpu->vmware_cpuid_freq) {
+ reg_values[1].Reg64 = 0x40000010;
+ reg_values[4].Reg64 = 0x61774d56;
+ reg_values[2].Reg64 = 0x4d566572;
+ reg_values[3].Reg64 = 0x65726177;
+ } else {
+ /* report KVM otherwise if that's disabled */
+ reg_values[1].Reg64 = 0x40000001;
+ reg_values[4].Reg64 = 0x4b4d564b;
+ reg_values[2].Reg64 = 0x564b4d56;
+ reg_values[3].Reg64 = 0x4d;
+ }
+ break;
+ case 0x40000001:
+ if (!x86_cpu->vmware_cpuid_freq) {
+ /* KVM reporting of X2APIC support */
+ reg_values[1].Reg64 = reg_values[4].Reg64 =
+ reg_values[2].Reg64 = 1 << 15;
+ }
+ break;
+ case 0x40000010:
+ if (x86_cpu->vmware_cpuid_freq) {
+ reg_values[1].Reg64 = env->tsc_khz;
+ reg_values[4].Reg64 = env->apic_bus_freq / 1000; /* Hz to KHz */
+ }
+ break;
}
}
@@ -2311,6 +2354,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
WHV_PROCESSOR_FEATURES_BANKS processor_features;
WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;
UINT32 cpuidExitList[] = {1};
+ UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010};
whpx = &whpx_global;
@@ -2513,6 +2557,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
}
if (is_modern_os && whpx->hyperv_enlightenments_allowed) {
+ whpx->hyperv_enlightenments_enabled = true;
hr = whp_dispatch.WHvSetPartitionProperty(
whpx->partition,
WHvPartitionPropertyCodeSyntheticProcessorFeaturesBanks,
@@ -2565,7 +2610,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
hr = whp_dispatch.WHvSetPartitionProperty(
whpx->partition,
WHvPartitionPropertyCodeCpuidExitList,
- cpuidExitList,
+ whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv,
RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));
if (FAILED(hr)) {
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2026-04-20 10:44 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-20 10:42 [PATCH v2 00/38] WHPX x86 updates for QEMU 11.1 Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 01/38] target/i386: emulate: include name of unhandled instruction Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 02/38] whpx: i386: x2apic emulation Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 03/38] whpx: i386: wire up feature probing Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 04/38] whpx: i386: disable TbFlushHypercalls for emulated LAPIC Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 05/38] whpx: i386: enable x2apic by default for user-mode LAPIC Mohamed Mediouni
2026-04-20 10:42 ` Mohamed Mediouni [this message]
2026-04-20 10:42 ` [PATCH v2 07/38] whpx: i386: introduce proper cpuid support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 08/38] whpx: i386: kernel-irqchip=off fixes Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 09/38] whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 10/38] whpx: i386: disable kernel-irqchip on Windows 10 when PIC enabled Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 11/38] whpx: i386: IO port fast path cleanup Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 12/38] whpx: i386: disable enlightenments and LAPIC for isapc Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 13/38] whpx: i386: interrupt priority support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 14/38] hw/intc: apic: disallow APIC reads when disabled Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 15/38] whpx: i386: fix CPUID[1:EDX].APIC reporting Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 16/38] whpx: i386: set apicbase value only on success Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 17/38] whpx: i386: unknown MSR configurability Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 18/38] whpx: i386: enable GuestIdleReg enlightenment Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 19/38] whpx: i386: tighten APIC base validity check Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 20/38] whpx: i386: ignore vpassist when kernel-irqchip=off Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 21/38] target: i386: HLT type that ignores EFLAGS.IF Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 22/38] whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 23/38] whpx: i386: one more CPUID Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 24/38] whpx: i386: some x2APIC awareness Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 25/38] whpx: i386: set WHvX64RegisterInitialApicId Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 26/38] whpx: i386: Pause VM on fatal exception to be able to inspect state Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 27/38] target/i386: emulate: use exception_payload for fault address Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 28/38] whpx: i386: CPU features support for Windows 10 Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 29/38] target/i386: make xsave_buf present unconditionally Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 30/38] target/i386: add de/compaction to xsave_helper Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 31/38] whpx: xsave support Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 32/38] whpx: i386: set APIC ID only when APIC present Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 33/38] whpx: i386: update migration blocker message Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 34/38] whpx: i386: don't increment eip on MSR access raising GPF Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 35/38] target/i386: emulate, hvf: rdmsr/wrmsr GPF handling Mohamed Mediouni
2026-04-20 11:27 ` Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 36/38] whpx: i386: add feature to intercept #GP MSR accesses Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 37/38] whpx: i386: intercept CPUID 0xD too Mohamed Mediouni
2026-04-20 10:42 ` [PATCH v2 38/38] whpx: i386: documentation update Mohamed Mediouni
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