* [PULL 01/48] hw/avr: Build as common unit files
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
@ 2026-04-22 19:56 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 02/48] hw/misc/cpc: Include missing 'hw/core/cpu.h' header Philippe Mathieu-Daudé
` (46 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:56 UTC (permalink / raw)
To: qemu-devel
Nothing there is target-specific anymore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-38-philmd@linaro.org>
---
hw/misc/meson.build | 2 +-
hw/timer/meson.build | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 092f70bde28..245ab9b98cc 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -152,7 +152,7 @@ system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
system_ss.add(when: 'CONFIG_I2C_ECHO', if_true: files('i2c-echo.c'))
-specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
+system_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
system_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index 178321c029c..201b5d8316d 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -33,4 +33,4 @@ system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
specific_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_timer.c'))
system_ss.add(when: 'CONFIG_SIFIVE_PWM', if_true: files('sifive_pwm.c'))
-specific_ss.add(when: 'CONFIG_AVR_TIMER16', if_true: files('avr_timer16.c'))
+system_ss.add(when: 'CONFIG_AVR_TIMER16', if_true: files('avr_timer16.c'))
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 02/48] hw/misc/cpc: Include missing 'hw/core/cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
2026-04-22 19:56 ` [PULL 01/48] hw/avr: Build as common unit files Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 03/48] hw/alpha: Include full path to target 'cpu.h' header Philippe Mathieu-Daudé
` (45 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
The "hw/core/cpu.h" header is indirectly included. Include it
explicitly otherwise we get when refactoring unrelated headers:
../hw/misc/mips_cpc.c:36:53: error: unknown type name 'run_on_cpu_data'
36 | static void mips_cpu_reset_async_work(CPUState *cs, run_on_cpu_data data)
| ^
../hw/misc/mips_cpc.c:40:5: error: call to undeclared function 'cpu_reset'
40 | cpu_reset(cs);
| ^
../hw/misc/riscv_cpc.c:34:54: error: unknown type name 'run_on_cpu_data'
34 | static void riscv_cpu_reset_async_work(CPUState *cs, run_on_cpu_data data)
| ^
../hw/misc/riscv_cpc.c:39:5: error: call to undeclared function 'cpu_reset'
39 | cpu_reset(cs);
| ^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-17-philmd@linaro.org>
---
hw/misc/mips_cpc.c | 1 +
hw/misc/riscv_cpc.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c
index 924de855ee2..d092f76f44d 100644
--- a/hw/misc/mips_cpc.c
+++ b/hw/misc/mips_cpc.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "hw/core/cpu.h"
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"
diff --git a/hw/misc/riscv_cpc.c b/hw/misc/riscv_cpc.c
index 4bf2fd8db16..e04ccdf54fa 100644
--- a/hw/misc/riscv_cpc.c
+++ b/hw/misc/riscv_cpc.c
@@ -18,6 +18,7 @@
#include "qemu/module.h"
#include "qemu/timer.h"
#include "qemu/bitops.h"
+#include "hw/core/cpu.h"
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 03/48] hw/alpha: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
2026-04-22 19:56 ` [PULL 01/48] hw/avr: Build as common unit files Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 02/48] hw/misc/cpc: Include missing 'hw/core/cpu.h' header Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 04/48] hw/arm: " Philippe Mathieu-Daudé
` (44 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-21-philmd@linaro.org>
---
hw/alpha/dp264.c | 2 +-
hw/alpha/typhoon.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 2ab3c147471..f928e0cee82 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/alpha/cpu.h"
#include "exec/target_page.h"
#include "elf.h"
#include "hw/core/loader.h"
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 7722d4fd009..e32fed86f9f 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -12,7 +12,7 @@
#include "exec/cpu-interrupt.h"
#include "qapi/error.h"
#include "hw/pci/pci_host.h"
-#include "cpu.h"
+#include "target/alpha/cpu.h"
#include "hw/core/irq.h"
#include "alpha_sys.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 04/48] hw/arm: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2026-04-22 19:57 ` [PULL 03/48] hw/alpha: Include full path to target 'cpu.h' header Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 05/48] hw/avr: " Philippe Mathieu-Daudé
` (43 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-22-philmd@linaro.org>
---
include/hw/arm/digic.h | 2 +-
include/hw/arm/fsl-imx6.h | 2 +-
include/hw/arm/fsl-imx6ul.h | 2 +-
include/hw/arm/fsl-imx7.h | 2 +-
include/hw/arm/fsl-imx8mp.h | 2 +-
hw/arm/boot.c | 2 +-
hw/arm/exynos4210.c | 2 +-
hw/arm/mps3r.c | 2 +-
hw/arm/omap1.c | 2 +-
hw/arm/realview.c | 2 +-
hw/arm/smmuv3.c | 2 +-
hw/intc/arm_gicv3_cpuif.c | 2 +-
hw/intc/arm_gicv3_cpuif_common.c | 2 +-
13 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h
index 8f2735c284f..646802806e0 100644
--- a/include/hw/arm/digic.h
+++ b/include/hw/arm/digic.h
@@ -18,7 +18,7 @@
#ifndef HW_ARM_DIGIC_H
#define HW_ARM_DIGIC_H
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "hw/timer/digic-timer.h"
#include "hw/char/digic-uart.h"
#include "qom/object.h"
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index bb866994dff..cddd100dd6e 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -35,7 +35,7 @@
#include "hw/pci-host/designware.h"
#include "hw/core/or-irq.h"
#include "system/memory.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "qom/object.h"
#define TYPE_FSL_IMX6 "fsl-imx6"
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index 4e3209b25b2..f8f9c249a23 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -34,7 +34,7 @@
#include "hw/usb/chipidea.h"
#include "hw/usb/imx-usb-phy.h"
#include "system/memory.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "qom/object.h"
#include "qemu/units.h"
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index 710831c8bf5..a573e0dd4f8 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -37,7 +37,7 @@
#include "hw/pci-host/designware.h"
#include "hw/usb/chipidea.h"
#include "hw/core/or-irq.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "qom/object.h"
#include "qemu/units.h"
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index 4b367b754c6..3b6183ed1d6 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -9,7 +9,7 @@
#ifndef FSL_IMX8MP_H
#define FSL_IMX8MP_H
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "hw/char/imx_serial.h"
#include "hw/gpio/imx_gpio.h"
#include "hw/i2c/imx_i2c.h"
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index c97d4c4e118..780b6be6371 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -14,7 +14,7 @@
#include <libfdt.h>
#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "exec/tswap.h"
#include "exec/target_page.h"
#include "system/kvm.h"
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 25c385ba1f5..5efe95030c0 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "exec/tswap.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "hw/cpu/a9mpcore.h"
#include "hw/core/irq.h"
#include "system/blockdev.h"
diff --git a/hw/arm/mps3r.c b/hw/arm/mps3r.c
index 2d64a198c42..caad820d3bc 100644
--- a/hw/arm/mps3r.c
+++ b/hw/arm/mps3r.c
@@ -29,7 +29,7 @@
#include "qapi/error.h"
#include "qobject/qlist.h"
#include "system/address-spaces.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "system/system.h"
#include "hw/core/boards.h"
#include "hw/core/or-irq.h"
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index 47d0f0d7362..980959166d3 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -22,7 +22,7 @@
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "system/address-spaces.h"
#include "exec/cpu-common.h"
#include "hw/core/hw-error.h"
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index c9558be4d45..7e8acd34acd 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 7fead1c3cff..5570a13c8a6 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -26,7 +26,7 @@
#include "hw/core/qdev-properties.h"
#include "hw/core/qdev.h"
#include "hw/pci/pci.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "exec/target_page.h"
#include "trace.h"
#include "qemu/log.h"
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
index eaf1e512ede..fcb3922fa0f 100644
--- a/hw/intc/arm_gicv3_cpuif.c
+++ b/hw/intc/arm_gicv3_cpuif.c
@@ -19,7 +19,7 @@
#include "trace.h"
#include "gicv3_internal.h"
#include "hw/core/irq.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
#include "target/arm/cpregs.h"
#include "target/arm/cpu-features.h"
#include "target/arm/internals.h"
diff --git a/hw/intc/arm_gicv3_cpuif_common.c b/hw/intc/arm_gicv3_cpuif_common.c
index ff1239f65db..e03085592e4 100644
--- a/hw/intc/arm_gicv3_cpuif_common.c
+++ b/hw/intc/arm_gicv3_cpuif_common.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "gicv3_internal.h"
-#include "cpu.h"
+#include "target/arm/cpu.h"
void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s)
{
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 05/48] hw/avr: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2026-04-22 19:57 ` [PULL 04/48] hw/arm: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 06/48] hw/hppa: " Philippe Mathieu-Daudé
` (42 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-23-philmd@linaro.org>
---
hw/avr/boot.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/avr/boot.h b/hw/avr/boot.h
index 9eed2055591..c5efa54d98c 100644
--- a/hw/avr/boot.h
+++ b/hw/avr/boot.h
@@ -12,7 +12,7 @@
#define HW_AVR_BOOT_H
#include "hw/core/boards.h"
-#include "cpu.h"
+#include "target/avr/cpu.h"
/**
* avr_load_firmware: load an image into a memory region
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 06/48] hw/hppa: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2026-04-22 19:57 ` [PULL 05/48] hw/avr: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 07/48] hw/i386: " Philippe Mathieu-Daudé
` (41 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-24-philmd@linaro.org>
---
hw/hppa/machine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 3b03ad44d22..0937d90ed22 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -7,7 +7,7 @@
#include "qemu/osdep.h"
#include "qemu/datadir.h"
-#include "cpu.h"
+#include "target/hppa/cpu.h"
#include "elf.h"
#include "hw/core/loader.h"
#include "qemu/error-report.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 07/48] hw/i386: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2026-04-22 19:57 ` [PULL 06/48] hw/hppa: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 08/48] hw/m68k: " Philippe Mathieu-Daudé
` (40 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-25-philmd@linaro.org>
---
include/hw/i386/apic_internal.h | 2 +-
hw/i386/multiboot.c | 2 +-
hw/i386/pc_sysfw_ovmf.c | 2 +-
hw/i386/vmmouse.c | 2 +-
hw/isa/lpc_ich9.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 0cb06bbc76c..a26d53bb9d9 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -21,7 +21,7 @@
#ifndef QEMU_APIC_INTERNAL_H
#define QEMU_APIC_INTERNAL_H
-#include "cpu.h"
+#include "target/i386/cpu.h"
#include "hw/i386/apic.h"
#include "system/memory.h"
#include "qemu/timer.h"
diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c
index 0e960a15dda..d544b62afbd 100644
--- a/hw/i386/multiboot.c
+++ b/hw/i386/multiboot.c
@@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/option.h"
-#include "cpu.h"
+#include "target/i386/cpu.h"
#include "hw/nvram/fw_cfg.h"
#include "multiboot.h"
#include "hw/core/loader.h"
diff --git a/hw/i386/pc_sysfw_ovmf.c b/hw/i386/pc_sysfw_ovmf.c
index 2f7d15c9f3e..822c611710e 100644
--- a/hw/i386/pc_sysfw_ovmf.c
+++ b/hw/i386/pc_sysfw_ovmf.c
@@ -27,7 +27,7 @@
#include "qemu/error-report.h"
#include "hw/i386/pc.h"
#include "exec/target_page.h"
-#include "cpu.h"
+#include "target/i386/cpu.h"
#include "target/i386/sev.h"
#include "kvm/tdx.h"
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index c1aeeca0c9a..20ebb0dbbf6 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -29,7 +29,7 @@
#include "hw/input/i8042.h"
#include "hw/core/qdev-properties.h"
#include "migration/vmstate.h"
-#include "cpu.h"
+#include "target/i386/cpu.h"
#include "qom/object.h"
#include "trace.h"
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 51dc680029d..9cec18a378c 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -30,7 +30,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
-#include "cpu.h"
+#include "target/i386/cpu.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "qemu/range.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 08/48] hw/m68k: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2026-04-22 19:57 ` [PULL 07/48] hw/i386: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 09/48] hw/microblaze: " Philippe Mathieu-Daudé
` (39 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-26-philmd@linaro.org>
---
hw/intc/m68k_irqc.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/mcf5206.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/m68k/mcf_intc.c | 2 +-
hw/m68k/q800-glue.c | 2 +-
hw/m68k/q800.c | 2 +-
hw/m68k/virt.c | 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c
index c652bf143f0..68ddb5351be 100644
--- a/hw/intc/m68k_irqc.c
+++ b/hw/intc/m68k_irqc.c
@@ -8,7 +8,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "migration/vmstate.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/nmi.h"
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index f92a5d6a339..1acd2fbdfb3 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -8,7 +8,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/m68k/mcf.h"
#include "hw/core/boards.h"
#include "hw/core/loader.h"
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index c5befa02eb5..9f373b99b12 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/boards.h"
#include "hw/core/irq.h"
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 0e07aa45e9d..a8068c91f24 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -20,7 +20,7 @@
#include "qemu/log.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/core/irq.h"
#include "hw/m68k/mcf.h"
#include "hw/m68k/mcf_fec.h"
diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c
index 1014fe6fa57..e8d3bd937de 100644
--- a/hw/m68k/mcf_intc.c
+++ b/hw/m68k/mcf_intc.c
@@ -10,7 +10,7 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "qemu/log.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/core/irq.h"
#include "hw/core/sysbus.h"
#include "hw/m68k/mcf.h"
diff --git a/hw/m68k/q800-glue.c b/hw/m68k/q800-glue.c
index 24fccab9666..ac9062c6488 100644
--- a/hw/m68k/q800-glue.c
+++ b/hw/m68k/q800-glue.c
@@ -21,7 +21,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/m68k/q800-glue.h"
#include "hw/core/boards.h"
#include "hw/core/irq.h"
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index c0d78eb7d71..ab64250c47c 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -26,7 +26,7 @@
#include "qemu/guest-random.h"
#include "exec/target_page.h"
#include "system/system.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/core/boards.h"
#include "hw/core/or-irq.h"
#include "elf.h"
diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c
index ffe6e234155..cf8ebd65e30 100644
--- a/hw/m68k/virt.c
+++ b/hw/m68k/virt.c
@@ -12,7 +12,7 @@
#include "qemu/guest-random.h"
#include "exec/target_page.h"
#include "system/system.h"
-#include "cpu.h"
+#include "target/m68k/cpu.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "elf.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 09/48] hw/microblaze: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2026-04-22 19:57 ` [PULL 08/48] hw/m68k: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 10/48] hw/mips: " Philippe Mathieu-Daudé
` (38 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-27-philmd@linaro.org>
---
hw/microblaze/boot.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index 4ad5ffd34bd..a93b68e1e48 100644
--- a/hw/microblaze/boot.c
+++ b/hw/microblaze/boot.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "qemu/datadir.h"
-#include "cpu.h"
+#include "target/microblaze/cpu.h"
#include "qemu/option.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index b3bdc4d65f2..8f9f54ff1e2 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/microblaze/cpu.h"
#include "hw/core/sysbus.h"
#include "net/net.h"
#include "hw/block/flash.h"
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 0c9a6bf2529..c5f64319009 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -27,7 +27,7 @@
#include "qemu/target-info.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/microblaze/cpu.h"
#include "hw/core/sysbus.h"
#include "net/net.h"
#include "hw/block/flash.h"
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index f4c55589b7f..00154236bf8 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -19,7 +19,7 @@
#include "qapi/error.h"
#include "system/address-spaces.h"
#include "hw/core/boards.h"
-#include "cpu.h"
+#include "target/microblaze/cpu.h"
#include "boot.h"
#include "hw/intc/xlnx-zynqmp-ipi.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 10/48] hw/mips: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2026-04-22 19:57 ` [PULL 09/48] hw/microblaze: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 11/48] hw/or1k: " Philippe Mathieu-Daudé
` (37 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-28-philmd@linaro.org>
---
include/hw/intc/mips_gic.h | 2 +-
hw/mips/bootloader.c | 2 +-
hw/mips/fuloong2e.c | 2 +-
hw/mips/jazz.c | 2 +-
hw/mips/malta.c | 2 +-
hw/misc/mips_cpc.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h
index e2e6f0a168c..b3b64fec855 100644
--- a/include/hw/intc/mips_gic.h
+++ b/include/hw/intc/mips_gic.h
@@ -14,7 +14,7 @@
#include "qemu/units.h"
#include "hw/timer/mips_gictimer.h"
#include "hw/core/sysbus.h"
-#include "cpu.h"
+#include "target/mips/cpu.h"
#include "qom/object.h"
/*
* GIC Specific definitions
diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c
index 1dd6ef20968..aa4abcf4c36 100644
--- a/hw/mips/bootloader.c
+++ b/hw/mips/bootloader.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qemu/bitops.h"
-#include "cpu.h"
+#include "target/mips/cpu.h"
#include "hw/mips/bootloader.h"
typedef enum bl_reg {
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 72ad4507dfa..9a712ee9309 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -22,7 +22,7 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/mips/cpu.h"
#include "hw/core/clock.h"
#include "net/net.h"
#include "hw/core/boards.h"
diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c
index e0adb96c548..bec534d38b0 100644
--- a/hw/mips/jazz.c
+++ b/hw/mips/jazz.c
@@ -52,7 +52,7 @@
#ifdef CONFIG_TCG
#include "accel/tcg/cpu-ops.h"
#endif /* CONFIG_TCG */
-#include "cpu.h"
+#include "target/mips/cpu.h"
enum jazz_model_e {
JAZZ_MAGNUM,
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 812ff64d831..0cbe9956e74 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -61,7 +61,7 @@
#include "hw/core/qdev-clock.h"
#include "target/mips/internal.h"
#include "trace.h"
-#include "cpu.h"
+#include "target/mips/cpu.h"
#define ENVP_PADDR 0x2000
#define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c
index d092f76f44d..9d9c8bf6ec8 100644
--- a/hw/misc/mips_cpc.c
+++ b/hw/misc/mips_cpc.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/mips/cpu.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "hw/core/cpu.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 11/48] hw/or1k: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2026-04-22 19:57 ` [PULL 10/48] hw/mips: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 12/48] hw/ppc: " Philippe Mathieu-Daudé
` (36 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-29-philmd@linaro.org>
---
hw/or1k/boot.c | 2 +-
hw/or1k/cputimer.c | 2 +-
hw/or1k/or1k-sim.c | 2 +-
hw/or1k/virt.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/or1k/boot.c b/hw/or1k/boot.c
index c18f4a6a9fc..714634b5f3f 100644
--- a/hw/or1k/boot.c
+++ b/hw/or1k/boot.c
@@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/or1k/cpu.h"
#include "exec/cpu-defs.h"
#include "exec/target_page.h"
#include "elf.h"
diff --git a/hw/or1k/cputimer.c b/hw/or1k/cputimer.c
index 51da226fcde..b35411aa1e1 100644
--- a/hw/or1k/cputimer.c
+++ b/hw/or1k/cputimer.c
@@ -19,7 +19,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/or1k/cpu.h"
#include "migration/vmstate.h"
#include "qemu/timer.h"
#include "system/reset.h"
diff --git a/hw/or1k/or1k-sim.c b/hw/or1k/or1k-sim.c
index f1b1f63274b..b55105cd148 100644
--- a/hw/or1k/or1k-sim.c
+++ b/hw/or1k/or1k-sim.c
@@ -21,7 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/or1k/cpu.h"
#include "hw/core/irq.h"
#include "hw/core/boards.h"
#include "hw/char/serial-mm.h"
diff --git a/hw/or1k/virt.c b/hw/or1k/virt.c
index 39f54058ab3..2ff5c084a2b 100644
--- a/hw/or1k/virt.c
+++ b/hw/or1k/virt.c
@@ -10,7 +10,7 @@
#include "qemu/error-report.h"
#include "qemu/guest-random.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/or1k/cpu.h"
#include "system/address-spaces.h"
#include "hw/core/irq.h"
#include "hw/core/boards.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 12/48] hw/ppc: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2026-04-22 19:57 ` [PULL 11/48] hw/or1k: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 13/48] hw/riscv: " Philippe Mathieu-Daudé
` (35 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-30-philmd@linaro.org>
---
include/hw/ppc/pnv.h | 2 +-
include/hw/ppc/spapr_fadump.h | 2 +-
hw/ppc/mpc8544_guts.c | 2 +-
hw/ppc/mpc8544ds.c | 2 +-
hw/ppc/ppc440_uc.c | 2 +-
hw/ppc/ppc4xx_devs.c | 2 +-
hw/ppc/ppc_booke.c | 2 +-
hw/ppc/prep_systemio.c | 2 +-
hw/ppc/spapr_vhyp_mmu.c | 2 +-
hw/ppc/virtex_ml507.c | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 90028f974da..ce3ce73b530 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -20,7 +20,7 @@
#ifndef PPC_PNV_H
#define PPC_PNV_H
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "hw/core/boards.h"
#include "hw/core/sysbus.h"
#include "hw/ipmi/ipmi.h"
diff --git a/include/hw/ppc/spapr_fadump.h b/include/hw/ppc/spapr_fadump.h
index 82681fb9a6a..778981bc95e 100644
--- a/include/hw/ppc/spapr_fadump.h
+++ b/include/hw/ppc/spapr_fadump.h
@@ -6,7 +6,7 @@
#ifndef PPC_SPAPR_FADUMP_H
#define PPC_SPAPR_FADUMP_H
-#include "cpu.h"
+#include "target/ppc/cpu.h"
/* Fadump commands */
#define FADUMP_CMD_REGISTER 1
diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index 88ae573d1e8..3f2bbc0a511 100644
--- a/hw/ppc/mpc8544_guts.c
+++ b/hw/ppc/mpc8544_guts.c
@@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "system/runstate.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "hw/core/sysbus.h"
#include "qom/object.h"
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 582698559d2..6a5d3edc490 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -15,7 +15,7 @@
#include "hw/ppc/openpic.h"
#include "qemu/error-report.h"
#include "qemu/units.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
static void mpc8544ds_fixup_devtree(void *fdt)
{
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 0f28a7937fb..634046506e8 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -19,7 +19,7 @@
#include "hw/pci/pci.h"
#include "exec/cpu-common.h"
#include "system/reset.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "ppc440.h"
/*****************************************************************************/
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 1e6b6fec5da..ae1ac4f4672 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/core/qdev-properties.h"
#include "qapi/error.h"
diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c
index 7c6e5df9fde..052c8c931ae 100644
--- a/hw/ppc/ppc_booke.c
+++ b/hw/ppc/ppc_booke.c
@@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "exec/target_page.h"
#include "hw/ppc/ppc.h"
#include "qemu/timer.h"
diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c
index bc8b0964e75..5cd18a9e123 100644
--- a/hw/ppc/prep_systemio.c
+++ b/hw/ppc/prep_systemio.c
@@ -33,7 +33,7 @@
#include "qemu/error-report.h" /* for error_report() */
#include "qemu/module.h"
#include "system/runstate.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "trace.h"
#define TYPE_PREP_SYSTEMIO "prep-systemio"
diff --git a/hw/ppc/spapr_vhyp_mmu.c b/hw/ppc/spapr_vhyp_mmu.c
index 2d41d7f77b7..9cc3aeb2a29 100644
--- a/hw/ppc/spapr_vhyp_mmu.c
+++ b/hw/ppc/spapr_vhyp_mmu.c
@@ -11,7 +11,7 @@
#include "qemu/cutils.h"
#include "qemu/memalign.h"
#include "qemu/error-report.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "helper_regs.h"
#include "hw/ppc/spapr.h"
#include "mmu-hash64.h"
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index 51b3d7d7121..d10d9135890 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -26,7 +26,7 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "exec/page-protection.h"
-#include "cpu.h"
+#include "target/ppc/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/char/serial-mm.h"
#include "hw/block/flash.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 13/48] hw/riscv: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2026-04-22 19:57 ` [PULL 12/48] hw/ppc: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 14/48] hw/s390x: " Philippe Mathieu-Daudé
` (34 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-31-philmd@linaro.org>
---
hw/misc/riscv_cmgcr.c | 2 +-
hw/misc/riscv_cpc.c | 2 +-
hw/riscv/microblaze-v-generic.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/misc/riscv_cmgcr.c b/hw/misc/riscv_cmgcr.c
index b0294e76635..ab9b6c7d878 100644
--- a/hw/misc/riscv_cmgcr.c
+++ b/hw/misc/riscv_cmgcr.c
@@ -20,7 +20,7 @@
#include "hw/misc/riscv_cmgcr.h"
#include "hw/core/qdev-properties.h"
-#include "cpu.h"
+#include "target/riscv/cpu.h"
#define CM_RESET_VEC 0x1FC00000
#define GCR_ADDRSPACE_SZ 0x8000
diff --git a/hw/misc/riscv_cpc.c b/hw/misc/riscv_cpc.c
index e04ccdf54fa..37fdd0b39ba 100644
--- a/hw/misc/riscv_cpc.c
+++ b/hw/misc/riscv_cpc.c
@@ -13,7 +13,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/riscv/cpu.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "qemu/timer.h"
diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c
index d56b64792d7..b0494b1ac50 100644
--- a/hw/riscv/microblaze-v-generic.c
+++ b/hw/riscv/microblaze-v-generic.c
@@ -16,7 +16,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/riscv/cpu.h"
#include "hw/core/sysbus.h"
#include "system/system.h"
#include "net/net.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 14/48] hw/s390x: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2026-04-22 19:57 ` [PULL 13/48] hw/riscv: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 15/48] hw/sh4: " Philippe Mathieu-Daudé
` (33 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-32-philmd@linaro.org>
---
hw/s390x/ipl.h | 2 +-
hw/s390x/s390-hypercall.h | 2 +-
hw/s390x/ap-bridge.c | 2 +-
hw/s390x/s390-hypercall.c | 2 +-
hw/s390x/s390-stattrib.c | 2 +-
hw/s390x/tod-tcg.c | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 403cd08450d..fac30763df2 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -13,7 +13,7 @@
#ifndef HW_S390_IPL_H
#define HW_S390_IPL_H
-#include "cpu.h"
+#include "target/s390x/cpu.h"
#include "exec/target_page.h"
#include "system/address-spaces.h"
#include "system/memory.h"
diff --git a/hw/s390x/s390-hypercall.h b/hw/s390x/s390-hypercall.h
index 4f07209128c..c5a2b17e858 100644
--- a/hw/s390x/s390-hypercall.h
+++ b/hw/s390x/s390-hypercall.h
@@ -12,7 +12,7 @@
#ifndef HW_S390_HYPERCALL_H
#define HW_S390_HYPERCALL_H
-#include "cpu.h"
+#include "target/s390x/cpu.h"
#define DIAG500_VIRTIO_NOTIFY 0 /* legacy, implemented as a NOP */
#define DIAG500_VIRTIO_RESET 1 /* legacy */
diff --git a/hw/s390x/ap-bridge.c b/hw/s390x/ap-bridge.c
index 5cdbf098074..c7e49d966ba 100644
--- a/hw/s390x/ap-bridge.c
+++ b/hw/s390x/ap-bridge.c
@@ -14,7 +14,7 @@
#include "qemu/bitops.h"
#include "qemu/module.h"
#include "hw/s390x/ap-bridge.h"
-#include "cpu.h"
+#include "target/s390x/cpu.h"
static char *ap_bus_get_dev_path(DeviceState *dev)
{
diff --git a/hw/s390x/s390-hypercall.c b/hw/s390x/s390-hypercall.c
index 508dd97ca0d..71dc717d08a 100644
--- a/hw/s390x/s390-hypercall.c
+++ b/hw/s390x/s390-hypercall.c
@@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
-#include "cpu.h"
+#include "target/s390x/cpu.h"
#include "hw/s390x/s390-virtio-ccw.h"
#include "hw/s390x/s390-hypercall.h"
#include "hw/s390x/ioinst.h"
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index d808ece3b92..2e83aa211cd 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -20,7 +20,7 @@
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qobject/qdict.h"
-#include "cpu.h"
+#include "target/s390x/cpu.h"
/* 512KiB cover 2GB of guest memory */
#define CMMA_BLOCK_SIZE (512 * KiB)
diff --git a/hw/s390x/tod-tcg.c b/hw/s390x/tod-tcg.c
index 0cc96624e1b..448b531b2ea 100644
--- a/hw/s390x/tod-tcg.c
+++ b/hw/s390x/tod-tcg.c
@@ -14,7 +14,7 @@
#include "qemu/timer.h"
#include "qemu/cutils.h"
#include "qemu/module.h"
-#include "cpu.h"
+#include "target/s390x/cpu.h"
#include "tcg/tcg_s390x.h"
#include "system/rtc.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 15/48] hw/sh4: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2026-04-22 19:57 ` [PULL 14/48] hw/s390x: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 16/48] hw/sparc: " Philippe Mathieu-Daudé
` (32 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-33-philmd@linaro.org>
---
hw/intc/sh_intc.c | 2 +-
hw/sh4/r2d.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/intc/sh_intc.c b/hw/intc/sh_intc.c
index 16e4b619d6d..0da82f9d5e0 100644
--- a/hw/intc/sh_intc.c
+++ b/hw/intc/sh_intc.c
@@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
-#include "cpu.h"
+#include "target/sh4/cpu.h"
#include "hw/sh4/sh_intc.h"
#include "hw/core/irq.h"
#include "hw/sh4/sh.h"
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index acb3fe75a8b..99afe3618e8 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -27,7 +27,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
-#include "cpu.h"
+#include "target/sh4/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/sh4/sh.h"
#include "system/reset.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 16/48] hw/sparc: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2026-04-22 19:57 ` [PULL 15/48] hw/sh4: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 17/48] hw/tricore: " Philippe Mathieu-Daudé
` (31 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-34-philmd@linaro.org>
---
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 2 +-
hw/sparc64/niagara.c | 2 +-
hw/sparc64/sparc64.c | 2 +-
hw/sparc64/sun4u.c | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index 9147d56bd4e..d4a6e917598 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -30,7 +30,7 @@
#include "qapi/error.h"
#include "qemu/datadir.h"
#include "exec/cpu-common.h"
-#include "cpu.h"
+#include "target/sparc/cpu.h"
#include "hw/core/irq.h"
#include "qemu/timer.h"
#include "hw/core/ptimer.h"
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 46fcbdda97e..550acdff6d4 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -26,7 +26,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
-#include "cpu.h"
+#include "target/sparc/cpu.h"
#include "exec/target_page.h"
#include "hw/core/sysbus.h"
#include "qemu/error-report.h"
diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c
index 209be380473..1211ecb82d4 100644
--- a/hw/sparc64/niagara.c
+++ b/hw/sparc64/niagara.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "block/block_int-common.h"
#include "qemu/units.h"
-#include "cpu.h"
+#include "target/sparc/cpu.h"
#include "hw/core/boards.h"
#include "hw/char/serial-mm.h"
#include "hw/misc/unimp.h"
diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c
index ce7eded143b..16f4aa052bc 100644
--- a/hw/sparc64/sparc64.c
+++ b/hw/sparc64/sparc64.c
@@ -25,7 +25,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/sparc/cpu.h"
#include "hw/core/boards.h"
#include "hw/sparc/sparc64.h"
#include "qemu/timer.h"
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 2e41785b783..d69ed9a81ac 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -27,7 +27,7 @@
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
-#include "cpu.h"
+#include "target/sparc/cpu.h"
#include "exec/target_page.h"
#include "hw/core/irq.h"
#include "hw/pci/pci.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 17/48] hw/tricore: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2026-04-22 19:57 ` [PULL 16/48] hw/sparc: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 18/48] hw/xtensa: " Philippe Mathieu-Daudé
` (30 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-35-philmd@linaro.org>
---
hw/tricore/tricore_testboard.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 60772d4f1d7..d5d796c8eec 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -21,7 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/tricore/cpu.h"
#include "net/net.h"
#include "hw/core/boards.h"
#include "hw/core/loader.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 18/48] hw/xtensa: Include full path to target 'cpu.h' header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (16 preceding siblings ...)
2026-04-22 19:57 ` [PULL 17/48] hw/tricore: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 19/48] hw/tpm: Factor tpm_ppi_enabled() out Philippe Mathieu-Daudé
` (29 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260313062055.2188-36-philmd@linaro.org>
---
hw/xtensa/xtensa_memory.h | 2 +-
hw/xtensa/pic_cpu.c | 2 +-
hw/xtensa/xtfpga.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/xtensa/xtensa_memory.h b/hw/xtensa/xtensa_memory.h
index af7e8025e3c..c86ad06685a 100644
--- a/hw/xtensa/xtensa_memory.h
+++ b/hw/xtensa/xtensa_memory.h
@@ -28,7 +28,7 @@
#ifndef XTENSA_MEMORY_H
#define XTENSA_MEMORY_H
-#include "cpu.h"
+#include "target/xtensa/cpu.h"
void xtensa_create_memory_regions(const XtensaMemory *memory,
const char *name,
diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c
index c00167859a2..370a353f1e3 100644
--- a/hw/xtensa/pic_cpu.c
+++ b/hw/xtensa/pic_cpu.c
@@ -26,7 +26,7 @@
*/
#include "qemu/osdep.h"
-#include "cpu.h"
+#include "target/xtensa/cpu.h"
#include "exec/cpu-interrupt.h"
#include "hw/core/irq.h"
#include "qemu/log.h"
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index ed24720f94a..5e509216df8 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
-#include "cpu.h"
+#include "target/xtensa/cpu.h"
#include "system/system.h"
#include "hw/core/boards.h"
#include "hw/core/loader.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 19/48] hw/tpm: Factor tpm_ppi_enabled() out
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (17 preceding siblings ...)
2026-04-22 19:57 ` [PULL 18/48] hw/xtensa: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 20/48] hw/tpm: Add TPMIfClass::ppi_enabled field Philippe Mathieu-Daudé
` (28 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Factor out tpm_ppi_enabled() before modifying it in a unique place.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20260317120241.16320-2-philmd@linaro.org>
---
include/system/tpm.h | 9 +++++++++
hw/acpi/tpm.c | 2 +-
hw/i386/acpi-build.c | 2 +-
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/system/tpm.h b/include/system/tpm.h
index 1ee568b3b62..b90dd4e8cb0 100644
--- a/include/system/tpm.h
+++ b/include/system/tpm.h
@@ -13,6 +13,7 @@
#define QEMU_TPM_H
#include "qapi/qapi-types-tpm.h"
+#include "qapi/error.h"
#include "qom/object.h"
#ifdef CONFIG_TPM
@@ -78,6 +79,14 @@ static inline TPMVersion tpm_get_version(TPMIf *ti)
return TPM_IF_GET_CLASS(ti)->get_version(ti);
}
+static inline bool tpm_ppi_enabled(TPMIf *ti)
+{
+ if (!ti) {
+ return false;
+ }
+ return object_property_get_bool(OBJECT(ti), "ppi", &error_abort);
+}
+
#else /* CONFIG_TPM */
#define tpm_init() (0)
diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c
index cdc02275365..5fe95f2e3f1 100644
--- a/hw/acpi/tpm.c
+++ b/hw/acpi/tpm.c
@@ -25,7 +25,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask,
*not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one;
- if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
+ if (!tpm_ppi_enabled(tpm)) {
return;
}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f622b91b76a..4f01e2c476e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2218,7 +2218,7 @@ void acpi_setup(void)
tables.tcpalog->data, acpi_data_len(tables.tcpalog));
tpm = tpm_find();
- if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
+ if (tpm_ppi_enabled(tpm)) {
tpm_config = (FwCfgTPMConfig) {
.tpmppi_address = cpu_to_le32(TPM_PPI_ADDR_BASE),
.tpm_version = tpm_get_version(tpm),
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 20/48] hw/tpm: Add TPMIfClass::ppi_enabled field
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (18 preceding siblings ...)
2026-04-22 19:57 ` [PULL 19/48] hw/tpm: Factor tpm_ppi_enabled() out Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 21/48] hw/tpm: Remove CRBState::ppi_enabled field Philippe Mathieu-Daudé
` (27 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Each TPM derived device has a @ppi_enabled field, itself
exposed as a QOM property. External layers (like the ACPI
subsystem) wanting to know whether a device implements PPI
has to check for the QOM property available. This can be
simplified by declaring a single field in the TPM interface.
Here we add such field to TPMIfClass, before converting each
TPM devices to use it in the following commits.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20260317120241.16320-3-philmd@linaro.org>
---
include/system/tpm.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/system/tpm.h b/include/system/tpm.h
index b90dd4e8cb0..9458ad6668a 100644
--- a/include/system/tpm.h
+++ b/include/system/tpm.h
@@ -43,6 +43,7 @@ struct TPMIfClass {
enum TpmModel model;
void (*request_completed)(TPMIf *obj, int ret);
enum TPMVersion (*get_version)(TPMIf *obj);
+ bool ppi_enabled;
};
#define TYPE_TPM_TIS_ISA "tpm-tis"
@@ -84,6 +85,9 @@ static inline bool tpm_ppi_enabled(TPMIf *ti)
if (!ti) {
return false;
}
+ if (TPM_IF_GET_CLASS(ti)->ppi_enabled) {
+ return true;
+ }
return object_property_get_bool(OBJECT(ti), "ppi", &error_abort);
}
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 21/48] hw/tpm: Remove CRBState::ppi_enabled field
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (19 preceding siblings ...)
2026-04-22 19:57 ` [PULL 20/48] hw/tpm: Add TPMIfClass::ppi_enabled field Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 22/48] hw/tpm: Propagate @ppi_enabled to tpm_tis_reset() and remove in TPMState Philippe Mathieu-Daudé
` (26 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
The CRBState::ppi_enabled boolean was only set in the
hw_compat_3_1[] array, via the 'ppi=false' property.
We removed all machines using that array, and the array
itself in commit a861ffef237 ("hw/core/machine: Remove
the hw_compat_3_1[] array"). We can safely remove the
now unused property. Since CRB devices always use PPI,
simplify removing the CRBState::ppi_enabled field.
Set the generic TPMIfClass::ppi_enabled so ACPI subsystem
can keep checking its availability.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20260317120241.16320-4-philmd@linaro.org>
---
hw/tpm/tpm_crb.c | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 8723536f931..02701ab9480 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -43,7 +43,6 @@ struct CRBState {
size_t be_buffer_size;
- bool ppi_enabled;
TPMPPI ppi;
};
typedef struct CRBState CRBState;
@@ -228,16 +227,13 @@ static const VMStateDescription vmstate_tpm_crb = {
static const Property tpm_crb_properties[] = {
DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe),
- DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true),
};
static void tpm_crb_reset(void *dev)
{
CRBState *s = CRB(dev);
- if (s->ppi_enabled) {
- tpm_ppi_reset(&s->ppi);
- }
+ tpm_ppi_reset(&s->ppi);
tpm_backend_reset(s->tpmbe);
memset(s->regs, 0, sizeof(s->regs));
@@ -303,10 +299,8 @@ static void tpm_crb_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(get_system_memory(),
TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem);
- if (s->ppi_enabled) {
- tpm_ppi_init(&s->ppi, get_system_memory(),
- TPM_PPI_ADDR_BASE, OBJECT(s));
- }
+ tpm_ppi_init(&s->ppi, get_system_memory(),
+ TPM_PPI_ADDR_BASE, OBJECT(s));
if (xen_enabled()) {
tpm_crb_reset(dev);
@@ -325,6 +319,7 @@ static void tpm_crb_class_init(ObjectClass *klass, const void *data)
dc->vmsd = &vmstate_tpm_crb;
dc->user_creatable = true;
tc->model = TPM_MODEL_TPM_CRB;
+ tc->ppi_enabled = true;
tc->get_version = tpm_crb_get_version;
tc->request_completed = tpm_crb_request_completed;
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 22/48] hw/tpm: Propagate @ppi_enabled to tpm_tis_reset() and remove in TPMState
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (20 preceding siblings ...)
2026-04-22 19:57 ` [PULL 21/48] hw/tpm: Remove CRBState::ppi_enabled field Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 23/48] hw/tpm: Simplify tpm_ppi_enabled() Philippe Mathieu-Daudé
` (25 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Of the TPM devices using FIFO mode, only the ISA variant has
PPI, and calls tpm_ppi_init() to initialize the PPI state.
Propagate @ppi_enabled to tpm_tis_reset() so it only resets
the PPI part when requested (ISA case) otherwise the PPI is in
uninitialized state. Remove the now unused TPMState::ppi_enabled
field. Set the generic TPMIfClass::ppi_enabled so ACPI subsystem
can keep checking its availability.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20260317120241.16320-5-philmd@linaro.org>
---
hw/tpm/tpm_tis.h | 3 +--
hw/tpm/tpm_tis_common.c | 4 ++--
hw/tpm/tpm_tis_i2c.c | 2 +-
hw/tpm/tpm_tis_isa.c | 10 ++++------
hw/tpm/tpm_tis_sysbus.c | 2 +-
5 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h
index 184632ff66b..1531620bf9d 100644
--- a/hw/tpm/tpm_tis.h
+++ b/hw/tpm/tpm_tis.h
@@ -75,7 +75,6 @@ typedef struct TPMState {
size_t be_buffer_size;
- bool ppi_enabled;
TPMPPI ppi;
} TPMState;
@@ -83,7 +82,7 @@ extern const VMStateDescription vmstate_locty;
extern const MemoryRegionOps tpm_tis_memory_ops;
int tpm_tis_pre_save(TPMState *s);
-void tpm_tis_reset(TPMState *s);
+void tpm_tis_reset(TPMState *s, bool ppi_enabled);
enum TPMVersion tpm_tis_get_tpm_version(TPMState *s);
void tpm_tis_request_completed(TPMState *s, int ret);
uint32_t tpm_tis_read_data(TPMState *s, hwaddr addr, unsigned size);
diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c
index f594b15b8ab..a134d5c2059 100644
--- a/hw/tpm/tpm_tis_common.c
+++ b/hw/tpm/tpm_tis_common.c
@@ -813,7 +813,7 @@ enum TPMVersion tpm_tis_get_tpm_version(TPMState *s)
* This function is called when the machine starts, resets or due to
* S3 resume.
*/
-void tpm_tis_reset(TPMState *s)
+void tpm_tis_reset(TPMState *s, bool ppi_enabled)
{
int c;
@@ -821,7 +821,7 @@ void tpm_tis_reset(TPMState *s)
s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver),
TPM_TIS_BUFFER_MAX);
- if (s->ppi_enabled) {
+ if (ppi_enabled) {
tpm_ppi_reset(&s->ppi);
}
tpm_backend_reset(s->be_driver);
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
index 9f13e0ec120..b4f258c7bcb 100644
--- a/hw/tpm/tpm_tis_i2c.c
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -523,7 +523,7 @@ static void tpm_tis_i2c_reset(DeviceState *dev)
i2cst->csum_enable = 0;
i2cst->loc_sel = 0x00;
- return tpm_tis_reset(s);
+ return tpm_tis_reset(s, false);
}
static void tpm_tis_i2c_class_init(ObjectClass *klass, const void *data)
diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c
index 61e95434f5b..1ca403241de 100644
--- a/hw/tpm/tpm_tis_isa.c
+++ b/hw/tpm/tpm_tis_isa.c
@@ -88,13 +88,12 @@ static void tpm_tis_isa_reset(DeviceState *dev)
TPMStateISA *isadev = TPM_TIS_ISA(dev);
TPMState *s = &isadev->state;
- return tpm_tis_reset(s);
+ return tpm_tis_reset(s, true);
}
static const Property tpm_tis_isa_properties[] = {
DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ),
DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver),
- DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true),
};
static void tpm_tis_isa_initfn(Object *obj)
@@ -132,10 +131,8 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp)
memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
TPM_TIS_ADDR_BASE, &s->mmio);
- if (s->ppi_enabled) {
- tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
- TPM_PPI_ADDR_BASE, OBJECT(dev));
- }
+ tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
+ TPM_PPI_ADDR_BASE, OBJECT(dev));
}
static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -175,6 +172,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, tpm_tis_isa_properties);
dc->vmsd = &vmstate_tpm_tis_isa;
tc->model = TPM_MODEL_TPM_TIS;
+ tc->ppi_enabled = true;
dc->realize = tpm_tis_isa_realizefn;
device_class_set_legacy_reset(dc, tpm_tis_isa_reset);
tc->request_completed = tpm_tis_isa_request_completed;
diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c
index e9372e73163..dd30344d5ac 100644
--- a/hw/tpm/tpm_tis_sysbus.c
+++ b/hw/tpm/tpm_tis_sysbus.c
@@ -87,7 +87,7 @@ static void tpm_tis_sysbus_reset(DeviceState *dev)
TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(dev);
TPMState *s = &sbdev->state;
- return tpm_tis_reset(s);
+ return tpm_tis_reset(s, false);
}
static const Property tpm_tis_sysbus_properties[] = {
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 23/48] hw/tpm: Simplify tpm_ppi_enabled()
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (21 preceding siblings ...)
2026-04-22 19:57 ` [PULL 22/48] hw/tpm: Propagate @ppi_enabled to tpm_tis_reset() and remove in TPMState Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 24/48] hw/ppc/spapr: Un-inline rtas_load/store() helpers Philippe Mathieu-Daudé
` (24 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
TPM instances don't expose any "ppi" property anymore,
remove that dead code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20260317120241.16320-6-philmd@linaro.org>
---
include/system/tpm.h | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/include/system/tpm.h b/include/system/tpm.h
index 9458ad6668a..874068d19a9 100644
--- a/include/system/tpm.h
+++ b/include/system/tpm.h
@@ -13,7 +13,6 @@
#define QEMU_TPM_H
#include "qapi/qapi-types-tpm.h"
-#include "qapi/error.h"
#include "qom/object.h"
#ifdef CONFIG_TPM
@@ -85,10 +84,7 @@ static inline bool tpm_ppi_enabled(TPMIf *ti)
if (!ti) {
return false;
}
- if (TPM_IF_GET_CLASS(ti)->ppi_enabled) {
- return true;
- }
- return object_property_get_bool(OBJECT(ti), "ppi", &error_abort);
+ return TPM_IF_GET_CLASS(ti)->ppi_enabled;
}
#else /* CONFIG_TPM */
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 24/48] hw/ppc/spapr: Un-inline rtas_load/store() helpers
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (22 preceding siblings ...)
2026-04-22 19:57 ` [PULL 23/48] hw/tpm: Simplify tpm_ppi_enabled() Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 25/48] hw/hyperv: Replace legacy ld_phys() -> address_space_ld() Philippe Mathieu-Daudé
` (23 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
The 32-bit binary doesn't use these helpers, so don't need to
compile them. Rather than using 64-bit target #ifdef'ry in a
global header, un-inline the calls since the helpers are called
from I/O (cold) path.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Acked-by: Glenn Miles <milesg@linux.ibm.com>
Message-Id: <20260319111936.68041-2-philmd@linaro.org>
---
include/hw/ppc/spapr.h | 18 +++---------------
hw/ppc/spapr_rtas.c | 15 +++++++++++++++
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index b022f8dd25d..9acda15d4f6 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -796,21 +796,9 @@ static inline uint64_t ppc64_phys_to_real(uint64_t addr)
return addr & ~0xF000000000000000ULL;
}
-static inline uint32_t rtas_ld(target_ulong phys, int n)
-{
- return ldl_be_phys(&address_space_memory,
- ppc64_phys_to_real(phys + 4 * n));
-}
-
-static inline uint64_t rtas_ldq(target_ulong phys, int n)
-{
- return (uint64_t)rtas_ld(phys, n) << 32 | rtas_ld(phys, n + 1);
-}
-
-static inline void rtas_st(target_ulong phys, int n, uint32_t val)
-{
- stl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4 * n), val);
-}
+uint32_t rtas_ld(target_ulong phys, int n);
+uint64_t rtas_ldq(target_ulong phys, int n);
+void rtas_st(target_ulong phys, int n, uint32_t val);
typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, SpaprMachineState *sm,
uint32_t token,
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index cb79ad34053..0871425237e 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -52,6 +52,21 @@
#include "migration/blocker.h"
#include "helper_regs.h"
+uint32_t rtas_ld(target_ulong phys, int n)
+{
+ return ldl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4 * n));
+}
+
+uint64_t rtas_ldq(target_ulong phys, int n)
+{
+ return (uint64_t)rtas_ld(phys, n) << 32 | rtas_ld(phys, n + 1);
+}
+
+void rtas_st(target_ulong phys, int n, uint32_t val)
+{
+ stl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4 * n), val);
+}
+
static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
uint32_t token, uint32_t nargs,
target_ulong args,
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 25/48] hw/hyperv: Replace legacy ld_phys() -> address_space_ld()
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (23 preceding siblings ...)
2026-04-22 19:57 ` [PULL 24/48] hw/ppc/spapr: Un-inline rtas_load/store() helpers Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 26/48] system/memory: Constify various AddressSpace arguments (flatview) Philippe Mathieu-Daudé
` (22 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Prefer the address_space_ld/st API over the legacy ld/st_phys()
because it allow checking for bus access fault, which shouldn't
happen here.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Message-ID: <20260319082954.65069-1-philmd@linaro.org>
---
hw/hyperv/hyperv.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index a42c2850e35..a19f330e192 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -709,13 +709,16 @@ uint16_t hyperv_hcall_signal_event(uint64_t param, bool fast)
EventFlagHandler *handler;
if (unlikely(!fast)) {
+ MemTxResult result;
hwaddr addr = param;
if (addr & (__alignof__(addr) - 1)) {
return HV_STATUS_INVALID_ALIGNMENT;
}
- param = ldq_phys(&address_space_memory, addr);
+ param = address_space_ldq_le(&address_space_memory, addr,
+ MEMTXATTRS_UNSPECIFIED, &result);
+ assert(result == MEMTX_OK);
}
/*
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 26/48] system/memory: Constify various AddressSpace arguments (flatview)
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (24 preceding siblings ...)
2026-04-22 19:57 ` [PULL 25/48] hw/hyperv: Replace legacy ld_phys() -> address_space_ld() Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 27/48] hw/core: Move compat_props_add() to 'hw/core/boards.h' Philippe Mathieu-Daudé
` (21 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Mark the AddressSpace structure const when it is only accessed
read-only.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20260319191017.12636-2-philmd@linaro.org>
---
include/system/memory.h | 2 +-
system/memory-internal.h | 5 +++--
system/memory.c | 2 +-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/system/memory.h b/include/system/memory.h
index d7b18b632d5..1417132f6d9 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -1201,7 +1201,7 @@ struct FlatView {
MemoryRegion *root;
};
-static inline FlatView *address_space_to_flatview(AddressSpace *as)
+static inline FlatView *address_space_to_flatview(const AddressSpace *as)
{
return qatomic_rcu_read(&as->current_map);
}
diff --git a/system/memory-internal.h b/system/memory-internal.h
index 5f0524756eb..0066ffdffb6 100644
--- a/system/memory-internal.h
+++ b/system/memory-internal.h
@@ -20,12 +20,13 @@ static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv)
return fv->dispatch;
}
-static inline AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as)
+static inline
+AddressSpaceDispatch *address_space_to_dispatch(const AddressSpace *as)
{
return flatview_to_dispatch(address_space_to_flatview(as));
}
-FlatView *address_space_get_flatview(AddressSpace *as);
+FlatView *address_space_get_flatview(const AddressSpace *as);
void flatview_unref(FlatView *view);
extern const MemoryRegionOps unassigned_mem_ops;
diff --git a/system/memory.c b/system/memory.c
index 56f3225b21a..b92f6eb140b 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -819,7 +819,7 @@ static void address_space_add_del_ioeventfds(AddressSpace *as,
}
}
-FlatView *address_space_get_flatview(AddressSpace *as)
+FlatView *address_space_get_flatview(const AddressSpace *as)
{
FlatView *view;
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 27/48] hw/core: Move compat_props_add() to 'hw/core/boards.h'
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (25 preceding siblings ...)
2026-04-22 19:57 ` [PULL 26/48] system/memory: Constify various AddressSpace arguments (flatview) Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 28/48] qom: Declare GlobalProperty structure in 'qom/compat-properties.h' Philippe Mathieu-Daudé
` (20 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
compat_props_add() is only used by board models, no need
to expose it to any device model. Restrict by defining it
only in "hw/core/boards.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Message-Id: <20260325151728.45378-3-philmd@linaro.org>
---
include/hw/core/boards.h | 10 ++++++++++
include/hw/core/qdev.h | 10 ----------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index b8dad0a1074..0ac7e17ef7a 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -798,6 +798,16 @@ struct MachineState {
} \
} while (0)
+static inline void
+compat_props_add(GPtrArray *arr,
+ GlobalProperty props[], size_t nelem)
+{
+ int i;
+ for (i = 0; i < nelem; i++) {
+ g_ptr_array_add(arr, (void *)&props[i]);
+ }
+}
+
extern GlobalProperty hw_compat_10_2[];
extern const size_t hw_compat_10_2_len;
diff --git a/include/hw/core/qdev.h b/include/hw/core/qdev.h
index f99a8979ccb..778617787c7 100644
--- a/include/hw/core/qdev.h
+++ b/include/hw/core/qdev.h
@@ -421,16 +421,6 @@ typedef struct GlobalProperty {
bool optional;
} GlobalProperty;
-static inline void
-compat_props_add(GPtrArray *arr,
- GlobalProperty props[], size_t nelem)
-{
- int i;
- for (i = 0; i < nelem; i++) {
- g_ptr_array_add(arr, (void *)&props[i]);
- }
-}
-
/*** Board API. This should go away once we have a machine config file. ***/
/**
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 28/48] qom: Declare GlobalProperty structure in 'qom/compat-properties.h'
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (26 preceding siblings ...)
2026-04-22 19:57 ` [PULL 27/48] hw/core: Move compat_props_add() to 'hw/core/boards.h' Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 29/48] qom: Declare compat properties API " Philippe Mathieu-Daudé
` (19 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
While GlobalProperty is expected to only be used by QDev board
layer, it is used by the lower QOM API, so define it in the
qom/ namespace. This helps to build binary which use QOM but
don't need the QDev layer.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Message-Id: <20260325151728.45378-4-philmd@linaro.org>
---
include/hw/core/boards.h | 1 +
include/hw/core/qdev-properties.h | 1 +
include/hw/core/qdev.h | 17 ----------------
include/qom/compat-properties.h | 32 +++++++++++++++++++++++++++++++
qom/object.c | 2 +-
5 files changed, 35 insertions(+), 18 deletions(-)
create mode 100644 include/qom/compat-properties.h
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index 0ac7e17ef7a..3f9a7127ad9 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -8,6 +8,7 @@
#include "system/blockdev.h"
#include "qapi/qapi-types-machine.h"
#include "qemu/module.h"
+#include "qom/compat-properties.h"
#include "qom/object.h"
#include "hw/core/cpu.h"
#include "hw/core/resettable.h"
diff --git a/include/hw/core/qdev-properties.h b/include/hw/core/qdev-properties.h
index d8745d4c65f..17543957a6c 100644
--- a/include/hw/core/qdev-properties.h
+++ b/include/hw/core/qdev-properties.h
@@ -1,6 +1,7 @@
#ifndef QEMU_QDEV_PROPERTIES_H
#define QEMU_QDEV_PROPERTIES_H
+#include "qom/compat-properties.h"
#include "hw/core/qdev.h"
/**
diff --git a/include/hw/core/qdev.h b/include/hw/core/qdev.h
index 778617787c7..337d69ea2c3 100644
--- a/include/hw/core/qdev.h
+++ b/include/hw/core/qdev.h
@@ -404,23 +404,6 @@ struct BusState {
ResettableState reset;
};
-/**
- * typedef GlobalProperty - a global property type
- *
- * @used: Set to true if property was used when initializing a device.
- * @optional: If set to true, GlobalProperty will be skipped without errors
- * if the property doesn't exist.
- *
- * An error is fatal for non-hotplugged devices, when the global is applied.
- */
-typedef struct GlobalProperty {
- const char *driver;
- const char *property;
- const char *value;
- bool used;
- bool optional;
-} GlobalProperty;
-
/*** Board API. This should go away once we have a machine config file. ***/
/**
diff --git a/include/qom/compat-properties.h b/include/qom/compat-properties.h
new file mode 100644
index 00000000000..6e44aabc26b
--- /dev/null
+++ b/include/qom/compat-properties.h
@@ -0,0 +1,32 @@
+/*
+ * QEMU Object Model
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Anthony Liguori <aliguori@us.ibm.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef QEMU_COMPAT_PROPERTIES_H
+#define QEMU_COMPAT_PROPERTIES_H
+
+/**
+ * typedef GlobalProperty - a global property type
+ *
+ * @used: Set to true if property was used when initializing a device.
+ * @optional: If set to true, GlobalProperty will be skipped without errors
+ * if the property doesn't exist.
+ *
+ * An error is fatal for non-hotplugged devices, when the global is applied.
+ */
+typedef struct GlobalProperty {
+ const char *driver;
+ const char *property;
+ const char *value;
+ bool used;
+ bool optional;
+} GlobalProperty;
+
+#endif
diff --git a/qom/object.c b/qom/object.c
index ff8ede8a328..838b1d2b225 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -11,8 +11,8 @@
*/
#include "qemu/osdep.h"
-#include "hw/core/qdev.h"
#include "qapi/error.h"
+#include "qom/compat-properties.h"
#include "qom/object.h"
#include "qom/object_interfaces.h"
#include "qemu/cutils.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 29/48] qom: Declare compat properties API in 'qom/compat-properties.h'
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (27 preceding siblings ...)
2026-04-22 19:57 ` [PULL 28/48] qom: Declare GlobalProperty structure in 'qom/compat-properties.h' Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 30/48] qom: Restrict compat properties API to system emulation Philippe Mathieu-Daudé
` (18 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
While most of QEMU files use the QOM concept, few of them
use the compatibility properties API (mostly use in system
emulation). Move its prototype to a new "qom/compat-properties.h"
header, keeping "qom/object.h" for generic QOM.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Message-Id: <20260325151728.45378-5-philmd@linaro.org>
---
include/qom/compat-properties.h | 8 ++++++++
include/qom/object.h | 8 --------
accel/accel-system.c | 1 +
backends/hostmem.c | 1 +
hw/core/machine.c | 1 +
hw/core/qdev-properties.c | 1 +
hw/core/qdev.c | 1 +
hw/i386/pc_q35.c | 1 +
system/rtc.c | 1 +
system/vl.c | 1 +
target/i386/sev.c | 1 +
ui/vdagent.c | 1 +
rust/bindings/qom-sys/lib.rs | 2 +-
13 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/include/qom/compat-properties.h b/include/qom/compat-properties.h
index 6e44aabc26b..90f8320adfd 100644
--- a/include/qom/compat-properties.h
+++ b/include/qom/compat-properties.h
@@ -29,4 +29,12 @@ typedef struct GlobalProperty {
bool optional;
} GlobalProperty;
+void object_set_machine_compat_props(GPtrArray *compat_props);
+void object_set_accelerator_compat_props(GPtrArray *compat_props);
+void object_register_sugar_prop(const char *driver, const char *prop,
+ const char *value, bool optional);
+void object_apply_compat_props(Object *obj);
+bool object_apply_global_props(Object *obj, const GPtrArray *props,
+ Error **errp);
+
#endif
diff --git a/include/qom/object.h b/include/qom/object.h
index 26df6137b91..510885218ba 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -700,14 +700,6 @@ Object *object_new_with_propv(const char *typename,
Error **errp,
va_list vargs);
-bool object_apply_global_props(Object *obj, const GPtrArray *props,
- Error **errp);
-void object_set_machine_compat_props(GPtrArray *compat_props);
-void object_set_accelerator_compat_props(GPtrArray *compat_props);
-void object_register_sugar_prop(const char *driver, const char *prop,
- const char *value, bool optional);
-void object_apply_compat_props(Object *obj);
-
/**
* object_set_props:
* @obj: the object instance to set properties on
diff --git a/accel/accel-system.c b/accel/accel-system.c
index 150af05bf5b..9176665202d 100644
--- a/accel/accel-system.c
+++ b/accel/accel-system.c
@@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/accel.h"
+#include "qom/compat-properties.h"
#include "qapi/qapi-commands-accelerator.h"
#include "monitor/monitor.h"
#include "hw/core/boards.h"
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 15d4365b697..cd2085fb3cd 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -18,6 +18,7 @@
#include "qapi/qapi-builtin-visit.h"
#include "qapi/visitor.h"
#include "qemu/config-file.h"
+#include "qom/compat-properties.h"
#include "qom/object_interfaces.h"
#include "qemu/mmap-alloc.h"
#include "qemu/madvise.h"
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 0aa77a57e95..cba50310948 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -21,6 +21,7 @@
#include "qapi/qapi-visit-machine.h"
#include "qapi/qapi-commands-machine.h"
#include "qemu/madvise.h"
+#include "qom/compat-properties.h"
#include "qom/object_interfaces.h"
#include "system/cpus.h"
#include "system/system.h"
diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c
index ba8461e9a42..73539c727b3 100644
--- a/hw/core/qdev-properties.c
+++ b/hw/core/qdev-properties.c
@@ -10,6 +10,7 @@
#include "qemu/units.h"
#include "qemu/cutils.h"
#include "qdev-prop-internal.h"
+#include "qom/compat-properties.h"
#include "qom/qom-qobject.h"
void qdev_prop_set_after_realize(DeviceState *dev, const char *name,
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index e48616b2c6f..b36101f3a75 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -32,6 +32,7 @@
#include "qapi/visitor.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
+#include "qom/compat-properties.h"
#include "hw/core/irq.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/boards.h"
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index cb23322f5a4..6a0967ecd18 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -56,6 +56,7 @@
#include "hw/usb/hcd-uhci.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
+#include "qom/compat-properties.h"
#include "system/numa.h"
#include "hw/hyperv/vmbus-bridge.h"
#include "hw/mem/nvdimm.h"
diff --git a/system/rtc.c b/system/rtc.c
index 56951288c40..f13dd392a76 100644
--- a/system/rtc.c
+++ b/system/rtc.c
@@ -28,6 +28,7 @@
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "qemu/timer.h"
+#include "qom/compat-properties.h"
#include "qom/object.h"
#include "system/replay.h"
#include "system/system.h"
diff --git a/system/vl.c b/system/vl.c
index 246623b3196..0e1fc217b4f 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -119,6 +119,7 @@
#include "qapi/string-input-visitor.h"
#include "qapi/opts-visitor.h"
#include "qapi/clone-visitor.h"
+#include "qom/compat-properties.h"
#include "qom/object_interfaces.h"
#include "semihosting/semihost.h"
#include "crypto/init.h"
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 9dde972c118..261b6aaa37b 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -36,6 +36,7 @@
#include "system/reset.h"
#include "trace.h"
#include "migration/blocker.h"
+#include "qom/compat-properties.h"
#include "qom/object.h"
#include "monitor/monitor.h"
#include "monitor/hmp.h"
diff --git a/ui/vdagent.c b/ui/vdagent.c
index bb0c4aa14ca..bb55cbefc9c 100644
--- a/ui/vdagent.c
+++ b/ui/vdagent.c
@@ -5,6 +5,7 @@
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "qemu/units.h"
+#include "qom/compat-properties.h"
#include "hw/core/qdev.h"
#include "hw/core/qdev-properties.h"
#include "migration/blocker.h"
diff --git a/rust/bindings/qom-sys/lib.rs b/rust/bindings/qom-sys/lib.rs
index 464b9290344..21b996aeaa4 100644
--- a/rust/bindings/qom-sys/lib.rs
+++ b/rust/bindings/qom-sys/lib.rs
@@ -18,7 +18,7 @@
clippy::too_many_arguments
)]
-use glib_sys::{GHashTable, GHashTableIter, GPtrArray, GSList};
+use glib_sys::{GHashTable, GHashTableIter, GSList};
use util_sys::{Error, QDict, QObject, Visitor};
#[cfg(MESON)]
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 30/48] qom: Restrict compat properties API to system emulation
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (28 preceding siblings ...)
2026-04-22 19:57 ` [PULL 29/48] qom: Declare compat properties API " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 31/48] docs/specs/tpm: document PPI support on ARM64 virt Philippe Mathieu-Daudé
` (17 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Move compat properties API definitions to their own file
unit, compile it only when system emulation is configured.
Add a pair of stubs for user emulation.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Message-Id: <20260325151728.45378-6-philmd@linaro.org>
---
MAINTAINERS | 1 +
qom/compat-properties.c | 116 ++++++++++++++++++++++++++++++++++
qom/object.c | 100 -----------------------------
stubs/qom-compat-properties.c | 20 ++++++
qom/meson.build | 3 +
stubs/meson.build | 1 +
6 files changed, 141 insertions(+), 100 deletions(-)
create mode 100644 qom/compat-properties.c
create mode 100644 stubs/qom-compat-properties.c
diff --git a/MAINTAINERS b/MAINTAINERS
index ad215eced84..54e15c04e59 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3551,6 +3551,7 @@ F: qapi/qom.json
F: scripts/coccinelle/qom-parent-type.cocci
F: scripts/qom-cast-macro-clean-cocci-gen.py
F: qom/
+F: stubs/qom-compat-properties.c
F: tests/unit/check-qom-interface.c
F: tests/unit/check-qom-proplist.c
F: tests/qtest/qom-test.c
diff --git a/qom/compat-properties.c b/qom/compat-properties.c
new file mode 100644
index 00000000000..f8d9b0036ae
--- /dev/null
+++ b/qom/compat-properties.c
@@ -0,0 +1,116 @@
+/*
+ * QEMU Object Model
+ *
+ * Copyright IBM, Corp. 2011
+ *
+ * Authors:
+ * Anthony Liguori <aliguori@us.ibm.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qom/compat-properties.h"
+#include "qom/qom-qobject.h"
+#include "hw/core/qdev.h"
+
+bool object_apply_global_props(Object *obj, const GPtrArray *props,
+ Error **errp)
+{
+ int i;
+
+ if (!props) {
+ return true;
+ }
+
+ for (i = 0; i < props->len; i++) {
+ GlobalProperty *p = g_ptr_array_index(props, i);
+ Error *err = NULL;
+
+ if (object_dynamic_cast(obj, p->driver) == NULL) {
+ continue;
+ }
+ if (p->optional && !object_property_find(obj, p->property)) {
+ continue;
+ }
+ p->used = true;
+ if (!object_property_parse(obj, p->property, p->value, &err)) {
+ error_prepend(&err, "can't apply global %s.%s=%s: ",
+ p->driver, p->property, p->value);
+ /*
+ * If errp != NULL, propagate error and return.
+ * If errp == NULL, report a warning, but keep going
+ * with the remaining globals.
+ */
+ if (errp) {
+ error_propagate(errp, err);
+ return false;
+ } else {
+ warn_report_err(err);
+ }
+ }
+ }
+
+ return true;
+}
+
+/*
+ * Global property defaults
+ * Slot 0: accelerator's global property defaults
+ * Slot 1: machine's global property defaults
+ * Slot 2: global properties from legacy command line option
+ * Each is a GPtrArray of GlobalProperty.
+ * Applied in order, later entries override earlier ones.
+ */
+static GPtrArray *object_compat_props[3];
+
+/*
+ * Retrieve @GPtrArray for global property defined with options
+ * other than "-global". These are generally used for syntactic
+ * sugar and legacy command line options.
+ */
+void object_register_sugar_prop(const char *driver, const char *prop,
+ const char *value, bool optional)
+{
+ GlobalProperty *g;
+ if (!object_compat_props[2]) {
+ object_compat_props[2] = g_ptr_array_new();
+ }
+ g = g_new0(GlobalProperty, 1);
+ g->driver = g_strdup(driver);
+ g->property = g_strdup(prop);
+ g->value = g_strdup(value);
+ g->optional = optional;
+ g_ptr_array_add(object_compat_props[2], g);
+}
+
+/*
+ * Set machine's global property defaults to @compat_props.
+ * May be called at most once.
+ */
+void object_set_machine_compat_props(GPtrArray *compat_props)
+{
+ assert(!object_compat_props[1]);
+ object_compat_props[1] = compat_props;
+}
+
+/*
+ * Set accelerator's global property defaults to @compat_props.
+ * May be called at most once.
+ */
+void object_set_accelerator_compat_props(GPtrArray *compat_props)
+{
+ assert(!object_compat_props[0]);
+ object_compat_props[0] = compat_props;
+}
+
+void object_apply_compat_props(Object *obj)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(object_compat_props); i++) {
+ object_apply_global_props(obj, object_compat_props[i],
+ i == 2 ? &error_fatal : &error_abort);
+ }
+}
diff --git a/qom/object.c b/qom/object.c
index 838b1d2b225..f00d659ef0f 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -440,106 +440,6 @@ static void object_post_init_with_type(Object *obj, TypeImpl *ti)
}
}
-bool object_apply_global_props(Object *obj, const GPtrArray *props,
- Error **errp)
-{
- int i;
-
- if (!props) {
- return true;
- }
-
- for (i = 0; i < props->len; i++) {
- GlobalProperty *p = g_ptr_array_index(props, i);
- Error *err = NULL;
-
- if (object_dynamic_cast(obj, p->driver) == NULL) {
- continue;
- }
- if (p->optional && !object_property_find(obj, p->property)) {
- continue;
- }
- p->used = true;
- if (!object_property_parse(obj, p->property, p->value, &err)) {
- error_prepend(&err, "can't apply global %s.%s=%s: ",
- p->driver, p->property, p->value);
- /*
- * If errp != NULL, propagate error and return.
- * If errp == NULL, report a warning, but keep going
- * with the remaining globals.
- */
- if (errp) {
- error_propagate(errp, err);
- return false;
- } else {
- warn_report_err(err);
- }
- }
- }
-
- return true;
-}
-
-/*
- * Global property defaults
- * Slot 0: accelerator's global property defaults
- * Slot 1: machine's global property defaults
- * Slot 2: global properties from legacy command line option
- * Each is a GPtrArray of GlobalProperty.
- * Applied in order, later entries override earlier ones.
- */
-static GPtrArray *object_compat_props[3];
-
-/*
- * Retrieve @GPtrArray for global property defined with options
- * other than "-global". These are generally used for syntactic
- * sugar and legacy command line options.
- */
-void object_register_sugar_prop(const char *driver, const char *prop,
- const char *value, bool optional)
-{
- GlobalProperty *g;
- if (!object_compat_props[2]) {
- object_compat_props[2] = g_ptr_array_new();
- }
- g = g_new0(GlobalProperty, 1);
- g->driver = g_strdup(driver);
- g->property = g_strdup(prop);
- g->value = g_strdup(value);
- g->optional = optional;
- g_ptr_array_add(object_compat_props[2], g);
-}
-
-/*
- * Set machine's global property defaults to @compat_props.
- * May be called at most once.
- */
-void object_set_machine_compat_props(GPtrArray *compat_props)
-{
- assert(!object_compat_props[1]);
- object_compat_props[1] = compat_props;
-}
-
-/*
- * Set accelerator's global property defaults to @compat_props.
- * May be called at most once.
- */
-void object_set_accelerator_compat_props(GPtrArray *compat_props)
-{
- assert(!object_compat_props[0]);
- object_compat_props[0] = compat_props;
-}
-
-void object_apply_compat_props(Object *obj)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(object_compat_props); i++) {
- object_apply_global_props(obj, object_compat_props[i],
- i == 2 ? &error_fatal : &error_abort);
- }
-}
-
static void object_class_property_init_all(Object *obj)
{
ObjectPropertyIterator iter;
diff --git a/stubs/qom-compat-properties.c b/stubs/qom-compat-properties.c
new file mode 100644
index 00000000000..f9282aeed27
--- /dev/null
+++ b/stubs/qom-compat-properties.c
@@ -0,0 +1,20 @@
+/*
+ * QEMU Object Model (compat properties stubs for user emulation)
+ *
+ * Copyright (c) Linaro
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qom/compat-properties.h"
+
+void object_apply_compat_props(Object *obj)
+{
+}
+
+bool object_apply_global_props(Object *obj, const GPtrArray *props,
+ Error **errp)
+{
+ return true;
+}
diff --git a/qom/meson.build b/qom/meson.build
index 81922434309..bd6f4aadd78 100644
--- a/qom/meson.build
+++ b/qom/meson.build
@@ -5,6 +5,9 @@ qom_ss.add(files(
'object_interfaces.c',
'qom-qobject.c',
))
+if have_system
+ qom_ss.add(files('compat-properties.c'))
+endif
qmp_ss.add(files('qom-qmp-cmds.c'))
system_ss.add(files('qom-hmp-cmds.c'))
diff --git a/stubs/meson.build b/stubs/meson.build
index 7189ff63ed5..f33b1d2a089 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -54,6 +54,7 @@ if have_user
# Symbols that are used by hw/core.
stub_ss.add(files('cpu-synchronize-state.c'))
stub_ss.add(files('cpu-destroy-address-spaces.c'))
+ stub_ss.add(files('qom-compat-properties.c'))
# Stubs for QAPI events. Those can always be included in the build, but
# they are not built at all for --disable-system builds.
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 31/48] docs/specs/tpm: document PPI support on ARM64 virt
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (29 preceding siblings ...)
2026-04-22 19:57 ` [PULL 30/48] qom: Restrict compat properties API to system emulation Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 32/48] hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi Philippe Mathieu-Daudé
` (16 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Mohammadfaiz Bawa <mbawa@redhat.com>
Document that tpm-tis-device on the ARM virt machine supports PPI
with dynamically allocated MMIO via the platform bus, unlike x86
where PPI is at the fixed address 0xFED45000.
Also add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list
of files related to TPM ACPI tables.
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Message-ID: <20260327173209.148180-2-mbawa@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/specs/tpm.rst | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst
index b630a351b4f..ba2b0d72674 100644
--- a/docs/specs/tpm.rst
+++ b/docs/specs/tpm.rst
@@ -187,8 +187,32 @@ The location of the table is given by the fw_cfg ``tpmppi_address``
field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to
leave enough room for future updates.
+PPI on ARM64 virt
+-----------------
+
+The ARM virt machine supports PPI for ``tpm-tis-device`` as defined
+in the `PPI specification`_.
+
+Unlike the x86 TIS device where the PPI memory region is mapped at
+the fixed address ``0xFED45000`` (within the TIS MMIO range), the
+ARM64 sysbus device registers PPI memory as a second MMIO region
+on the platform bus. The platform bus assigns the guest physical
+address dynamically at device plug time. The ACPI ``_DSM`` method
+and PPI operation regions reference this dynamically resolved
+address.
+
+PPI is controlled by the ``ppi`` property (default ``on``)::
+
+ -device tpm-tis-device,tpmdev=tpm0,ppi=on
+
+Without PPI, guest operating systems such as Windows 11
+ARM64 will log errors when attempting to query TPM Physical
+Presence capabilities via the ACPI ``_DSM`` method.
+
QEMU files related to TPM ACPI tables:
- ``hw/i386/acpi-build.c``
+ - ``hw/arm/virt-acpi-build.c``
+ - ``hw/acpi/tpm.c``
- ``include/hw/acpi/tpm.h``
TPM backend devices
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 32/48] hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (30 preceding siblings ...)
2026-04-22 19:57 ` [PULL 31/48] docs/specs/tpm: document PPI support on ARM64 virt Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 33/48] hw/tpm: add PPI support to tpm-tis-device for ARM64 virt Philippe Mathieu-Daudé
` (15 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Mohammadfaiz Bawa <mbawa@redhat.com>
Add a ppi_base parameter to tpm_build_ppi_acpi() instead of
hardcoding TPM_PPI_ADDR_BASE. This prepares for ARM64 support where
PPI memory is dynamically allocated by the platform bus and the
address is not known at compile time.
Update the x86 callers (ISA TIS and CRB) to pass TPM_PPI_ADDR_BASE
explicitly. No behavioral change.
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260327173209.148180-3-mbawa@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/acpi/tpm.h | 3 ++-
hw/acpi/tpm.c | 8 ++++----
hw/i386/acpi-build.c | 2 +-
hw/tpm/tpm_tis_isa.c | 2 +-
4 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h
index d2bf6637c54..2ab186a7455 100644
--- a/include/hw/acpi/tpm.h
+++ b/include/hw/acpi/tpm.h
@@ -20,6 +20,7 @@
#include "hw/core/registerfields.h"
#include "hw/acpi/aml-build.h"
#include "system/tpm.h"
+#include "exec/hwaddr.h"
#ifdef CONFIG_TPM
@@ -250,7 +251,7 @@ REG32(CRB_DATA_BUFFER, 0x80)
*/
#define TPM_I2C_INT_ENABLE_MASK 0x0
-void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev);
+void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base);
#endif /* CONFIG_TPM */
diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c
index 5fe95f2e3f1..e703775984a 100644
--- a/hw/acpi/tpm.c
+++ b/hw/acpi/tpm.c
@@ -20,7 +20,7 @@
#include "qapi/error.h"
#include "hw/acpi/tpm.h"
-void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
+void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base)
{
Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask,
*not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one;
@@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
*/
aml_append(dev,
aml_operation_region("TPP2", AML_SYSTEM_MEMORY,
- aml_int(TPM_PPI_ADDR_BASE + 0x100),
+ aml_int(ppi_base + 0x100),
0x5A));
field = aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PPIN", 8));
@@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(dev,
aml_operation_region(
"TPP3", AML_SYSTEM_MEMORY,
- aml_int(TPM_PPI_ADDR_BASE +
+ aml_int(ppi_base +
0x15a /* movv, docs/specs/tpm.rst */),
0x1));
field = aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
@@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(method,
aml_operation_region("TPP1", AML_SYSTEM_MEMORY,
- aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1));
+ aml_add(aml_int(ppi_base), op, NULL), 0x1));
field = aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("TPPF", 8));
aml_append(method, field);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4f01e2c476e..0d7c83d5e96 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1219,7 +1219,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
aml_append(dev, aml_name_decl("_UID", aml_int(1)));
- tpm_build_ppi_acpi(tpm, dev);
+ tpm_build_ppi_acpi(tpm, dev, TPM_PPI_ADDR_BASE);
aml_append(sb_scope, dev);
}
diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c
index 1ca403241de..2b1267133ac 100644
--- a/hw/tpm/tpm_tis_isa.c
+++ b/hw/tpm/tpm_tis_isa.c
@@ -159,7 +159,7 @@ static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
*/
/* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */
aml_append(dev, aml_name_decl("_CRS", crs));
- tpm_build_ppi_acpi(ti, dev);
+ tpm_build_ppi_acpi(ti, dev, TPM_PPI_ADDR_BASE);
aml_append(scope, dev);
}
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 33/48] hw/tpm: add PPI support to tpm-tis-device for ARM64 virt
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (31 preceding siblings ...)
2026-04-22 19:57 ` [PULL 32/48] hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 34/48] physmem: Simplify dirty memory type checks with loop Philippe Mathieu-Daudé
` (14 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Mohammadfaiz Bawa <mbawa@redhat.com>
Add PPI memory region and ACPI _STA, _DSM to tpm-tis-sysbus so
Windows 11 ARM64 guests no longer log Event ID 15 errors from
tpm.sys on every boot.
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260327173209.148180-4-mbawa@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/virt-acpi-build.c | 9 ++++++++-
hw/tpm/tpm_tis_sysbus.c | 11 +++++++++++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 591cfc993c6..5b5ac551f8c 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -240,7 +240,8 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)
Aml *dev = aml_device("TPM0");
aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
- aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
Aml *crs = aml_resource_template();
aml_append(crs,
@@ -248,6 +249,12 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)
(uint32_t)memory_region_size(sbdev_mr),
AML_READ_WRITE));
aml_append(dev, aml_name_decl("_CRS", crs));
+
+ hwaddr ppi_base = platform_bus_get_mmio_addr(pbus, sbdev, 1);
+ if (ppi_base != -1) {
+ ppi_base += pbus_base;
+ tpm_build_ppi_acpi(TPM_IF(sbdev), dev, ppi_base);
+ }
aml_append(scope, dev);
}
#endif
diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c
index dd30344d5ac..6bec30c36fc 100644
--- a/hw/tpm/tpm_tis_sysbus.c
+++ b/hw/tpm/tpm_tis_sysbus.c
@@ -30,6 +30,7 @@
#include "hw/core/sysbus.h"
#include "tpm_tis.h"
#include "qom/object.h"
+#include "qemu/memalign.h"
struct TPMStateSysBus {
/*< private >*/
@@ -99,6 +100,7 @@ static void tpm_tis_sysbus_initfn(Object *obj)
{
TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(obj);
TPMState *s = &sbdev->state;
+ size_t host_page_size = qemu_real_host_page_size();
memory_region_init_io(&s->mmio, obj, &tpm_tis_memory_ops,
s, "tpm-tis-mmio",
@@ -106,6 +108,12 @@ static void tpm_tis_sysbus_initfn(Object *obj)
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
+
+ s->ppi.buf = qemu_memalign(host_page_size,
+ ROUND_UP(TPM_PPI_ADDR_SIZE, host_page_size));
+ memory_region_init_ram_device_ptr(&s->ppi.ram, obj, "tpm-ppi",
+ TPM_PPI_ADDR_SIZE, s->ppi.buf);
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->ppi.ram);
}
static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp)
@@ -122,6 +130,8 @@ static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp)
error_setg(errp, "'tpmdev' property is required");
return;
}
+
+ vmstate_register_ram(&s->ppi.ram, dev);
}
static void tpm_tis_sysbus_class_init(ObjectClass *klass, const void *data)
@@ -132,6 +142,7 @@ static void tpm_tis_sysbus_class_init(ObjectClass *klass, const void *data)
device_class_set_props(dc, tpm_tis_sysbus_properties);
dc->vmsd = &vmstate_tpm_tis_sysbus;
tc->model = TPM_MODEL_TPM_TIS;
+ tc->ppi_enabled = true;
dc->realize = tpm_tis_sysbus_realizefn;
device_class_set_legacy_reset(dc, tpm_tis_sysbus_reset);
tc->request_completed = tpm_tis_sysbus_request_completed;
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 34/48] physmem: Simplify dirty memory type checks with loop
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (32 preceding siblings ...)
2026-04-22 19:57 ` [PULL 33/48] hw/tpm: add PPI support to tpm-tis-device for ARM64 virt Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 35/48] hw/arm/smmuv3: Have smmuv3_accel_init() take an Error* parameter Philippe Mathieu-Daudé
` (13 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Bin Guo <guobin@linux.alibaba.com>
In physical_memory_range_includes_clean(), we have three nearly identical
if-statements checking different DIRTY_MEMORY types (VGA, CODE, MIGRATION).
This code duplication makes maintenance harder and increases the risk of
inconsistencies when adding new dirty memory types.
Replace the repetitive checks with a simple loop that iterates through
all DIRTY_MEMORY_NUM types, checking only those specified in the mask.
This reduces code size and makes it easier to add new dirty memory types
in the future.
Signed-off-by: Bin Guo <guobin@linux.alibaba.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260401100005.20651-1-guobin@linux.alibaba.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/physmem.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index 4e26f1a1d42..c58d940e807 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -981,17 +981,11 @@ uint8_t physical_memory_range_includes_clean(ram_addr_t start,
{
uint8_t ret = 0;
- if (mask & (1 << DIRTY_MEMORY_VGA) &&
- !physical_memory_all_dirty(start, length, DIRTY_MEMORY_VGA)) {
- ret |= (1 << DIRTY_MEMORY_VGA);
- }
- if (mask & (1 << DIRTY_MEMORY_CODE) &&
- !physical_memory_all_dirty(start, length, DIRTY_MEMORY_CODE)) {
- ret |= (1 << DIRTY_MEMORY_CODE);
- }
- if (mask & (1 << DIRTY_MEMORY_MIGRATION) &&
- !physical_memory_all_dirty(start, length, DIRTY_MEMORY_MIGRATION)) {
- ret |= (1 << DIRTY_MEMORY_MIGRATION);
+ for (int i = 0; i < DIRTY_MEMORY_NUM; i++) {
+ if ((mask & (1 << i)) &&
+ !physical_memory_all_dirty(start, length, i)) {
+ ret |= (1 << i);
+ }
}
return ret;
}
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 35/48] hw/arm/smmuv3: Have smmuv3_accel_init() take an Error* parameter
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (33 preceding siblings ...)
2026-04-22 19:57 ` [PULL 34/48] physmem: Simplify dirty memory type checks with loop Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 36/48] hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/ header Philippe Mathieu-Daudé
` (12 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
By giving smmuv3_accel_init() the ability to populate an error,
we can fail early in smmu_realize() when CONFIG_ARM_SMMUV3_ACCEL
is not available, simplifying smmu_validate_property().
Suggested-by: Shameer Kolothum Thodi <skolothumtho@nvidia.com>
Co-developed-by: Shameer Kolothum Thodi <skolothumtho@nvidia.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Message-Id: <20260410200031.18572-2-philmd@linaro.org>
---
hw/arm/smmuv3-accel.h | 7 +++++--
hw/arm/smmuv3-accel.c | 3 ++-
hw/arm/smmuv3.c | 11 +++--------
3 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h
index dba6c71de52..1ca2c80a933 100644
--- a/hw/arm/smmuv3-accel.h
+++ b/hw/arm/smmuv3-accel.h
@@ -42,7 +42,7 @@ typedef struct SMMUv3AccelDevice {
} SMMUv3AccelDevice;
#ifdef CONFIG_ARM_SMMUV3_ACCEL
-void smmuv3_accel_init(SMMUv3State *s);
+bool smmuv3_accel_init(SMMUv3State *s, Error **errp);
bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
Error **errp);
bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
@@ -54,8 +54,11 @@ void smmuv3_accel_idr_override(SMMUv3State *s);
bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp);
void smmuv3_accel_reset(SMMUv3State *s);
#else
-static inline void smmuv3_accel_init(SMMUv3State *s)
+#include "qapi/error.h"
+static inline bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
{
+ error_setg(errp, "accel=on support not compiled in");
+ return false;
}
static inline bool
smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c
index 65c2f44880a..ae031f1eccf 100644
--- a/hw/arm/smmuv3-accel.c
+++ b/hw/arm/smmuv3-accel.c
@@ -917,11 +917,12 @@ static void smmuv3_accel_as_init(SMMUv3State *s)
address_space_init(shared_as_sysmem, &root, "smmuv3-accel-as-sysmem");
}
-void smmuv3_accel_init(SMMUv3State *s)
+bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
{
SMMUState *bs = ARM_SMMU(s);
s->s_accel = g_new0(SMMUv3AccelState, 1);
bs->iommu_ops = &smmuv3_accel_ops;
smmuv3_accel_as_init(s);
+ return true;
}
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 5570a13c8a6..5c2855c3770 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1965,13 +1965,6 @@ static void smmu_reset_exit(Object *obj, ResetType type)
static bool smmu_validate_property(SMMUv3State *s, Error **errp)
{
-#ifndef CONFIG_ARM_SMMUV3_ACCEL
- if (s->accel) {
- error_setg(errp, "accel=on support not compiled in");
- return false;
- }
-#endif
-
if (s->ats == ON_OFF_AUTO_AUTO) {
error_setg(errp, "ats auto mode is not supported");
return false;
@@ -2033,7 +2026,9 @@ static void smmu_realize(DeviceState *d, Error **errp)
}
if (s->accel) {
- smmuv3_accel_init(s);
+ if (!smmuv3_accel_init(s, errp)) {
+ return;
+ }
error_setg(&s->migration_blocker, "Migration not supported with SMMUv3 "
"accelerator mode enabled");
if (migrate_add_blocker(&s->migration_blocker, errp) < 0) {
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 36/48] hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/ header
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (34 preceding siblings ...)
2026-04-22 19:57 ` [PULL 35/48] hw/arm/smmuv3: Have smmuv3_accel_init() take an Error* parameter Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 37/48] hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node Philippe Mathieu-Daudé
` (11 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
By turning the inline functions into stubs we can avoid the
use of target-specific CONFIG_DEVICES include in a hw/ header,
allowing to build the source files including it as common objects.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Message-Id: <20260410200031.18572-3-philmd@linaro.org>
---
hw/arm/smmuv3-accel.h | 42 ------------------------------
hw/arm/smmuv3-accel-stubs.c | 52 +++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 5 ++--
3 files changed, 55 insertions(+), 44 deletions(-)
create mode 100644 hw/arm/smmuv3-accel-stubs.c
diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h
index 1ca2c80a933..85669d0e00e 100644
--- a/hw/arm/smmuv3-accel.h
+++ b/hw/arm/smmuv3-accel.h
@@ -14,7 +14,6 @@
#ifdef CONFIG_LINUX
#include <linux/iommufd.h>
#endif
-#include CONFIG_DEVICES
/*
* Represents an accelerated SMMU instance backed by an iommufd vIOMMU object.
@@ -41,7 +40,6 @@ typedef struct SMMUv3AccelDevice {
SMMUv3AccelState *s_accel;
} SMMUv3AccelDevice;
-#ifdef CONFIG_ARM_SMMUV3_ACCEL
bool smmuv3_accel_init(SMMUv3State *s, Error **errp);
bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
Error **errp);
@@ -53,45 +51,5 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
void smmuv3_accel_idr_override(SMMUv3State *s);
bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp);
void smmuv3_accel_reset(SMMUv3State *s);
-#else
-#include "qapi/error.h"
-static inline bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
-{
- error_setg(errp, "accel=on support not compiled in");
- return false;
-}
-static inline bool
-smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
- Error **errp)
-{
- return true;
-}
-static inline bool
-smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
- Error **errp)
-{
- return true;
-}
-static inline bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)
-{
- return true;
-}
-static inline bool
-smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
- Error **errp)
-{
- return true;
-}
-static inline void smmuv3_accel_idr_override(SMMUv3State *s)
-{
-}
-static inline bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)
-{
- return true;
-}
-static inline void smmuv3_accel_reset(SMMUv3State *s)
-{
-}
-#endif
#endif /* HW_ARM_SMMUV3_ACCEL_H */
diff --git a/hw/arm/smmuv3-accel-stubs.c b/hw/arm/smmuv3-accel-stubs.c
new file mode 100644
index 00000000000..70cef66966a
--- /dev/null
+++ b/hw/arm/smmuv3-accel-stubs.c
@@ -0,0 +1,52 @@
+/*
+ * Stubs for accelerated SMMU instance backed by an iommufd vIOMMU object.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/smmuv3.h"
+#include "hw/arm/smmuv3-accel.h"
+
+bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
+{
+ error_setg(errp, "accel=on support not compiled in");
+ return false;
+}
+
+bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
+ Error **errp)
+{
+ return true;
+}
+
+bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
+ Error **errp)
+{
+ return true;
+}
+
+bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)
+{
+ return true;
+}
+
+bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
+ Error **errp)
+{
+ return true;
+}
+
+void smmuv3_accel_idr_override(SMMUv3State *s)
+{
+}
+
+bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)
+{
+ return true;
+}
+
+void smmuv3_accel_reset(SMMUv3State *s)
+{
+}
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index b187b946f04..3be1252c4f1 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -84,8 +84,9 @@ arm_common_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))
-arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
-arm_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))
+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))
+stub_ss.add(files('smmuv3-accel-stubs.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
arm_common_ss.add(when: 'CONFIG_XEN', if_true: files(
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 37/48] hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (35 preceding siblings ...)
2026-04-22 19:57 ` [PULL 36/48] hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/ header Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 38/48] ati-vga: fix unsigned integer overflow in cursor bounds checks Philippe Mathieu-Daudé
` (10 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Vivien LEGER <vivien.leger@gmail.com>
The bus-frequency property in the CPU FDT node was hardcoded to 0.
This is incorrect - it should reflect the actual platform bus clock
frequency, as firmware and RTOSes use it to derive peripheral clock
rates.
Notably, the RTEMS QorIQ BSP uses bus-frequency to program the MPIC
global timer interval. With bus-frequency=0, the timer interval
overflows to ~85 seconds, preventing any clock interrupts from firing.
Fix by adding a bus_freq field to PPCE500MachineClass and using it in
the FDT generator. Set bus_freq = PLATFORM_CLK_FREQ_HZ (400MHz) for
existing machines, matching the existing clock_freq value.
Signed-off-by: Vivien LEGER <vivien.leger@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20260411154535.1451361-1-vivien.leger@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/ppc/e500.h | 1 +
hw/ppc/e500.c | 2 +-
hw/ppc/e500plat.c | 1 +
hw/ppc/mpc8544ds.c | 1 +
4 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h
index 11f8ae53177..6d56c7b4cb2 100644
--- a/hw/ppc/e500.h
+++ b/hw/ppc/e500.h
@@ -40,6 +40,7 @@ struct PPCE500MachineClass {
hwaddr pci_mmio_bus_base;
hwaddr spin_base;
uint32_t clock_freq;
+ uint32_t bus_freq;
uint32_t tb_freq;
};
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index d6ca2e8563a..5be2f2095f6 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -518,7 +518,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
env->icache_line_size);
qemu_fdt_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
qemu_fdt_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
- qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
+ qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", pmc->bus_freq);
if (cpu->cpu_index) {
qemu_fdt_setprop_string(fdt, cpu_name, "status", "disabled");
qemu_fdt_setprop_string(fdt, cpu_name, "enable-method",
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index ca5647284d0..85cec810d9a 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -94,6 +94,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, const void *data)
pmc->pci_mmio_bus_base = 0xE0000000ULL;
pmc->spin_base = 0xFEF000000ULL;
pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
+ pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;
mc->desc = "generic paravirt e500 platform";
diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c
index 6a5d3edc490..a5717a9cde4 100644
--- a/hw/ppc/mpc8544ds.c
+++ b/hw/ppc/mpc8544ds.c
@@ -56,6 +56,7 @@ static void mpc8544ds_machine_class_init(ObjectClass *oc, const void *data)
pmc->pci_pio_base = 0xE1000000ULL;
pmc->spin_base = 0xEF000000ULL;
pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
+ pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;
mc->desc = "mpc8544ds";
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 38/48] ati-vga: fix unsigned integer overflow in cursor bounds checks
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (36 preceding siblings ...)
2026-04-22 19:57 ` [PULL 37/48] hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 39/48] ati-vga: mask out lock bit from CUR_OFFSET in cursor offset calculation Philippe Mathieu-Daudé
` (9 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Junjie Cao <junjie.cao@intel.com>
The cursor bounds checks compare (srcoff + N) against vram_size, but
both sides are uint32_t so the addition can wrap past UINT32_MAX when
srcoff underflows from the cur_hv_offs subtraction, causing the check
to be bypassed.
Rewrite the checks as (srcoff > vram_size - N) to avoid the
overflow-prone addition, matching the style already used in
ati_mm_read() and ati_mm_write().
Cc: qemu-stable@nongnu.org
Fixes: 2f1fbe6ee9b5 ("ati-vga: Make sure hardware cursor data is within vram")
Signed-off-by: Junjie Cao <junjie.cao@intel.com>
Message-ID: <20260414141458.1076014-1-junjie.cao@intel.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/display/ati.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/display/ati.c b/hw/display/ati.c
index 88a5bbbf07a..0489995d00b 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -149,7 +149,7 @@ static void ati_cursor_define(ATIVGAState *s)
/* FIXME handle cur_hv_offs correctly */
srcoff = s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16;
- if (srcoff + 64 * 16 > s->vga.vram_size) {
+ if (srcoff > s->vga.vram_size - 64 * 16) {
return;
}
for (int i = 0; i < 64; i++, srcoff += 16) {
@@ -206,7 +206,7 @@ static void ati_cursor_draw_line(VGACommonState *vga, uint8_t *d, int scr_y)
}
/* FIXME handle cur_hv_offs correctly */
srcoff = s->cursor_offset + (scr_y - vga->hw_cursor_y) * 16;
- if (srcoff + 16 > s->vga.vram_size) {
+ if (srcoff > s->vga.vram_size - 16) {
return;
}
dp = &dp[vga->hw_cursor_x];
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 39/48] ati-vga: mask out lock bit from CUR_OFFSET in cursor offset calculation
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (37 preceding siblings ...)
2026-04-22 19:57 ` [PULL 38/48] ati-vga: fix unsigned integer overflow in cursor bounds checks Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 40/48] hw/virtio/virtio-iommu: remove duplicate include Philippe Mathieu-Daudé
` (8 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Junjie Cao <junjie.cao@intel.com>
Bit 31 of CUR_OFFSET is the cursor lock bit, not part of the actual
cursor address (bits 26:4). Although the callers already check for the
lock bit and return early, mask it out with 0x07fffff0 when computing
the cursor source offset so the calculation only uses the address bits.
Suggested-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Junjie Cao <junjie.cao@intel.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-ID: <20260414213523.1125859-2-junjie.cao@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/display/ati.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/display/ati.c b/hw/display/ati.c
index 0489995d00b..3a7d45a8820 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -147,7 +147,7 @@ static void ati_cursor_define(ATIVGAState *s)
return; /* Do not update cursor if locked or rendered by guest */
}
/* FIXME handle cur_hv_offs correctly */
- srcoff = s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
+ srcoff = (s->regs.cur_offset & 0x07fffff0) - (s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16;
if (srcoff > s->vga.vram_size - 64 * 16) {
return;
@@ -176,13 +176,15 @@ static void ati_cursor_invalidate(VGACommonState *vga)
if (s->cursor_size != size ||
vga->hw_cursor_x != s->regs.cur_hv_pos >> 16 ||
vga->hw_cursor_y != (s->regs.cur_hv_pos & 0xffff) ||
- s->cursor_offset != s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
+ s->cursor_offset != (s->regs.cur_offset & 0x07fffff0) -
+ (s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16) {
/* Remove old cursor then update and show new one if needed */
vga_invalidate_scanlines(vga, vga->hw_cursor_y, vga->hw_cursor_y + 63);
vga->hw_cursor_x = s->regs.cur_hv_pos >> 16;
vga->hw_cursor_y = s->regs.cur_hv_pos & 0xffff;
- s->cursor_offset = s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
+ s->cursor_offset = (s->regs.cur_offset & 0x07fffff0) -
+ (s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16;
s->cursor_size = size;
if (size) {
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 40/48] hw/virtio/virtio-iommu: remove duplicate include
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (38 preceding siblings ...)
2026-04-22 19:57 ` [PULL 39/48] ati-vga: mask out lock bit from CUR_OFFSET in cursor offset calculation Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 41/48] hw/hyperv: " Philippe Mathieu-Daudé
` (7 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Osama Abdelkader <osama.abdelkader@gmail.com>
qemu/reserved-region.h is included twice
Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260420163050.321668-1-osama.abdelkader@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/virtio/virtio-iommu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
index 4226a676d07..08f7e8b783b 100644
--- a/hw/virtio/virtio-iommu.c
+++ b/hw/virtio/virtio-iommu.c
@@ -28,7 +28,6 @@
#include "system/kvm.h"
#include "system/reset.h"
#include "system/system.h"
-#include "qemu/reserved-region.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 41/48] hw/hyperv: remove duplicate include
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (39 preceding siblings ...)
2026-04-22 19:57 ` [PULL 40/48] hw/virtio/virtio-iommu: remove duplicate include Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 42/48] hw/ppc/amigaone: " Philippe Mathieu-Daudé
` (6 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Osama Abdelkader <osama.abdelkader@gmail.com>
exec/target_page.h is included twice
Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20260420163452.327350-2-osama.abdelkader@gmail.com>
Reviewed-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260420163844.332663-1-osama.abdelkader@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/hyperv/hyperv.c | 1 -
hw/hyperv/vmbus.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index a19f330e192..a854a4927a0 100644
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -26,7 +26,6 @@
#include "hw/hyperv/hyperv.h"
#include "qom/object.h"
#include "target/i386/kvm/hyperv-proto.h"
-#include "exec/target_page.h"
struct SynICState {
DeviceState parent_obj;
diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c
index 5388f4277f3..dcfce700052 100644
--- a/hw/hyperv/vmbus.c
+++ b/hw/hyperv/vmbus.c
@@ -21,7 +21,6 @@
#include "hw/core/sysbus.h"
#include "exec/cpu-common.h"
#include "system/kvm.h"
-#include "exec/target_page.h"
#include "trace.h"
enum {
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 42/48] hw/ppc/amigaone: remove duplicate include
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (40 preceding siblings ...)
2026-04-22 19:57 ` [PULL 41/48] hw/hyperv: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 43/48] hw/misc: Fix the valid access size to the avr-power device Philippe Mathieu-Daudé
` (5 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Osama Abdelkader <osama.abdelkader@gmail.com>
hw/ppc/ppc.h is included twice
Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-ID: <20260420164058.335872-1-osama.abdelkader@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/ppc/amigaone.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/amigaone.c b/hw/ppc/amigaone.c
index 8074713fbe9..9fba5ca03a6 100644
--- a/hw/ppc/amigaone.c
+++ b/hw/ppc/amigaone.c
@@ -20,7 +20,6 @@
#include "hw/isa/vt82c686.h"
#include "hw/ide/pci.h"
#include "hw/i2c/smbus_eeprom.h"
-#include "hw/ppc/ppc.h"
#include "exec/cpu-common.h"
#include "system/block-backend.h"
#include "system/qtest.h"
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 43/48] hw/misc: Fix the valid access size to the avr-power device
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (41 preceding siblings ...)
2026-04-22 19:57 ` [PULL 42/48] hw/ppc/amigaone: " Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 44/48] hw/sh4/sh7750: Remove forgotten abort() in the MM_ITLB_DATA handler Philippe Mathieu-Daudé
` (4 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Thomas Huth <thuth@redhat.com>
Accessing the device with in non-single byte mode currently causes
QEMU to abort:
$ echo "writew 0x800064 0x4142" | \
./qemu-system-avr -M mega2560 -display none -qtest stdio -accel qtest
[I 0.000000] OPENED
[R +0.001784] writew 0x800064 0x4142
qemu-system-avr: ../../devel/qemu/hw/misc/avr_power.c:58: avr_mask_write:
Assertion `offset == 0' failed.
Aborted (core dumped)
Set the valid max access size to 1 to fix the problem.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3393
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260421082935.85995-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/misc/avr_power.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/misc/avr_power.c b/hw/misc/avr_power.c
index f42cf4fd906..42be2656911 100644
--- a/hw/misc/avr_power.c
+++ b/hw/misc/avr_power.c
@@ -73,6 +73,9 @@ static const MemoryRegionOps avr_mask_ops = {
.impl = {
.max_access_size = 1,
},
+ .valid = {
+ .max_access_size = 1,
+ },
};
static void avr_mask_init(Object *dev)
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 44/48] hw/sh4/sh7750: Remove forgotten abort() in the MM_ITLB_DATA handler
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (42 preceding siblings ...)
2026-04-22 19:57 ` [PULL 43/48] hw/misc: Fix the valid access size to the avr-power device Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 45/48] MAINTAINERS: Remove my unused git tree locations Philippe Mathieu-Daudé
` (3 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
From: Thomas Huth <thuth@redhat.com>
QEMU currently aborts when the guest writes to the MM_ITLB_DATA register:
echo "writel 0xf3000000 0x11223344" | \
./qemu-system-sh4 -M r2d -display none -accel qtest -qtest stdio
[I 0.000000] OPENED
[R +0.004476] writel 0xf3000000 0x11223344
Aborted (core dumped)
Looking at the history of the code, the abort() here has likely just
been forgotten when the register handler had been implemented (it used
to be a reminder about unimplemented functionality initially):
https://gitlab.com/qemu-project/qemu/-/commit/9f97309a70f12df5f9104f1f
Thus simply remove the abort() now to get rid of the problem.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3420
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260422075429.341409-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/sh4/sh7750.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index 3ae71f99fe5..6aa7f637734 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -687,7 +687,6 @@ static void sh7750_mmct_write(void *opaque, hwaddr addr,
break;
case MM_ITLB_DATA:
cpu_sh4_write_mmaped_itlb_data(&s->cpu->env, addr, mem_value);
- abort();
break;
case MM_OCACHE_ADDR:
case MM_OCACHE_DATA:
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 45/48] MAINTAINERS: Remove my unused git tree locations
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (43 preceding siblings ...)
2026-04-22 19:57 ` [PULL 44/48] hw/sh4/sh7750: Remove forgotten abort() in the MM_ITLB_DATA handler Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 46/48] MAINTAINERS: Remove my disfunctional emails Philippe Mathieu-Daudé
` (2 subsequent siblings)
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
I haven't used these for years. And as explained in [*]
QEMU development workflow doesn't leverage subsystem's
git trees. Remove them.
[*] https://lore.kernel.org/qemu-devel/CAFEAcA9xCN6XMUFmZ_QAn617W14FAzi4D_H1mgSER10otTtQMQ@mail.gmail.com/
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260422080406.62638-2-philmd@linaro.org>
---
MAINTAINERS | 2 --
1 file changed, 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 54e15c04e59..ed8aeab421b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2270,7 +2270,6 @@ T: git https://github.com/jasowang/qemu.git net
Parallel NOR Flash devices
M: Philippe Mathieu-Daudé <philmd@linaro.org>
-T: git https://gitlab.com/philmd/qemu.git pflash-next
S: Maintained
F: hw/block/pflash_cfi*.c
F: include/hw/block/flash.h
@@ -2870,7 +2869,6 @@ F: include/hw/nvram/fw_cfg.h
F: include/standard-headers/linux/qemu_fw_cfg.h
F: tests/qtest/libqos/fw_cfg.c
F: tests/qtest/fw_cfg-test.c
-T: git https://github.com/philmd/qemu.git fw_cfg-next
XIVE
R: Gautam Menghani <gautam@linux.ibm.com>
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 46/48] MAINTAINERS: Remove my disfunctional emails
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (44 preceding siblings ...)
2026-04-22 19:57 ` [PULL 45/48] MAINTAINERS: Remove my unused git tree locations Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 47/48] MAINTAINERS: Remove PhilMD from NVMe Block Driver Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 48/48] MAINTAINERS: Transfer CI maintenance to Pierrick Philippe Mathieu-Daudé
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
With retrospective, mentioning email in authorship wasn't
really useful, more now than these addresses are dead:
- f4bug@amsat.org
- philmd@redhat.com
Simply remove them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20260422080406.62638-3-philmd@linaro.org>
---
hw/sd/sdmmc-internal.h | 2 +-
include/crypto/tls-cipher-suites.h | 2 +-
include/hw/i2c/arm_sbcon_i2c.h | 2 +-
include/hw/misc/bcm2835_thermal.h | 2 +-
include/hw/misc/led.h | 2 +-
include/hw/timer/bcm2835_systmr.h | 2 +-
include/qemu/units.h | 2 +-
crypto/tls-cipher-suites.c | 2 +-
hw/i386/fw_cfg.c | 2 +-
hw/i386/pc_sysfw_ovmf-stubs.c | 2 +-
hw/misc/bcm2835_thermal.c | 2 +-
hw/misc/led.c | 2 +-
hw/ppc/fw_cfg.c | 2 +-
hw/sd/sd.c | 2 +-
hw/timer/bcm2835_systmr.c | 2 +-
hw/usb/bus-stub.c | 2 +-
stubs/fw_cfg.c | 2 +-
stubs/hotplug-stubs.c | 2 +-
stubs/qdev.c | 2 +-
tests/qtest/fuzz-sb16-test.c | 2 +-
tests/qtest/fuzz-sdcard-test.c | 2 +-
tests/qtest/sdhci-test.c | 2 +-
tests/functional/aarch64/test_raspi3.py | 2 +-
tests/functional/arm/test_bflt.py | 2 +-
tests/functional/arm/test_raspi2.py | 2 +-
tests/functional/m68k/test_nextcube.py | 2 +-
tests/functional/mips/test_malta.py | 2 +-
tests/functional/mips64el/test_fuloong2e.py | 2 +-
tests/functional/mips64el/test_malta.py | 2 +-
tests/functional/mipsel/test_malta.py | 2 +-
tests/functional/ppc/test_40p.py | 2 +-
tests/functional/qemu_test/tesseract.py | 2 +-
32 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h
index c115f472efe..f9282a9712d 100644
--- a/hw/sd/sdmmc-internal.h
+++ b/hw/sd/sdmmc-internal.h
@@ -1,7 +1,7 @@
/*
* SD/MMC cards common
*
- * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
diff --git a/include/crypto/tls-cipher-suites.h b/include/crypto/tls-cipher-suites.h
index 3bd2003f32d..31697a7d6de 100644
--- a/include/crypto/tls-cipher-suites.h
+++ b/include/crypto/tls-cipher-suites.h
@@ -3,7 +3,7 @@
*
* Copyright (c) 2018-2020 Red Hat, Inc.
*
- * Author: Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Author: Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h
index 39b99f57bfb..537de428e1f 100644
--- a/include/hw/i2c/arm_sbcon_i2c.h
+++ b/include/hw/i2c/arm_sbcon_i2c.h
@@ -5,7 +5,7 @@
*
* Copyright (c) 2006-2007 CodeSourcery.
* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
- * Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2020 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h
index 13ffc61c1a7..04eda5cb83f 100644
--- a/include/hw/misc/bcm2835_thermal.h
+++ b/include/hw/misc/bcm2835_thermal.h
@@ -1,7 +1,7 @@
/*
* BCM2835 dummy thermal sensor
*
- * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2019 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/include/hw/misc/led.h b/include/hw/misc/led.h
index 4d077a7c43e..89ccbad4660 100644
--- a/include/hw/misc/led.h
+++ b/include/hw/misc/led.h
@@ -1,7 +1,7 @@
/*
* QEMU single LED device
*
- * Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2020 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
index 0674a18f12d..770e464937b 100644
--- a/include/hw/timer/bcm2835_systmr.h
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -1,7 +1,7 @@
/*
* BCM2835 SYS timer emulation
*
- * Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (c) 2019 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/include/qemu/units.h b/include/qemu/units.h
index 692db3fbb26..4764e301e5b 100644
--- a/include/qemu/units.h
+++ b/include/qemu/units.h
@@ -2,7 +2,7 @@
* IEC binary prefixes definitions
*
* Copyright (C) 2015 Nikunj A Dadhania, IBM Corporation
- * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2018 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/crypto/tls-cipher-suites.c b/crypto/tls-cipher-suites.c
index d9b61d0c08a..a6566f13c9b 100644
--- a/crypto/tls-cipher-suites.c
+++ b/crypto/tls-cipher-suites.c
@@ -3,7 +3,7 @@
*
* Copyright (c) 2018-2020 Red Hat, Inc.
*
- * Author: Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Author: Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index 5670e8553ea..858e6ca9c53 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -4,7 +4,7 @@
* Copyright (c) 2019 Red Hat, Inc.
*
* Author:
- * Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/hw/i386/pc_sysfw_ovmf-stubs.c b/hw/i386/pc_sysfw_ovmf-stubs.c
index b53906a0521..42e300ddec4 100644
--- a/hw/i386/pc_sysfw_ovmf-stubs.c
+++ b/hw/i386/pc_sysfw_ovmf-stubs.c
@@ -4,7 +4,7 @@
* Copyright (c) 2021 Red Hat, Inc.
*
* Author:
- * Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c
index 0dc1be15b4a..413c4179fed 100644
--- a/hw/misc/bcm2835_thermal.c
+++ b/hw/misc/bcm2835_thermal.c
@@ -1,7 +1,7 @@
/*
* BCM2835 dummy thermal sensor
*
- * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2019 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/hw/misc/led.c b/hw/misc/led.c
index d9256aaaf56..8b758c1b76d 100644
--- a/hw/misc/led.c
+++ b/hw/misc/led.c
@@ -1,7 +1,7 @@
/*
* QEMU single LED device
*
- * Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2020 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/hw/ppc/fw_cfg.c b/hw/ppc/fw_cfg.c
index a88b5c4bde2..071cf855c23 100644
--- a/hw/ppc/fw_cfg.c
+++ b/hw/ppc/fw_cfg.c
@@ -4,7 +4,7 @@
* Copyright (c) 2019 Red Hat, Inc.
*
* Author:
- * Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 37f6e0702b0..58275e7fa19 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -6,7 +6,7 @@
*
* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
* Copyright (c) 2007 CodeSourcery
- * Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
index 00bcfcd05c6..06a919b1f8b 100644
--- a/hw/timer/bcm2835_systmr.c
+++ b/hw/timer/bcm2835_systmr.c
@@ -1,7 +1,7 @@
/*
* BCM2835 SYS timer emulation
*
- * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2019 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/hw/usb/bus-stub.c b/hw/usb/bus-stub.c
index a7c3909e967..7cf1b494117 100644
--- a/hw/usb/bus-stub.c
+++ b/hw/usb/bus-stub.c
@@ -1,7 +1,7 @@
/*
* QEMU USB device emulation stubs
*
- * Copyright (C) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (C) 2021 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/stubs/fw_cfg.c b/stubs/fw_cfg.c
index bb1e3c8aa95..e7a9f714f35 100644
--- a/stubs/fw_cfg.c
+++ b/stubs/fw_cfg.c
@@ -4,7 +4,7 @@
* Copyright (c) 2019 Red Hat, Inc.
*
* Author:
- * Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/stubs/hotplug-stubs.c b/stubs/hotplug-stubs.c
index 23a1678dbbc..0f592ee1391 100644
--- a/stubs/hotplug-stubs.c
+++ b/stubs/hotplug-stubs.c
@@ -4,7 +4,7 @@
* Copyright (c) Red Hat
*
* Authors:
- * Philippe Mathieu-Daudé <philmd@redhat.com>,
+ * Philippe Mathieu-Daudé,
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/stubs/qdev.c b/stubs/qdev.c
index 7e957b3e524..61596de5f87 100644
--- a/stubs/qdev.c
+++ b/stubs/qdev.c
@@ -4,7 +4,7 @@
* Copyright (c) 2021 Red Hat, Inc.
*
* Author:
- * Philippe Mathieu-Daudé <philmd@redhat.com>
+ * Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*
diff --git a/tests/qtest/fuzz-sb16-test.c b/tests/qtest/fuzz-sb16-test.c
index fc445b18710..9995ad88685 100644
--- a/tests/qtest/fuzz-sb16-test.c
+++ b/tests/qtest/fuzz-sb16-test.c
@@ -1,7 +1,7 @@
/*
* QTest fuzzer-generated testcase for sb16 audio device
*
- * Copyright (c) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (c) 2021 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/tests/qtest/fuzz-sdcard-test.c b/tests/qtest/fuzz-sdcard-test.c
index cd134cdf556..6d8be9d1195 100644
--- a/tests/qtest/fuzz-sdcard-test.c
+++ b/tests/qtest/fuzz-sdcard-test.c
@@ -1,7 +1,7 @@
/*
* QTest fuzzer-generated testcase for sdcard device
*
- * Copyright (c) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Copyright (c) 2021 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
diff --git a/tests/qtest/sdhci-test.c b/tests/qtest/sdhci-test.c
index 7b32711c8f8..cde132228eb 100644
--- a/tests/qtest/sdhci-test.c
+++ b/tests/qtest/sdhci-test.c
@@ -1,7 +1,7 @@
/*
* QTest testcase for SDHCI controllers
*
- * Written by Philippe Mathieu-Daudé <f4bug@amsat.org>
+ * Written by Philippe Mathieu-Daudé
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
diff --git a/tests/functional/aarch64/test_raspi3.py b/tests/functional/aarch64/test_raspi3.py
index 74f6630ed26..ae9eed3589f 100755
--- a/tests/functional/aarch64/test_raspi3.py
+++ b/tests/functional/aarch64/test_raspi3.py
@@ -3,7 +3,7 @@
# Functional test that boots a Linux kernel on a Raspberry Pi machine
# and checks the console
#
-# Copyright (c) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) 2020 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: GPL-2.0-or-later
diff --git a/tests/functional/arm/test_bflt.py b/tests/functional/arm/test_bflt.py
index f273fc83546..835a3354a03 100755
--- a/tests/functional/arm/test_bflt.py
+++ b/tests/functional/arm/test_bflt.py
@@ -2,7 +2,7 @@
#
# Test the bFLT loader format
#
-# Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (C) 2019 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: GPL-2.0-or-later
diff --git a/tests/functional/arm/test_raspi2.py b/tests/functional/arm/test_raspi2.py
index d3c7aaa39b0..fe644f04cf4 100755
--- a/tests/functional/arm/test_raspi2.py
+++ b/tests/functional/arm/test_raspi2.py
@@ -3,7 +3,7 @@
# Functional test that boots a Linux kernel on a Raspberry Pi machine
# and checks the console
#
-# Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) 2019 Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: GPL-2.0-or-later
diff --git a/tests/functional/m68k/test_nextcube.py b/tests/functional/m68k/test_nextcube.py
index 71c160d0262..d917cf5424f 100755
--- a/tests/functional/m68k/test_nextcube.py
+++ b/tests/functional/m68k/test_nextcube.py
@@ -2,7 +2,7 @@
#
# Functional test that boots a VM and run OCR on the framebuffer
#
-# Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) 2019 Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or
# later. See the COPYING file in the top-level directory.
diff --git a/tests/functional/mips/test_malta.py b/tests/functional/mips/test_malta.py
index e8f49f130be..7048d91a9fd 100755
--- a/tests/functional/mips/test_malta.py
+++ b/tests/functional/mips/test_malta.py
@@ -2,7 +2,7 @@
#
# Functional tests for the big-endian 32-bit MIPS Malta board
#
-# Copyright (c) Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: GPL-2.0-or-later
diff --git a/tests/functional/mips64el/test_fuloong2e.py b/tests/functional/mips64el/test_fuloong2e.py
index 35e500b0221..d449e3c39a7 100755
--- a/tests/functional/mips64el/test_fuloong2e.py
+++ b/tests/functional/mips64el/test_fuloong2e.py
@@ -2,7 +2,7 @@
#
# Functional tests for the Lemote Fuloong-2E machine.
#
-# Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) 2019 Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
diff --git a/tests/functional/mips64el/test_malta.py b/tests/functional/mips64el/test_malta.py
index bc750cb7ad6..163bbaf5ca3 100755
--- a/tests/functional/mips64el/test_malta.py
+++ b/tests/functional/mips64el/test_malta.py
@@ -2,7 +2,7 @@
#
# Functional tests for the little-endian 64-bit MIPS Malta board
#
-# Copyright (c) Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
diff --git a/tests/functional/mipsel/test_malta.py b/tests/functional/mipsel/test_malta.py
index 59ab4a60585..25bcb33c945 100755
--- a/tests/functional/mipsel/test_malta.py
+++ b/tests/functional/mipsel/test_malta.py
@@ -2,7 +2,7 @@
#
# Functional tests for the little-endian 32-bit MIPS Malta board
#
-# Copyright (c) Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
diff --git a/tests/functional/ppc/test_40p.py b/tests/functional/ppc/test_40p.py
index ed272147f6e..4c1c9bad6ec 100755
--- a/tests/functional/ppc/test_40p.py
+++ b/tests/functional/ppc/test_40p.py
@@ -2,7 +2,7 @@
#
# Functional test that boots a PReP/40p machine and checks its serial console.
#
-# Copyright (c) Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or
# later. See the COPYING file in the top-level directory.
diff --git a/tests/functional/qemu_test/tesseract.py b/tests/functional/qemu_test/tesseract.py
index ede6c6501e2..862faec2d2e 100644
--- a/tests/functional/qemu_test/tesseract.py
+++ b/tests/functional/qemu_test/tesseract.py
@@ -1,6 +1,6 @@
# ...
#
-# Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+# Copyright (c) 2019 Philippe Mathieu-Daudé
#
# This work is licensed under the terms of the GNU GPL, version 2 or
# later. See the COPYING file in the top-level directory.
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 47/48] MAINTAINERS: Remove PhilMD from NVMe Block Driver
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (45 preceding siblings ...)
2026-04-22 19:57 ` [PULL 46/48] MAINTAINERS: Remove my disfunctional emails Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
2026-04-22 19:57 ` [PULL 48/48] MAINTAINERS: Transfer CI maintenance to Pierrick Philippe Mathieu-Daudé
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
I'm not following this code anymore, no need
to be listed as reviewer.
My gratitude to Stefan for everything he taught me while
supervising this topic. I truly appreciate the time he spent
helping me in many occasions. Thank you very much Stefan!
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20260422080406.62638-8-philmd@linaro.org>
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ed8aeab421b..05bcb5fc7fb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4253,7 +4253,6 @@ F: block/null.c
NVMe Block Driver
M: Stefan Hajnoczi <stefanha@redhat.com>
R: Fam Zheng <fam@euphon.net>
-R: Philippe Mathieu-Daudé <philmd@linaro.org>
L: qemu-block@nongnu.org
S: Supported
F: block/nvme*
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread* [PULL 48/48] MAINTAINERS: Transfer CI maintenance to Pierrick
2026-04-22 19:56 [PULL 00/49] Misc HW patches for 2026-04-22 Philippe Mathieu-Daudé
` (46 preceding siblings ...)
2026-04-22 19:57 ` [PULL 47/48] MAINTAINERS: Remove PhilMD from NVMe Block Driver Philippe Mathieu-Daudé
@ 2026-04-22 19:57 ` Philippe Mathieu-Daudé
47 siblings, 0 replies; 49+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-04-22 19:57 UTC (permalink / raw)
To: qemu-devel
Pass the torch to Pierrick who does much better and useful
work in this area: https://github.com/p-b-o/qemu-ci
Remove me from custom runner files since I don't have
contact with OSUOSL or IBM.
Cc: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260422080406.62638-11-philmd@linaro.org>
---
MAINTAINERS | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 05bcb5fc7fb..145011fd142 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4478,7 +4478,7 @@ Build and test automation
Build and test automation, general continuous integration
M: Alex Bennée <alex.bennee@linaro.org>
T: git https://gitlab.com/stsquad/qemu testing/next
-M: Philippe Mathieu-Daudé <philmd@linaro.org>
+M: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
S: Maintained
F: .github/workflows/lockdown.yml
F: .gitlab-ci.yml
@@ -4524,13 +4524,11 @@ F: .gitlab-ci.d/windows.yml
Guest Test Compilation Support
M: Alex Bennée <alex.bennee@linaro.org>
-R: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Maintained
F: tests/tcg/Makefile.target
GitLab custom runners (HW sponsored by Linaro, OSUOSL and IBM)
M: Alex Bennée <alex.bennee@linaro.org>
-M: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Maintained
F: .gitlab-ci.d/custom-runners/ubuntu-24.04-aarch64.yml
F: .gitlab-ci.d/custom-runners/ubuntu-24.04-s390x.yml
@@ -4565,6 +4563,7 @@ M: Paolo Bonzini <pbonzini@redhat.com>
R: Marc-André Lureau <marcandre.lureau@redhat.com>
R: Daniel P. Berrange <berrange@redhat.com>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
+R: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
S: Maintained
F: meson.build
F: meson_options.txt
--
2.53.0
^ permalink raw reply related [flat|nested] 49+ messages in thread