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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 16/28] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC
Date: Fri,  1 May 2026 11:14:53 +0100	[thread overview]
Message-ID: <20260501101505.3485916-17-peter.maydell@linaro.org> (raw)
In-Reply-To: <20260501101505.3485916-1-peter.maydell@linaro.org>

From: Mohamed Mediouni <mohamed@unpredictable.fr>

Misc changes needed for HVF vGIC enablement.

Note: x86_64 macOS exposes interrupt controller virtualisation since macOS 12.
Keeping an #ifdef here in case we end up supporting that...

However, given that x86_64 macOS is on its way out, it'll probably (?)
not be supported in QEMU.

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Message-id: 20260429190532.26538-4-mohamed@unpredictable.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 accel/hvf/hvf-all.c        | 46 ++++++++++++++++++++++++++++++++++++++
 accel/stubs/hvf-stub.c     |  1 +
 hw/arm/virt.c              | 23 +++++++++++++++----
 hw/intc/arm_gicv3_common.c |  3 +++
 include/system/hvf.h       |  3 +++
 system/vl.c                |  2 ++
 6 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c
index 5f357c6d19..add265e0c8 100644
--- a/accel/hvf/hvf-all.c
+++ b/accel/hvf/hvf-all.c
@@ -10,6 +10,8 @@
 
 #include "qemu/osdep.h"
 #include "qemu/error-report.h"
+#include "qapi/error.h"
+#include "qapi/qapi-visit-common.h"
 #include "accel/accel-ops.h"
 #include "exec/cpu-common.h"
 #include "system/address-spaces.h"
@@ -21,6 +23,7 @@
 #include "trace.h"
 
 bool hvf_allowed;
+bool hvf_kernel_irqchip;
 
 const char *hvf_return_string(hv_return_t ret)
 {
@@ -216,6 +219,43 @@ static int hvf_gdbstub_sstep_flags(AccelState *as)
     return SSTEP_ENABLE | SSTEP_NOIRQ;
 }
 
+static void hvf_set_kernel_irqchip(Object *obj, Visitor *v,
+                                   const char *name, void *opaque,
+                                   Error **errp)
+{
+    OnOffSplit mode;
+    if (!visit_type_OnOffSplit(v, name, &mode, errp)) {
+        return;
+    }
+
+    switch (mode) {
+    case ON_OFF_SPLIT_ON:
+#ifdef HOST_X86_64
+        /* macOS 12 onwards exposes an HVF virtual APIC. */
+        error_setg(errp, "HVF: kernel irqchip is not currently implemented for x86.");
+        break;
+#else
+        hvf_kernel_irqchip = true;
+        break;
+#endif
+
+    case ON_OFF_SPLIT_OFF:
+        hvf_kernel_irqchip = false;
+        break;
+
+    case ON_OFF_SPLIT_SPLIT:
+        error_setg(errp, "HVF: split irqchip is not supported on HVF.");
+        break;
+
+    default:
+        /*
+         * The value was checked in visit_type_OnOffSplit() above. If
+         * we get here, then something is wrong in QEMU.
+         */
+        abort();
+    }
+}
+
 static void hvf_accel_class_init(ObjectClass *oc, const void *data)
 {
     AccelClass *ac = ACCEL_CLASS(oc);
@@ -223,6 +263,12 @@ static void hvf_accel_class_init(ObjectClass *oc, const void *data)
     ac->init_machine = hvf_accel_init;
     ac->allowed = &hvf_allowed;
     ac->gdbstub_supported_sstep_flags = hvf_gdbstub_sstep_flags;
+    hvf_kernel_irqchip = false;
+    object_class_property_add(oc, "kernel-irqchip", "on|off|split",
+        NULL, hvf_set_kernel_irqchip,
+        NULL, NULL);
+    object_class_property_set_description(oc, "kernel-irqchip",
+        "Configure HVF irqchip");
 }
 
 static const TypeInfo hvf_accel_type = {
diff --git a/accel/stubs/hvf-stub.c b/accel/stubs/hvf-stub.c
index 42eadc5ca9..6bd08759ba 100644
--- a/accel/stubs/hvf-stub.c
+++ b/accel/stubs/hvf-stub.c
@@ -10,3 +10,4 @@
 #include "system/hvf.h"
 
 bool hvf_allowed;
+bool hvf_kernel_irqchip;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 77891f0820..47400214a2 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1163,7 +1163,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
      * interrupts; there are always 32 of the former (mandated by GIC spec).
      */
     qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32);
-    if (!kvm_irqchip_in_kernel()) {
+    if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) {
         qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure);
     }
 
@@ -1186,7 +1186,8 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
         qdev_prop_set_array(vms->gic, "redist-region-count",
                             redist_region_count);
 
-        if (!kvm_irqchip_in_kernel()) {
+        if (!kvm_irqchip_in_kernel() &&
+         !(hvf_enabled() && hvf_irqchip_in_kernel())) {
             if (vms->tcg_its) {
                 object_property_set_link(OBJECT(vms->gic), "sysmem",
                                          OBJECT(mem), &error_fatal);
@@ -1197,7 +1198,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
                                  ARCH_GIC_MAINT_IRQ);
         }
     } else {
-        if (!kvm_irqchip_in_kernel()) {
+        if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) {
             qdev_prop_set_bit(vms->gic, "has-virtualization-extensions",
                               vms->virt);
         }
@@ -2444,7 +2445,15 @@ static void finalize_gic_version(VirtMachineState *vms)
         accel_name = "KVM with kernel-irqchip=off";
     } else if (whpx_enabled()) {
         gics_supported |= VIRT_GIC_VERSION_3_MASK;
-    } else if (tcg_enabled() || hvf_enabled() || qtest_enabled())  {
+    } else if (hvf_enabled()) {
+        if (!hvf_irqchip_in_kernel()) {
+            gics_supported |= VIRT_GIC_VERSION_2_MASK;
+        }
+        /* Hypervisor.framework doesn't expose EL2<->1 transition notifiers */
+        if (!(!hvf_irqchip_in_kernel() && vms->virt)) {
+            gics_supported |= VIRT_GIC_VERSION_3_MASK;
+        }
+    } else if (tcg_enabled() || qtest_enabled())  {
         gics_supported |= VIRT_GIC_VERSION_2_MASK;
         if (module_object_class_by_name("arm-gicv3")) {
             gics_supported |= VIRT_GIC_VERSION_3_MASK;
@@ -2486,6 +2495,8 @@ static void finalize_msi_controller(VirtMachineState *vms)
             vms->msi_controller = VIRT_MSI_CTRL_GICV2M;
         } else if (whpx_enabled()) {
             vms->msi_controller = VIRT_MSI_CTRL_GICV2M;
+        }  else if (hvf_enabled() && hvf_irqchip_in_kernel()) {
+            vms->msi_controller = VIRT_MSI_CTRL_GICV2M;
         } else {
             vms->msi_controller = VIRT_MSI_CTRL_ITS;
         }
@@ -2505,6 +2516,10 @@ static void finalize_msi_controller(VirtMachineState *vms)
             error_report("ITS not supported on WHPX.");
             exit(1);
         }
+        if (hvf_enabled() && hvf_irqchip_in_kernel()) {
+            error_report("ITS not supported on HVF when using the hardware vGIC.");
+            exit(1);
+        }
     }
 
     assert(vms->msi_controller != VIRT_MSI_CTRL_AUTO);
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 9c3fb2f4bf..f7ba74e6d5 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -33,6 +33,7 @@
 #include "hw/arm/linux-boot-if.h"
 #include "system/kvm.h"
 #include "system/whpx.h"
+#include "system/hvf.h"
 
 
 static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs)
@@ -659,6 +660,8 @@ const char *gicv3_class_name(void)
         return "kvm-arm-gicv3";
     } else if (whpx_enabled()) {
         return TYPE_WHPX_GICV3;
+    } else if (hvf_enabled() && hvf_irqchip_in_kernel()) {
+        return TYPE_HVF_GICV3;
     } else {
         if (kvm_enabled()) {
             error_report("Userspace GICv3 is not supported with KVM");
diff --git a/include/system/hvf.h b/include/system/hvf.h
index d3dcf088b3..dc8da85979 100644
--- a/include/system/hvf.h
+++ b/include/system/hvf.h
@@ -26,8 +26,11 @@
 #ifdef CONFIG_HVF_IS_POSSIBLE
 extern bool hvf_allowed;
 #define hvf_enabled() (hvf_allowed)
+extern bool hvf_kernel_irqchip;
+#define hvf_irqchip_in_kernel()  (hvf_kernel_irqchip)
 #else /* !CONFIG_HVF_IS_POSSIBLE */
 #define hvf_enabled() 0
+#define hvf_irqchip_in_kernel() 0
 #endif /* !CONFIG_HVF_IS_POSSIBLE */
 
 #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf")
diff --git a/system/vl.c b/system/vl.c
index 0e1fc217b4..516ed7890b 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -1781,6 +1781,8 @@ static void qemu_apply_legacy_machine_options(QDict *qdict)
                                    false);
         object_register_sugar_prop(ACCEL_CLASS_NAME("whpx"), "kernel-irqchip", value,
                                    false);
+        object_register_sugar_prop(ACCEL_CLASS_NAME("hvf"), "kernel-irqchip", value,
+                                   false);
         qdict_del(qdict, "kernel-irqchip");
     }
 
-- 
2.43.0



  parent reply	other threads:[~2026-05-01 10:18 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-01 10:14 [PULL 00/28] target-arm queue Peter Maydell
2026-05-01 10:14 ` [PULL 01/28] hw/arm/fsl-imx8mp: Do not create redundant unimplemented devices Peter Maydell
2026-05-01 10:14 ` [PULL 02/28] hw/arm/fsl-imx8mp: Fix parent of ocram memory region Peter Maydell
2026-05-01 10:14 ` [PULL 03/28] Revert "sysbus: add irq_routing_notifier" Peter Maydell
2026-05-01 10:14 ` [PULL 04/28] linux-user/arm: Restrict regpairs_aligned Peter Maydell
2026-05-01 10:14 ` [PULL 05/28] qemu-options: Improve description for -smb option Peter Maydell
2026-05-01 10:14 ` [PULL 06/28] target/arm/cpu-features.c: New fields in AA64MMFR4 Peter Maydell
2026-05-01 10:14 ` [PULL 07/28] target/arm/cpu.h: New GPCCR fields Peter Maydell
2026-05-01 10:14 ` [PULL 08/28] target/arm/ptw.c: Add GDI spaces to the granule protection case Peter Maydell
2026-05-01 10:14 ` [PULL 09/28] tests/tcg/aarch64/system/rme_gdi.c: Very basic test of GDI Peter Maydell
2026-05-01 10:14 ` [PULL 10/28] docs/devel/decodetree: Fix formatting in "field examples" table Peter Maydell
2026-05-01 10:14 ` [PULL 11/28] hw/net/allwinner-sun8i-emac: Flush queued packets when rx is enabled Peter Maydell
2026-05-01 10:14 ` [PULL 12/28] hw/intc/arm_gicv3: Fix NS write to ICC_AP1Rn_EL1 when prebits < 7 Peter Maydell
2026-05-01 10:14 ` [PULL 13/28] target/arm/kvm: Cache host CPU probe failure Peter Maydell
2026-05-01 10:14 ` [PULL 14/28] hw/intc: Add hvf vGIC interrupt controller support Peter Maydell
2026-05-01 10:14 ` [PULL 15/28] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state Peter Maydell
2026-05-07  8:08   ` Philippe Mathieu-Daudé
2026-06-13 11:45   ` Philippe Mathieu-Daudé
2026-06-13 11:49     ` Mohamed Mediouni
2026-05-01 10:14 ` Peter Maydell [this message]
2026-05-01 10:14 ` [PULL 17/28] target/arm: hvf: instantiate GIC early Peter Maydell
2026-05-01 10:14 ` [PULL 18/28] hw/arm, target/arm: nested virtualisation on HVF Peter Maydell
2026-05-01 10:14 ` [PULL 19/28] hvf: only call hvf_sync_vtimer() when running without the platform vGIC Peter Maydell
2026-05-01 10:14 ` [PULL 20/28] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC Peter Maydell
2026-05-01 10:14 ` [PULL 21/28] hvf: arm: allow exposing minimal PMU for kernel-irqchip=on Peter Maydell
2026-05-01 10:14 ` [PULL 22/28] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC Peter Maydell
2026-05-01 10:15 ` [PULL 23/28] hvf: sync registers used at EL2 Peter Maydell
2026-05-01 10:59   ` Stefan Hajnoczi
2026-05-01 23:20     ` Mohamed Mediouni
2026-05-01 10:15 ` [PULL 24/28] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1 Peter Maydell
2026-05-01 10:15 ` [PULL 25/28] hvf: arm: disable SME when nested virt is active Peter Maydell
2026-05-01 10:15 ` [PULL 26/28] hvf: arm: physical timer emulation Peter Maydell
2026-05-01 10:15 ` [PULL 27/28] hvf: enable nested virtualisation support Peter Maydell
2026-05-01 10:15 ` [PULL 28/28] hvf: arm: enable vGIC by default for virt-11.1 and later Peter Maydell

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