From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 20/28] hvf: gate ARM_FEATURE_PMU register emulation when using the Apple vGIC
Date: Fri, 1 May 2026 11:14:57 +0100 [thread overview]
Message-ID: <20260501101505.3485916-21-peter.maydell@linaro.org> (raw)
In-Reply-To: <20260501101505.3485916-1-peter.maydell@linaro.org>
From: Mohamed Mediouni <mohamed@unpredictable.fr>
From Apple documentation:
> When EL2 is disabled, PMU register accesses trigger "Trapped MSR, MRS, or
> System Instruction" exceptions. When this happens, hv_vcpu_run() returns, and the
> hv_vcpu_exit_t object contains the information about this exception.
> When EL2 is enabled, the handling of PMU register accesses is determined by the PMUVer
> field of ID_AA64DFR0_EL1 register.
> If the PMUVer field value is zero or is invalid, PMU register accesses generate "Undefined"
> exceptions, which are sent to the guest.
> If the PMUVer field value is non-zero and valid, PMU register accesses are emulated by the framework.
> The ID_AA64DFR0_EL1 register can be modified via hv_vcpu_set_sys_reg API.
However, despite what that documentation says this is actually gated on using the Apple vGIC
instead of nested virtualisation per se. Apple introduced both at the same time.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-id: 20260429190532.26538-8-mohamed@unpredictable.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/hvf/hvf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index fa0a22fdc3..9d64f2e1a5 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1601,7 +1601,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)
ARMCPU *arm_cpu = ARM_CPU(cpu);
CPUARMState *env = &arm_cpu->env;
- if (arm_feature(env, ARM_FEATURE_PMU)) {
+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {
switch (reg) {
case SYSREG_PMCR_EL0:
*val = env->cp15.c9_pmcr;
@@ -1862,7 +1862,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
SYSREG_OP2(reg),
val);
- if (arm_feature(env, ARM_FEATURE_PMU)) {
+ if (!hvf_irqchip_in_kernel() && arm_feature(env, ARM_FEATURE_PMU)) {
switch (reg) {
case SYSREG_PMCCNTR_EL0:
pmu_op_start(env);
--
2.43.0
next prev parent reply other threads:[~2026-05-01 10:17 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 10:14 [PULL 00/28] target-arm queue Peter Maydell
2026-05-01 10:14 ` [PULL 01/28] hw/arm/fsl-imx8mp: Do not create redundant unimplemented devices Peter Maydell
2026-05-01 10:14 ` [PULL 02/28] hw/arm/fsl-imx8mp: Fix parent of ocram memory region Peter Maydell
2026-05-01 10:14 ` [PULL 03/28] Revert "sysbus: add irq_routing_notifier" Peter Maydell
2026-05-01 10:14 ` [PULL 04/28] linux-user/arm: Restrict regpairs_aligned Peter Maydell
2026-05-01 10:14 ` [PULL 05/28] qemu-options: Improve description for -smb option Peter Maydell
2026-05-01 10:14 ` [PULL 06/28] target/arm/cpu-features.c: New fields in AA64MMFR4 Peter Maydell
2026-05-01 10:14 ` [PULL 07/28] target/arm/cpu.h: New GPCCR fields Peter Maydell
2026-05-01 10:14 ` [PULL 08/28] target/arm/ptw.c: Add GDI spaces to the granule protection case Peter Maydell
2026-05-01 10:14 ` [PULL 09/28] tests/tcg/aarch64/system/rme_gdi.c: Very basic test of GDI Peter Maydell
2026-05-01 10:14 ` [PULL 10/28] docs/devel/decodetree: Fix formatting in "field examples" table Peter Maydell
2026-05-01 10:14 ` [PULL 11/28] hw/net/allwinner-sun8i-emac: Flush queued packets when rx is enabled Peter Maydell
2026-05-01 10:14 ` [PULL 12/28] hw/intc/arm_gicv3: Fix NS write to ICC_AP1Rn_EL1 when prebits < 7 Peter Maydell
2026-05-01 10:14 ` [PULL 13/28] target/arm/kvm: Cache host CPU probe failure Peter Maydell
2026-05-01 10:14 ` [PULL 14/28] hw/intc: Add hvf vGIC interrupt controller support Peter Maydell
2026-05-01 10:14 ` [PULL 15/28] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state Peter Maydell
2026-05-07 8:08 ` Philippe Mathieu-Daudé
2026-06-13 11:45 ` Philippe Mathieu-Daudé
2026-06-13 11:49 ` Mohamed Mediouni
2026-05-01 10:14 ` [PULL 16/28] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC Peter Maydell
2026-05-01 10:14 ` [PULL 17/28] target/arm: hvf: instantiate GIC early Peter Maydell
2026-05-01 10:14 ` [PULL 18/28] hw/arm, target/arm: nested virtualisation on HVF Peter Maydell
2026-05-01 10:14 ` [PULL 19/28] hvf: only call hvf_sync_vtimer() when running without the platform vGIC Peter Maydell
2026-05-01 10:14 ` Peter Maydell [this message]
2026-05-01 10:14 ` [PULL 21/28] hvf: arm: allow exposing minimal PMU for kernel-irqchip=on Peter Maydell
2026-05-01 10:14 ` [PULL 22/28] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC Peter Maydell
2026-05-01 10:15 ` [PULL 23/28] hvf: sync registers used at EL2 Peter Maydell
2026-05-01 10:59 ` Stefan Hajnoczi
2026-05-01 23:20 ` Mohamed Mediouni
2026-05-01 10:15 ` [PULL 24/28] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1 Peter Maydell
2026-05-01 10:15 ` [PULL 25/28] hvf: arm: disable SME when nested virt is active Peter Maydell
2026-05-01 10:15 ` [PULL 26/28] hvf: arm: physical timer emulation Peter Maydell
2026-05-01 10:15 ` [PULL 27/28] hvf: enable nested virtualisation support Peter Maydell
2026-05-01 10:15 ` [PULL 28/28] hvf: arm: enable vGIC by default for virt-11.1 and later Peter Maydell
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