From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 00/12] Add StarFive JHB100 syscon modules
Date: Tue, 12 May 2026 18:40:15 +0100 [thread overview]
Message-ID: <20260512-sponsor-glider-1c2d81fb6eae@spud> (raw)
In-Reply-To: <20260512083521.3448-1-changhuang.liang@starfivetech.com>
[-- Attachment #1: Type: text/plain, Size: 389 bytes --]
On Tue, May 12, 2026 at 01:35:09AM -0700, Changhuang Liang wrote:
> Changhuang Liang (12):
> dt-bindings: clock: Add system-0 domain PLL clock
> dt-bindings: clock: Add peripheral-0 domain PLL clock
> dt-bindings: clock: Add peripheral-1 domain PLL clock
> dt-bindings: reset: Add StarFive JHB100 reset generator
For these 4,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 00/12] Add StarFive JHB100 syscon modules
Date: Tue, 12 May 2026 18:40:15 +0100 [thread overview]
Message-ID: <20260512-sponsor-glider-1c2d81fb6eae@spud> (raw)
In-Reply-To: <20260512083521.3448-1-changhuang.liang@starfivetech.com>
[-- Attachment #1.1: Type: text/plain, Size: 389 bytes --]
On Tue, May 12, 2026 at 01:35:09AM -0700, Changhuang Liang wrote:
> Changhuang Liang (12):
> dt-bindings: clock: Add system-0 domain PLL clock
> dt-bindings: clock: Add peripheral-0 domain PLL clock
> dt-bindings: clock: Add peripheral-1 domain PLL clock
> dt-bindings: reset: Add StarFive JHB100 reset generator
For these 4,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-05-12 17:40 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 8:35 [PATCH v2 00/12] Add StarFive JHB100 syscon modules Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 01/12] dt-bindings: soc: starfive: " Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 17:38 ` Conor Dooley
2026-05-12 17:38 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 02/12] dt-bindings: clock: Add system-0 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-15 3:27 ` Changhuang Liang
2026-05-15 3:27 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 03/12] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 04/12] dt-bindings: clock: Add peripheral-0 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-14 14:25 ` Krzysztof Kozlowski
2026-05-12 8:35 ` [PATCH v2 05/12] clk: starfive: Add peripheral-0 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 06/12] dt-bindings: clock: Add peripheral-1 domain PLL clock Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 07/12] clk: starfive: Add Peripheral-1 domain PLL clock driver Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 08/12] dt-bindings: reset: Add StarFive JHB100 reset generator Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 09/12] reset: starfive: Introduce assert_polarity Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-15 9:24 ` Philipp Zabel
2026-05-15 9:24 ` Philipp Zabel
2026-05-12 8:35 ` [PATCH v2 10/12] reset: starfive: Add syscon reset driver support Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 8:35 ` [PATCH v2 11/12] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 17:45 ` Conor Dooley
2026-05-12 17:45 ` Conor Dooley
2026-05-13 1:01 ` Changhuang Liang
2026-05-13 1:01 ` Changhuang Liang
2026-05-13 19:16 ` Conor Dooley
2026-05-13 19:16 ` Conor Dooley
2026-05-14 1:07 ` Changhuang Liang
2026-05-14 1:07 ` Changhuang Liang
2026-05-14 17:50 ` Conor Dooley
2026-05-14 17:50 ` Conor Dooley
2026-05-12 8:35 ` [PATCH v2 12/12] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
2026-05-12 8:35 ` Changhuang Liang
2026-05-12 17:40 ` Conor Dooley [this message]
2026-05-12 17:40 ` [PATCH v2 00/12] Add StarFive JHB100 syscon modules Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260512-sponsor-glider-1c2d81fb6eae@spud \
--to=conor@kernel.org \
--cc=alchark@gmail.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=bmasney@redhat.com \
--cc=changhuang.liang@starfivetech.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=inochiama@gmail.com \
--cc=keguang.zhang@gmail.com \
--cc=kernel@esmil.dk \
--cc=krzk+dt@kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=pjw@kernel.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=tsbogend@alpha.franken.de \
--cc=unicorn_wang@outlook.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.