From: Yixun Lan <dlan@kernel.org>
To: Guodong Xu <guodong@riscstar.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Guodong Xu <docularxu@outlook.com>
Subject: Re: [PATCH] riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores
Date: Sat, 30 May 2026 03:03:19 +0000 [thread overview]
Message-ID: <20260530030319-GKG3748271@kernel.org> (raw)
In-Reply-To: <20260526-k3-ziccrse-v1-1-c759792ca3a3@riscstar.com>
Hi Guodong,
On 15:22 Tue 26 May , Guodong Xu wrote:
> Add the Ziccrse ISA extension to all eight X100 cores. Ziccrse
> provides a forward progress guarantee on LR/SC sequences in main
> memory regions with cacheability and coherence PMAs.
>
> The SpacemiT X100 core supports it per the SpacemiT K3 hardware
> specification.
>
> Signed-off-by: Guodong Xu <guodong@riscstar.com>
Looks good, I will queue it, thanks
Reviewed-by: Yixun lan <dlan@kernel.org>
--
Yixun Lan (dlan)
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WARNING: multiple messages have this Message-ID (diff)
From: Yixun Lan <dlan@kernel.org>
To: Guodong Xu <guodong@riscstar.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
Guodong Xu <docularxu@outlook.com>
Subject: Re: [PATCH] riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores
Date: Sat, 30 May 2026 03:03:19 +0000 [thread overview]
Message-ID: <20260530030319-GKG3748271@kernel.org> (raw)
In-Reply-To: <20260526-k3-ziccrse-v1-1-c759792ca3a3@riscstar.com>
Hi Guodong,
On 15:22 Tue 26 May , Guodong Xu wrote:
> Add the Ziccrse ISA extension to all eight X100 cores. Ziccrse
> provides a forward progress guarantee on LR/SC sequences in main
> memory regions with cacheability and coherence PMAs.
>
> The SpacemiT X100 core supports it per the SpacemiT K3 hardware
> specification.
>
> Signed-off-by: Guodong Xu <guodong@riscstar.com>
Looks good, I will queue it, thanks
Reviewed-by: Yixun lan <dlan@kernel.org>
--
Yixun Lan (dlan)
next prev parent reply other threads:[~2026-05-30 3:03 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 19:22 [PATCH] riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores Guodong Xu
2026-05-26 19:22 ` Guodong Xu
2026-05-28 5:18 ` Guodong Xu
2026-05-28 5:18 ` Guodong Xu
2026-05-29 6:21 ` Yixun Lan
2026-05-29 6:21 ` Yixun Lan
2026-05-29 13:22 ` Guodong Xu
2026-05-29 13:22 ` Guodong Xu
2026-05-30 3:01 ` Yixun Lan
2026-05-30 3:01 ` Yixun Lan
2026-05-30 3:03 ` Yixun Lan [this message]
2026-05-30 3:03 ` Yixun Lan
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