[PATCH v8 00/27] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe.

[PATCH v8 00/27] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe.

[Maarten Lankhorst]

New version, rebased with updates to pipeconf patch, and dropping upstreamed patch.

Still waiting for feedback on the vblank approach, and check to see if there are some
bugs left.

Hoping this passes BAT on i915, and still mostly the full run on xe.

For Xe, we also prohibit the use of DSM when CONFIG_PREEMPT_RT is enabled,
and avoid the use of DSM if we cannot take over the framebuffer from the
firmware.

Ideally we copy the framebuffer after intel_fbdev_init_bios(),
when we decide to preserve the framebuffer and the hardware is
completely initialized.

At that point we can use the migration engine to copy the contents over,
this can potentially be used for preserving the initial framebuffer
in the other cases where we cannot not use the initial FB too.

Maarten Lankhorst (21):
  drm/vblank_work: Add methods to schedule vblank_work in 2 stages
  drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event
  drm/intel/display: Make intel_crtc_arm_vblank_event static
  drm/intel/display: Convert vblank event handling to 2-stage arming
  drm/i915/display: Move vblank put until after critical section
  drm/i915/display: Remove locking from intel_vblank_evade critical
    section
  drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range
    too
  drm/i915/display: Make get_vblank_counter use intel_de_read_fw()
  drm/i915/display: Do not take uncore lock in i915_get_vblank_counter
  drm/i915/display: Make icl_dsi_frame_update use _fw too
  drm/i915/display: Use intel_de_read/write_fw in colorops
  drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset
  drm/i915/display: Make set_pipeconf use the fw variants
  drm/i915/gt: Fix selftests on PREEMPT_RT
  drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT
  drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo
  drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT
  PREEMPT_RT injection
  FOR-CI: bump MAX_STACK_TRACE_ENTRIES
  drm/xe/display: Always use system memory on PREEMPT_RT for DPT.
  drm/xe/display: Prefer not to allocate a framebuffers in stolen memory

Mike Galbraith (1):
  drm/i915: Use preempt_disable/enable_rt() where recommended

Sebastian Andrzej Siewior (5):
  drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() +
    spin_lock()
  drm/i915: Drop the irqs_disabled() check
  drm/i915/guc: Consider also RCU depth in busy loop.
  Revert "drm/i915: Depend on !PREEMPT_RT."
  drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

 drivers/gpu/drm/drm_vblank.c                  |  61 +++++++++-
 drivers/gpu/drm/drm_vblank_work.c             | 106 ++++++++++++----
 drivers/gpu/drm/i915/Kconfig                  |   1 -
 drivers/gpu/drm/i915/Kconfig.debug            |  15 ---
 drivers/gpu/drm/i915/display/i9xx_wm.c        |   4 -
 drivers/gpu/drm/i915/display/icl_dsi.c        |   4 +-
 drivers/gpu/drm/i915/display/intel_color.c    |   6 +-
 drivers/gpu/drm/i915/display/intel_crtc.c     |  86 ++++++-------
 drivers/gpu/drm/i915/display/intel_crtc.h     |   1 -
 drivers/gpu/drm/i915/display/intel_cursor.c   |   8 +-
 drivers/gpu/drm/i915/display/intel_de.h       |   8 ++
 drivers/gpu/drm/i915/display/intel_display.c  |  52 ++++----
 drivers/gpu/drm/i915/display/intel_vblank.c   | 115 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_vblank.h   |   1 +
 drivers/gpu/drm/i915/display/intel_vrr.c      |  18 +--
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c   |   8 +-
 .../gpu/drm/i915/gt/intel_breadcrumbs_types.h |   1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |   2 +-
 .../drm/i915/gt/intel_execlists_submission.c  |  17 +--
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c  |   8 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        |   2 +-
 drivers/gpu/drm/i915/i915_request.c           |   2 -
 drivers/gpu/drm/i915/intel_uncore.h           |  26 ++--
 drivers/gpu/drm/i915/selftests/igt_atomic.c   |   7 ++
 drivers/gpu/drm/xe/Kconfig.debug              |   5 +
 .../drm/xe/compat-i915-headers/intel_uncore.h |   7 ++
 drivers/gpu/drm/xe/display/xe_display_bo.c    |  35 ++----
 drivers/gpu/drm/xe/display/xe_fb_pin.c        |   8 --
 include/drm/drm_vblank.h                      |  14 ++-
 include/drm/drm_vblank_work.h                 |  12 ++
 kernel/Kconfig.preempt                        |   4 +-
 lib/Kconfig.debug                             |   5 +-
 32 files changed, 400 insertions(+), 249 deletions(-)

-- 
2.53.0

[PATCH v8 01/27] drm/vblank_work: Add methods to schedule vblank_work in 2 stages

[Maarten Lankhorst]

In case of vblank evasion in intel/display, it's necessary to
perform some work in advance, so the critical section will always run in
constant time on PREEMPT_RT.

By preparing all the work in advance, the part that needs to finish in
constant time only has to write a single variable instead. This allows
PREEMPT_RT to keep the interrupts disabled at the most critical part,
without completely reworking all locks to be raw spinlocks.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/drm_vblank_work.c | 106 ++++++++++++++++++++++--------
 include/drm/drm_vblank_work.h     |  12 ++++
 2 files changed, 92 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank_work.c b/drivers/gpu/drm/drm_vblank_work.c
index 70f0199251ea0..6acb240b9c112 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -54,7 +54,8 @@ void drm_handle_vblank_works(struct drm_vblank_crtc *vblank)
 	assert_spin_locked(&vblank->dev->event_lock);
 
 	list_for_each_entry_safe(work, next, &vblank->pending_work, node) {
-		if (!drm_vblank_passed(count, work->count))
+		/* READ_ONCE pairs with WRITE_ONCE in drm_vblank_work_enable() */
+		if (!READ_ONCE(work->armed) || !drm_vblank_passed(count, work->count))
 			continue;
 
 		list_del_init(&work->node);
@@ -86,30 +87,8 @@ void drm_vblank_cancel_pending_works(struct drm_vblank_crtc *vblank)
 	wake_up_all(&vblank->work_wait_queue);
 }
 
-/**
- * drm_vblank_work_schedule - schedule a vblank work
- * @work: vblank work to schedule
- * @count: target vblank count
- * @nextonmiss: defer until the next vblank if target vblank was missed
- *
- * Schedule @work for execution once the crtc vblank count reaches @count.
- *
- * If the crtc vblank count has already reached @count and @nextonmiss is
- * %false the work starts to execute immediately.
- *
- * If the crtc vblank count has already reached @count and @nextonmiss is
- * %true the work is deferred until the next vblank (as if @count has been
- * specified as crtc vblank count + 1).
- *
- * If @work is already scheduled, this function will reschedule said work
- * using the new @count. This can be used for self-rearming work items.
- *
- * Returns:
- * %1 if @work was successfully (re)scheduled, %0 if it was either already
- * scheduled or cancelled, or a negative error code on failure.
- */
-int drm_vblank_work_schedule(struct drm_vblank_work *work,
-			     u64 count, bool nextonmiss)
+static int __drm_vblank_work_schedule(struct drm_vblank_work *work,
+				      u64 count, bool nextonmiss, bool armed)
 {
 	struct drm_vblank_crtc *vblank = work->vblank;
 	struct drm_device *dev = vblank->dev;
@@ -139,6 +118,7 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 		rescheduling = true;
 	}
 
+	work->armed = armed;
 	work->count = count;
 	cur_vbl = drm_vblank_count(dev, vblank->pipe);
 	passed = drm_vblank_passed(cur_vbl, count);
@@ -147,7 +127,7 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 			     "crtc %d vblank %llu already passed (current %llu)\n",
 			     vblank->pipe, count, cur_vbl);
 
-	if (!nextonmiss && passed) {
+	if (!nextonmiss && passed && armed) {
 		drm_vblank_put(dev, vblank->pipe);
 		ret = kthread_queue_work(vblank->worker, &work->base);
 
@@ -167,8 +147,82 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
 		wake_up_all(&vblank->work_wait_queue);
 	return ret;
 }
+
+/**
+ * drm_vblank_work_schedule - schedule a vblank work
+ * @work: vblank work to schedule
+ * @count: target vblank count
+ * @nextonmiss: defer until the next vblank if target vblank was missed
+ *
+ * Schedule @work for execution once the crtc vblank count reaches @count.
+ *
+ * If the crtc vblank count has already reached @count and @nextonmiss is
+ * %false the work starts to execute immediately.
+ *
+ * If the crtc vblank count has already reached @count and @nextonmiss is
+ * %true the work is deferred until the next vblank (as if @count has been
+ * specified as crtc vblank count + 1).
+ *
+ * If @work is already scheduled, this function will reschedule said work
+ * using the new @count. This can be used for self-rearming work items.
+ *
+ * Returns:
+ * %1 if @work was successfully (re)scheduled, %0 if it was either already
+ * scheduled or cancelled, or a negative error code on failure.
+ */
+int drm_vblank_work_schedule(struct drm_vblank_work *work,
+			     u64 count, bool nextonmiss)
+{
+	return __drm_vblank_work_schedule(work, count, nextonmiss, true);
+}
 EXPORT_SYMBOL(drm_vblank_work_schedule);
 
+
+/**
+ * drm_vblank_work_schedule_disabled - schedule a vblank work, withoug enabling
+ * @work: vblank work to schedule
+ * @count: target vblank count
+ *
+ * Schedule @work for execution once the crtc vblank count reaches @count.
+ *
+ * The vblank work will not be scheduled until drm_vblank_work_enable() is called.
+ * If the crtc vblank count has already reached @count, the work will still
+ * not be scheduled until the first following vblank.
+ *
+ * If @work is already scheduled, this function will reschedule said work
+ * using the new @count. This can be used for self-rearming work items.
+ *
+ * Returns:
+ * %1 if @work was successfully (re)scheduled, %0 if it was either already
+ * scheduled or cancelled, or a negative error code on failure.
+ */
+int drm_vblank_work_schedule_disabled(struct drm_vblank_work *work, u64 count)
+{
+	return __drm_vblank_work_schedule(work, count, true, false);
+}
+EXPORT_SYMBOL(drm_vblank_work_schedule_disabled);
+
+/**
+ * drm_vblank_work_enable - enable vblank work
+ * @work: vblank work to enable
+ *
+ * This function is specifically only for when drm_vblank_work_schedule_disabled() is
+ * called. It allows for the work to be armed in any context, without any locks.
+ *
+ * The work will be signalled earliest at the @count argument, if it has been passed,
+ * it will signalled at the next vblank.
+ *
+ * This is particularly useful for PREEMPT_RT, where the spin_lock is converted
+ * into a sleeping rtmutex, and vblank evasion requires some work to be
+ * scheduled on completion with interrupts disabled.
+ */
+void drm_vblank_work_enable(struct drm_vblank_work *work)
+{
+	WARN_ON(work->armed);
+	WRITE_ONCE(work->armed, true);
+}
+EXPORT_SYMBOL(drm_vblank_work_enable);
+
 /**
  * drm_vblank_work_cancel_sync - cancel a vblank work and wait for it to
  * finish executing
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index e04d436b72973..e19351200da24 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -47,6 +47,14 @@ struct drm_vblank_work {
 	 */
 	int cancelling;
 
+	/**
+	 * @armed: If false, the work item has been added to the
+	 * drm_vblank_crtc.pending_work list, but will not yet be signalled.
+	 *
+	 * Call drm_vblank_work_enable() to fire on next vblank.
+	 */
+	bool armed;
+
 	/**
 	 * @node: The position of this work item in
 	 * &drm_vblank_crtc.pending_work.
@@ -64,6 +72,10 @@ struct drm_vblank_work {
 
 int drm_vblank_work_schedule(struct drm_vblank_work *work,
 			     u64 count, bool nextonmiss);
+
+int drm_vblank_work_schedule_disabled(struct drm_vblank_work *work, u64 count);
+void drm_vblank_work_enable(struct drm_vblank_work *work);
+
 void drm_vblank_work_init(struct drm_vblank_work *work, struct drm_crtc *crtc,
 			  void (*func)(struct kthread_work *work));
 bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
-- 
2.53.0

Re: [PATCH v8 01/27] drm/vblank_work: Add methods to schedule vblank_work in 2 stages

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] drm_vblank_work_schedule() fails to update the `armed` state if the target vblank count matches the currently scheduled count, causing state mismatches and resource leaks.
- [Low] Plain reads and writes to `work->armed` race with concurrent lockless accesses, causing potential compiler reordering issues.
--

commit 541484cf3b17ab53b7e81696c1a0711cae54129c
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/vblank_work: Add methods to schedule vblank_work in 2 stages

This commit introduces a 2-stage mechanism for scheduling vblank work. It
allows PREEMPT_RT systems to prepare work in advance, and then arm it later
using a lockless function to maintain constant execution times in disabled
interrupt contexts.

> diff --git a/drivers/gpu/drm/drm_vblank_work.c b/drivers/gpu/drm/drm_vblank_work.c
> index 70f0199251ea0..6acb240b9c112 100644
> --- a/drivers/gpu/drm/drm_vblank_work.c
> +++ b/drivers/gpu/drm/drm_vblank_work.c
[ ... ]
> @@ -139,6 +118,7 @@ int drm_vblank_work_schedule(struct drm_vblank_work *work,
>  		rescheduling = true;
>  	}
>  

[Severity: Medium]
If a driver calls drm_vblank_work_schedule_disabled() followed by
drm_vblank_work_schedule() with the exact same count to enable it, does the
early exit for matching counts bypass updating the armed state?

For example, if __drm_vblank_work_schedule() in
drivers/gpu/drm/drm_vblank_work.c takes this path earlier in the function:

	} else if (work->count == count) {
		/* Already scheduled w/ same vbl count */
		goto out;

If the work item remains unarmed after returning, could this regression leak
the hardware vblank reference since the item will never execute or be removed
from the pending list?

[Severity: Low]
Since the armed state is read locklessly by drm_handle_vblank_works() and
modified locklessly by drm_vblank_work_enable(), should this plain write in
__drm_vblank_work_schedule() use WRITE_ONCE() to prevent C data races and
compiler reordering regressions?

> +	work->armed = armed;
>  	work->count = count;
>  	cur_vbl = drm_vblank_count(dev, vblank->pipe);
>  	passed = drm_vblank_passed(cur_vbl, count);
[ ... ]
> +/**
> + * drm_vblank_work_enable - enable vblank work
> + * @work: vblank work to enable
> + *
> + * This function is specifically only for when drm_vblank_work_schedule_disabled() is
> + * called. It allows for the work to be armed in any context, without any locks.
> + *
> + * The work will be signalled earliest at the @count argument, if it has been passed,
> + * it will signalled at the next vblank.
> + *
> + * This is particularly useful for PREEMPT_RT, where the spin_lock is converted
> + * into a sleeping rtmutex, and vblank evasion requires some work to be
> + * scheduled on completion with interrupts disabled.
> + */
> +void drm_vblank_work_enable(struct drm_vblank_work *work)
> +{

[Severity: Low]
Because drm_vblank_work_enable() in drivers/gpu/drm/drm_vblank_work.c is
designed to be called locklessly, does this plain read of work->armed race
with concurrent modifications?

Should this use READ_ONCE() to avoid KCSAN warnings and compiler optimization
regressions?

> +	WARN_ON(work->armed);
> +	WRITE_ONCE(work->armed, true);
> +}
> +EXPORT_SYMBOL(drm_vblank_work_enable);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=1

[PATCH v8 02/27] drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event

[Maarten Lankhorst]

When trying to fix the hardware programming in intel/display, I had
to take all the vblank locks with local_irqs_disabled(). This
required converting the entire vblank code to raw spinlocks.

In the alternative approach, do all preparations in advance, and only
enable the vblank_event with interrupts disabled, this requires only
a simple write and prevents a complete re-architecture of the code.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/drm_vblank.c | 61 +++++++++++++++++++++++++++++++++++-
 include/drm/drm_vblank.h     | 14 ++++++++-
 2 files changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index f90fb2d13e423..6856eff97dc97 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -1127,12 +1127,68 @@ void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,
 
 	assert_spin_locked(&dev->event_lock);
 
+	WARN_ON(e->postponed);
 	e->pipe = pipe;
 	e->sequence = drm_crtc_accurate_vblank_count(crtc) + 1;
 	list_add_tail(&e->base.link, &dev->vblank_event_list);
 }
 EXPORT_SYMBOL(drm_crtc_arm_vblank_event);
 
+/**
+ * drm_crtc_prepare_arm_vblank_event - arm vblank event *before* pageflip.
+ * @crtc: the source CRTC of the vblank event
+ * @e: the event to send
+ *
+ * See drm_crtc_arm_vblank_event(). This function is a 2-stage version of
+ * that call. This function is called *BEFORE* programming the hardware.
+ *
+ * After programming, call drm_crtc_arm_prepared_vblank_event() and the
+ * event will be scheduled on the next vblank.
+ *
+ * This is mainly useful for code that has to run on PREEMPT_RT kernels,
+ * with interrupts disabled, since all vblank spinlocks are converted to
+ * rtmutexes, and code running with irqs disabled cannot take any vblank lock.
+ *
+ * It also increases determinism for any hardware
+ * programming, since no vblank related locks are taking when arming.
+ */
+void drm_crtc_prepare_arm_vblank_event(struct drm_crtc *crtc,
+				       struct drm_pending_vblank_event *e)
+{
+	drm_crtc_arm_vblank_event(crtc, e);
+
+	/* Set the flag, so that the event is not fired yet */
+	e->postponed = true;
+}
+EXPORT_SYMBOL(drm_crtc_prepare_arm_vblank_event);
+
+/**
+ * drm_crtc_arm_prepared_vblank_event - arm prepared vblank event *after* pageflip.
+ * @crtc: the source CRTC of the vblank event
+ * @e: the event to send
+ *
+ * See drm_crtc_prepare_arm_vblank_event(). This function is a 2-stage version of
+ * that call. This function is called directly *AFTER* programming the hardware.
+ *
+ * Before this function is called, drm_crtc_prepare_arm_vblank_event() should be
+ * called instead.
+ *
+ * This is mainly useful for code that has to run on PREEMPT_RT kernels,
+ * with interrupts disabled, since all vblank spinlocks are converted to
+ * rtmutexes, and code running with irqs disabled cannot take any vblank lock.
+ *
+ * It also increases determinism for any hardware
+ * programming, since no vblank related locks are taking when arming.
+ */
+void drm_crtc_arm_prepared_vblank_event(struct drm_pending_vblank_event *e)
+{
+	WARN_ON(!e->postponed);
+
+	/* remove the flag to be processed as a normal event */
+	WRITE_ONCE(e->postponed, false);
+}
+EXPORT_SYMBOL(drm_crtc_arm_prepared_vblank_event);
+
 /**
  * drm_crtc_send_vblank_event - helper to send vblank event after pageflip
  * @crtc: the source CRTC of the vblank event
@@ -1390,6 +1446,8 @@ void drm_crtc_vblank_off(struct drm_crtc *crtc)
 	list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
 		if (e->pipe != pipe)
 			continue;
+
+		WARN_ON(e->postponed);
 		drm_dbg_core(dev, "Sending premature vblank event on disable: "
 			     "wanted %llu, current %llu\n",
 			     e->sequence, seq);
@@ -1892,7 +1950,8 @@ static void drm_handle_vblank_events(struct drm_device *dev, unsigned int pipe)
 	seq = drm_vblank_count_and_time(dev, pipe, &now);
 
 	list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
-		if (e->pipe != pipe)
+		/* Matches WRITE_ONCE in drm_crtc_arm_prepared_vblank_event() */
+		if (e->pipe != pipe || READ_ONCE(e->postponed))
 			continue;
 		if (!drm_vblank_passed(seq, e->sequence))
 			continue;
diff --git a/include/drm/drm_vblank.h b/include/drm/drm_vblank.h
index 2fcef9c0f5b1b..956d5621eb7f9 100644
--- a/include/drm/drm_vblank.h
+++ b/include/drm/drm_vblank.h
@@ -53,6 +53,13 @@ struct drm_pending_vblank_event {
 	 * @sequence: frame event should be triggered at
 	 */
 	u64 sequence;
+
+	/**
+	 * @postponed: whether drm_crtc_prepare_arm_vblank_event() is called,
+	 * and drm_crtc_arm_prepared_vblank_event has yet to be called to arm.
+	 */
+	bool postponed;
+
 	/**
 	 * @event: Actual event which will be sent to userspace.
 	 */
@@ -294,7 +301,12 @@ int drm_crtc_next_vblank_start(struct drm_crtc *crtc, ktime_t *vblanktime);
 void drm_crtc_send_vblank_event(struct drm_crtc *crtc,
 			       struct drm_pending_vblank_event *e);
 void drm_crtc_arm_vblank_event(struct drm_crtc *crtc,
-			      struct drm_pending_vblank_event *e);
+			       struct drm_pending_vblank_event *e);
+
+void drm_crtc_prepare_arm_vblank_event(struct drm_crtc *crtc,
+				       struct drm_pending_vblank_event *e);
+void drm_crtc_arm_prepared_vblank_event(struct drm_pending_vblank_event *e);
+
 void drm_vblank_set_event(struct drm_pending_vblank_event *e,
 			  u64 *seq,
 			  ktime_t *now);
-- 
2.53.0

Re: [PATCH v8 02/27] drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing memory barrier in drm_crtc_arm_prepared_vblank_event() allows premature vblank signaling.
--

commit 876541f26b4001b93fb6f0b7d16d814d3b08e2b0
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event

This patch introduces a two-stage mechanism for arming vblank events to
support PREEMPT_RT kernels and increase determinism. It allows the event
to be prepared before hardware programming and armed afterward, avoiding
the need to take vblank locks with local interrupts disabled.

> diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
> index f90fb2d13e423..6856eff97dc97 100644
> --- a/drivers/gpu/drm/drm_vblank.c
> +++ b/drivers/gpu/drm/drm_vblank.c

[ ... ]

> +/**
> + * drm_crtc_arm_prepared_vblank_event - arm prepared vblank event *after* pageflip.
> + * @crtc: the source CRTC of the vblank event
> + * @e: the event to send
> + *
> + * See drm_crtc_prepare_arm_vblank_event(). This function is a 2-stage version of
> + * that call. This function is called directly *AFTER* programming the hardware.
> + *

[ ... ]

> +void drm_crtc_arm_prepared_vblank_event(struct drm_pending_vblank_event *e)
> +{
> +	WARN_ON(!e->postponed);
> +
> +	/* remove the flag to be processed as a normal event */
> +	WRITE_ONCE(e->postponed, false);

[Severity: High]
Could this memory update be reordered with the prior MMIO writes on weakly
ordered architectures?

Since this function is intended to be called immediately after hardware
programming, there might be an ordering issue. For instance, on ARM64,
functions like writel() guarantee that prior memory accesses complete before
the MMIO write, but they do not provide a memory barrier after the write.

This means the CPU could reorder the WRITE_ONCE() update to occur before the
MMIO writes are globally observed. If a concurrent hardware vblank interrupt
is serviced by another CPU, drm_handle_vblank_events() might observe the
cleared postponed flag and signal the event to userspace prematurely.

If userspace receives the event and frees the old framebuffer before the new
hardware state takes effect, could it lead to the hardware scanning out
unmapped memory and triggering IOMMU faults or display corruption? Would
adding a wmb() here ensure the MMIO writes are properly ordered against the
flag update?

> +}
> +EXPORT_SYMBOL(drm_crtc_arm_prepared_vblank_event);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=2

[PATCH v8 03/27] drm/intel/display: Make intel_crtc_arm_vblank_event static

[Maarten Lankhorst]

Only used inside intel_crtc.c now, so no need to export it any more.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
 drivers/gpu/drm/i915/display/intel_crtc.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 10ed9bdfee763..805645318747f 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -684,7 +684,7 @@ static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
 #endif
 
-void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
+static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	unsigned long irqflags;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h b/drivers/gpu/drm/i915/display/intel_crtc.h
index 12507b51ee77e..f65cbafe2b42a 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.h
+++ b/drivers/gpu/drm/i915/display/intel_crtc.h
@@ -33,7 +33,6 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
 			     int usecs);
 int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode,
 			     int scanlines);
-void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state);
 void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
 				     struct drm_pending_vblank_event **event);
 u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state);
-- 
2.53.0

[PATCH v8 04/27] drm/intel/display: Convert vblank event handling to 2-stage arming

[Maarten Lankhorst]

This is converts the vblank functions to be called with interrupts
disabled, even on PREEMPT_RT kernels.

Because the PREEMPT_RT kernel converts all spinlocks to rt-mutexes,
the normal vblank functions cannot be used inside the critical section.

Instead, prepare the vblank at the start, and then enable the vblank
work after the hardware programming is completed.

This allows us to keep programming the hardware with interrupts
disabled, and still schedule completion on PREEMPT_RT on next vblank.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 84 ++++++++++++-----------
 1 file changed, 44 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 805645318747f..34a159f7c9a43 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -527,6 +527,10 @@ static void intel_crtc_vblank_work_init(struct intel_crtc_state *crtc_state)
 
 	drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,
 			     intel_crtc_vblank_work);
+
+	drm_vblank_work_schedule_disabled(&crtc_state->vblank_work,
+					  drm_crtc_accurate_vblank_count(&crtc->base) + 1);
+
 	/*
 	 * Interrupt latency is critical for getting the vblank
 	 * work executed as early as possible during the vblank.
@@ -571,6 +575,21 @@ int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode,
 				adjusted_mode->crtc_clock);
 }
 
+static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	unsigned long irqflags;
+
+	if (!crtc_state->uapi.event)
+		return;
+
+	drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);
+
+	spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
+	drm_crtc_prepare_arm_vblank_event(&crtc->base, crtc_state->uapi.event);
+	spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
+}
+
 /**
  * intel_pipe_update_start() - start update of a set of display registers
  * @state: the atomic state
@@ -607,6 +626,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
 
 	if (intel_crtc_needs_vblank_work(new_crtc_state))
 		intel_crtc_vblank_work_init(new_crtc_state);
+	else
+		intel_crtc_arm_vblank_event(new_crtc_state);
 
 	if (state->base.legacy_cursor_update) {
 		struct intel_plane *plane;
@@ -684,23 +705,6 @@ static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
 #endif
 
-static void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state)
-{
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	unsigned long irqflags;
-
-	if (!crtc_state->uapi.event)
-		return;
-
-	drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);
-
-	spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
-	drm_crtc_arm_vblank_event(&crtc->base, crtc_state->uapi.event);
-	spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
-
-	crtc_state->uapi.event = NULL;
-}
-
 void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
 				     struct drm_pending_vblank_event **event)
 {
@@ -754,29 +758,10 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	 * event outside of the critical section - the spinlock might spin for a
 	 * while ... */
 	if (intel_crtc_needs_vblank_work(new_crtc_state)) {
-		drm_vblank_work_schedule(&new_crtc_state->vblank_work,
-					 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
-					 false);
-	} else {
-		intel_crtc_arm_vblank_event(new_crtc_state);
-	}
-
-	if (state->base.legacy_cursor_update) {
-		struct intel_plane *plane;
-		struct intel_plane_state *old_plane_state;
-		int i;
-
-		for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {
-			if (old_plane_state->hw.crtc == &crtc->base &&
-			    old_plane_state->unpin_work.vblank) {
-				drm_vblank_work_schedule(&old_plane_state->unpin_work,
-							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
-							 false);
-
-				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */
-				memset(&state->base.planes[i], 0, sizeof(state->base.planes[i]));
-			}
-		}
+		drm_vblank_work_enable(&new_crtc_state->vblank_work);
+	} else if (new_crtc_state->uapi.event) {
+		drm_crtc_arm_prepared_vblank_event(new_crtc_state->uapi.event);
+		new_crtc_state->uapi.event = NULL;
 	}
 
 	/*
@@ -800,6 +785,25 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 
 	local_irq_enable();
 
+	/* Run after local_irq_enable(), not timing sensitive */
+	if (state->base.legacy_cursor_update) {
+		struct intel_plane *plane;
+		struct intel_plane_state *old_plane_state;
+		int i;
+
+		for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {
+			if (old_plane_state->hw.crtc == &crtc->base &&
+			    old_plane_state->unpin_work.vblank) {
+				drm_vblank_work_schedule(&old_plane_state->unpin_work,
+							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
+							 false);
+
+				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */
+				memset(&state->base.planes[i], 0, sizeof(state->base.planes[i]));
+			}
+		}
+	}
+
 	if (intel_parent_vgpu_active(display))
 		goto out;
 
-- 
2.53.0

Re: [PATCH v8 04/27] drm/intel/display: Convert vblank event handling to 2-stage arming

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Vblank events and workers execute one frame too early if vblank evasion occurs, causing premature page flip completions and potential use-after-free.
--

commit 4b140829cb62a6227f3079e278066d8cfb9ea1b4
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/intel/display: Convert vblank event handling to 2-stage arming

This converts the vblank functions to be called with interrupts disabled,
even on PREEMPT_RT kernels.

> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 365267c79e54f..6b71810803139 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -527,6 +527,10 @@ static void intel_crtc_vblank_work_init(struct intel_crtc_state *crtc_state)
>  
>  	drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,
>  			     intel_crtc_vblank_work);
> +
> +	drm_vblank_work_schedule_disabled(&crtc_state->vblank_work,
> +					  drm_crtc_accurate_vblank_count(&crtc->base) + 1);
> +
>  	/*
>  	 * Interrupt latency is critical for getting the vblank
>  	 * work executed as early as possible during the vblank.

[ ... ]

> @@ -607,6 +626,8 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
>  
>  	if (intel_crtc_needs_vblank_work(new_crtc_state))
>  		intel_crtc_vblank_work_init(new_crtc_state);
> +	else
> +		intel_crtc_arm_vblank_event(new_crtc_state);
>  
>  	if (state->base.legacy_cursor_update) {
>  		struct intel_plane *plane;

[ ... ]

> @@ -754,29 +758,10 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
>  	 * event outside of the critical section - the spinlock might spin for a
>  	 * while ... */
>  	if (intel_crtc_needs_vblank_work(new_crtc_state)) {
> -		drm_vblank_work_schedule(&new_crtc_state->vblank_work,
> -					 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
> -					 false);
> -	} else {
> -		intel_crtc_arm_vblank_event(new_crtc_state);
> -	}
> -
> -	if (state->base.legacy_cursor_update) {
> -		struct intel_plane *plane;
> -		struct intel_plane_state *old_plane_state;
> -		int i;
> -
> -		for_each_old_intel_plane_in_state(state, plane, old_plane_state, i) {
> -			if (old_plane_state->hw.crtc == &crtc->base &&
> -			    old_plane_state->unpin_work.vblank) {
> -				drm_vblank_work_schedule(&old_plane_state->unpin_work,
> -							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
> -							 false);
> -
> -				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */
> -				memset(&state->base.planes[i], 0, sizeof(state->base.planes[i]));
> -			}
> -		}
> +		drm_vblank_work_enable(&new_crtc_state->vblank_work);
> +	} else if (new_crtc_state->uapi.event) {
> +		drm_crtc_arm_prepared_vblank_event(new_crtc_state->uapi.event);
> +		new_crtc_state->uapi.event = NULL;
>  	}

[Severity: High]
If intel_vblank_evade() spins and the hardware vblank counter increments,
will the target sequence number calculated earlier in
intel_pipe_update_start() become stale?

Since intel_crtc_vblank_work_init() and intel_crtc_arm_vblank_event() now
run before evasion, the target sequence is calculated as N + 1. If evasion
occurs, the counter increments to N + 1, and the hardware will latch the
new state at N + 2.

When drm_vblank_work_enable() or drm_crtc_arm_prepared_vblank_event() are
called here, they are still targeted for N + 1. Could this result in the
event firing immediately and signaling completion one frame before the
hardware actually latches the new display state, potentially leading to
premature freeing of the old framebuffer?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=4

[PATCH v8 05/27] drm/i915/display: Move vblank put until after critical section

[Maarten Lankhorst]

drm_crtc_vblank_put may take some locks, this should probably
not be the first thing we do after entering the time sensitive
part.

A better place is after programming is completed. Add a flag
to put the vblank after completion.

In the case of drm_vblank_work_schedule, we may not even need
to disable the vblank interrupt any more if it takes its own
reference.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 88384dea868b4..68b44a00567e4 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -816,6 +816,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 		to_intel_crtc_state(crtc->base.state);
 	struct intel_crtc_state *new_crtc_state;
 	struct intel_vblank_evade_ctx evade;
+	bool has_vblank = false;
 	int ret;
 
 	/*
@@ -913,6 +914,8 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 	intel_psr_lock(crtc_state);
 
 	if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
+		has_vblank = true;
+
 		/*
 		 * TODO: maybe check if we're still in PSR
 		 * and skip the vblank evasion entirely?
@@ -922,8 +925,6 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 		local_irq_disable();
 
 		intel_vblank_evade(&evade);
-
-		drm_crtc_vblank_put(&crtc->base);
 	} else {
 		local_irq_disable();
 	}
@@ -939,6 +940,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
 
 	intel_psr_unlock(crtc_state);
 
+	if (has_vblank)
+		drm_crtc_vblank_put(&crtc->base);
+
 	if (old_plane_state->ggtt_vma != new_plane_state->ggtt_vma) {
 		drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,
 				     intel_cursor_unpin_work);
-- 
2.53.0

Re: [PATCH v8 05/27] drm/i915/display: Move vblank put until after critical section

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Calling drm_crtc_vblank_put() before drm_vblank_work_schedule() drops the vblank reference prematurely, causing an unnecessary hardware vblank interrupt disable/enable ping-pong.
--

commit dab5c95932db89533ab47f96a5f94a420c7489c9
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Move vblank put until after critical section

This patch moves the vblank put operation out of a critical section to
prevent taking locks during time-sensitive code in
intel_legacy_cursor_update().

> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
[ ... ]
> @@ -939,6 +940,9 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
>  
>  	intel_psr_unlock(crtc_state);
>  
> +	if (has_vblank)
> +		drm_crtc_vblank_put(&crtc->base);
> +
>  	if (old_plane_state->ggtt_vma != new_plane_state->ggtt_vma) {
>  		drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,
>  				     intel_cursor_unpin_work);
>  
>  		drm_vblank_work_schedule(&old_plane_state->unpin_work,
>  					 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
>  					 false);

[Severity: Medium]
The commit message notes that we might not need to disable the vblank
interrupt if drm_vblank_work_schedule() takes its own reference. 

However, because drm_crtc_vblank_put() drops the reference right before
the if-block, could the reference count drop to zero and trigger an
unnecessary hardware vblank interrupt disable? 

If that happens, drm_vblank_work_schedule() taking a new reference just
below would immediately re-enable it, creating an unnecessary disable/enable
ping-pong.

Would moving the drm_crtc_vblank_put() call below the work scheduling block
better achieve the optimization mentioned in the commit message?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=5

[PATCH v8 06/27] drm/i915/display: Remove locking from intel_vblank_evade critical section

[Maarten Lankhorst]

finish_wait() may take a lock, which means that it can take any amount
of time. On PREEMPT-RT we should not be taking any lock after disabling
preemption, so ensure that the completion is done before disabling
interrupts.

This also has the benefit of making vblank evasion more deterministic,
by performing the final vblank check after all locking is done.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_crtc.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_vblank.c | 30 +++++++++------------
 drivers/gpu/drm/i915/display/intel_vblank.h |  1 +
 3 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 34a159f7c9a43..8218938985b41 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -734,7 +734,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	enum pipe pipe = crtc->pipe;
-	int scanline_end = intel_get_crtc_scanline(crtc);
+	int scanline_end = __intel_get_crtc_scanline(crtc);
 	u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
 	ktime_t end_vbl_time = ktime_get();
 
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 28d81199792ef..ca08059e088ea 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -241,7 +241,7 @@ int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
  * intel_de_read_fw(), only for fast reads of display block, no need for
  * forcewake etc.
  */
-static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
+int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
 	struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);
@@ -732,6 +732,16 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
 		evade->min -= vblank_delay;
 }
 
+static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *scanline, bool unlocked)
+{
+	if (unlocked)
+		*scanline = intel_get_crtc_scanline(evade->crtc);
+	else
+		*scanline = __intel_get_crtc_scanline(evade->crtc);
+
+	return *scanline < evade->min || *scanline > evade->max;
+}
+
 /* must be called with vblank interrupt already enabled! */
 int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 {
@@ -739,24 +749,12 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 	struct intel_display *display = to_intel_display(crtc);
 	long timeout = msecs_to_jiffies_timeout(1);
 	wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
-	DEFINE_WAIT(wait);
 	int scanline;
 
 	if (evade->min <= 0 || evade->max <= 0)
 		return 0;
 
-	for (;;) {
-		/*
-		 * prepare_to_wait() has a memory barrier, which guarantees
-		 * other CPUs can see the task state update by the time we
-		 * read the scanline.
-		 */
-		prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
-
-		scanline = intel_get_crtc_scanline(crtc);
-		if (scanline < evade->min || scanline > evade->max)
-			break;
-
+	while (!scanline_in_safe_range(evade, &scanline, false)) {
 		if (!timeout) {
 			drm_dbg_kms(display->drm,
 				    "Potential atomic update failure on pipe %c\n",
@@ -766,13 +764,11 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 
 		local_irq_enable();
 
-		timeout = schedule_timeout(timeout);
+		timeout = wait_event_timeout(*wq, scanline_in_safe_range(evade, &scanline, true), timeout);
 
 		local_irq_disable();
 	}
 
-	finish_wait(wq, &wait);
-
 	/*
 	 * On VLV/CHV DSI the scanline counter would appear to
 	 * increment approx. 1/3 of a scanline before start of vblank.
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h
index 98d04cacd65f8..aa1974400e9fc 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.h
+++ b/drivers/gpu/drm/i915/display/intel_vblank.h
@@ -38,6 +38,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc);
 bool intel_crtc_get_vblank_timestamp(struct drm_crtc *crtc, int *max_error,
 				     ktime_t *vblank_time, bool in_vblank_irq);
 int intel_get_crtc_scanline(struct intel_crtc *crtc);
+int __intel_get_crtc_scanline(struct intel_crtc *crtc);
 void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc);
 void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc);
 void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
-- 
2.53.0

Re: [PATCH v8 06/27] drm/i915/display: Remove locking from intel_vblank_evade critical section

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [High] Bypassing `uncore->lock` during vblank evasion allows concurrent MMIO accesses, leading to hardware hangs on older platforms like Ivybridge and Haswell.

Pre-existing issues:
- [High] drm_crtc_vblank_put() can acquire the sleeping lock dev->vbl_lock while local IRQs are disabled, causing a BUG on PREEMPT_RT.
--

commit 8b19163d6f27afde254220a0f64b5572fb1ac0f0
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Remove locking from intel_vblank_evade critical section

This commit avoids calling sleeping functions with local interrupts disabled
during vblank evasion to fix PREEMPT_RT bugs. It also replaces
intel_get_crtc_scanline() with __intel_get_crtc_scanline() in unlocked
contexts to prevent taking spinlocks.

> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 6b71810803139..89d1091a56805 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -734,7 +734,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
>  	struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	enum pipe pipe = crtc->pipe;
> -	int scanline_end = intel_get_crtc_scanline(crtc);
> +	int scanline_end = __intel_get_crtc_scanline(crtc);

[Severity: High]
Does bypassing uncore->lock here and in scanline_in_safe_range() risk
hardware hangs on older platforms?

By using __intel_get_crtc_scanline() inside the local_irq_disable() critical
section, the code performs raw MMIO reads that bypass the lock. Older
platforms like Ivybridge and Haswell require all register accesses to the
same cacheline to be serialized via uncore->lock.

Could this concurrent MMIO access cause those platforms to hang?

>  	u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
>  	ktime_t end_vbl_time = ktime_get();

[ ... ]

> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 28d81199792ef..ca08059e088ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
[ ... ]
> @@ -739,24 +749,12 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
>  	struct intel_display *display = to_intel_display(crtc);
>  	long timeout = msecs_to_jiffies_timeout(1);
>  	wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
> -	DEFINE_WAIT(wait);
>  	int scanline;
>  
>  	if (evade->min <= 0 || evade->max <= 0)
>  		return 0;

[Severity: High]
This is a pre-existing issue, but does the critical section surrounding
intel_vblank_evade() still have a PREEMPT_RT bug?

In intel_pipe_update_start(), local_irq_disable() is called before the
evasion loop. Immediately after the loop, drm_crtc_vblank_put() is called,
still within the IRQ-disabled section.

If drm_vblank_offdelay is set to < 0, drm_crtc_vblank_put() synchronously
calls vblank_disable_fn(), which acquires dev->vbl_lock. On PREEMPT_RT,
dev->vbl_lock maps to a sleeping rt_mutex, which triggers a sleeping in
atomic context BUG when acquired with local IRQs disabled.

Is this something that needs to be addressed for PREEMPT_RT?

>  
> -	for (;;) {
> -		/*
> -		 * prepare_to_wait() has a memory barrier, which guarantees
> -		 * other CPUs can see the task state update by the time we
> -		 * read the scanline.
> -		 */
> -		prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
> -
> -		scanline = intel_get_crtc_scanline(crtc);
> -		if (scanline < evade->min || scanline > evade->max)
> -			break;
> -
> +	while (!scanline_in_safe_range(evade, &scanline, false)) {
>  		if (!timeout) {
>  			drm_dbg_kms(display->drm,
>  				    "Potential atomic update failure on pipe %c\n",

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=6

[PATCH v8 07/27] drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too

[Maarten Lankhorst]

Now that we have a macro, might as well handle the VLV dsi workaround
too.

This makes the vblank evasion code slightly more deterministic, by not
looping with interrupts disabled.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 36 ++++++++++-----------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index ca08059e088ea..6f1fa952b5391 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -739,6 +739,24 @@ static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *sc
 	else
 		*scanline = __intel_get_crtc_scanline(evade->crtc);
 
+	/*
+	 * On VLV/CHV DSI the scanline counter would appear to
+	 * increment approx. 1/3 of a scanline before start of vblank.
+	 * The registers still get latched at start of vblank however.
+	 * This means we must not write any registers on the first
+	 * line of vblank (since not the whole line is actually in
+	 * vblank). And unfortunately we can't use the interrupt to
+	 * wait here since it will fire too soon. We could use the
+	 * frame start interrupt instead since it will fire after the
+	 * critical scanline, but that would require more changes
+	 * in the interrupt code. So for now we'll just do the nasty
+	 * thing and poll for the bad scanline to pass us by.
+	 *
+	 * FIXME figure out if BXT+ DSI suffers from this as well
+	 */
+	if (evade->need_vlv_dsi_wa && *scanline == evade->vblank_start)
+		return false;
+
 	return *scanline < evade->min || *scanline > evade->max;
 }
 
@@ -769,24 +787,6 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 		local_irq_disable();
 	}
 
-	/*
-	 * On VLV/CHV DSI the scanline counter would appear to
-	 * increment approx. 1/3 of a scanline before start of vblank.
-	 * The registers still get latched at start of vblank however.
-	 * This means we must not write any registers on the first
-	 * line of vblank (since not the whole line is actually in
-	 * vblank). And unfortunately we can't use the interrupt to
-	 * wait here since it will fire too soon. We could use the
-	 * frame start interrupt instead since it will fire after the
-	 * critical scanline, but that would require more changes
-	 * in the interrupt code. So for now we'll just do the nasty
-	 * thing and poll for the bad scanline to pass us by.
-	 *
-	 * FIXME figure out if BXT+ DSI suffers from this as well
-	 */
-	while (evade->need_vlv_dsi_wa && scanline == evade->vblank_start)
-		scanline = intel_get_crtc_scanline(crtc);
-
 	return scanline;
 }
 
-- 
2.53.0

Re: [PATCH v8 07/27] drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Moving the VLV/CHV DSI scanline workaround into a sleeping wait condition causes missed vblanks and 1ms timeouts.
--

commit 73c9aa3755ab5a555f9a46d12d2906f90594656d
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too

This commit moves the VLV/CHV DSI scanline workaround from a busy-wait loop
in the intel_vblank_evade function into the scanline_in_safe_range helper.
The goal is to make the vblank evasion more deterministic by reducing the
time spent looping with interrupts disabled.

> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index ca08059e088ea..6f1fa952b5391 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -739,6 +739,24 @@ static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *sc
>  	else
>  		*scanline = __intel_get_crtc_scanline(evade->crtc);
>  
> +	/*
> +	 * On VLV/CHV DSI the scanline counter would appear to

[ ... ]

> +	 * FIXME figure out if BXT+ DSI suffers from this as well
> +	 */
> +	if (evade->need_vlv_dsi_wa && *scanline == evade->vblank_start)
> +		return false;
> +

[Severity: High]
Does moving this condition into scanline_in_safe_range() cause a stall during
atomic commits?

Because scanline_in_safe_range() is used as the condition for sleeping in
intel_vblank_evade():

intel_vblank_evade() {
    ...
    timeout = wait_event_timeout(*wq,
        scanline_in_safe_range(evade, &scanline, true), timeout);
    ...
}

When the vblank interrupt fires and wakes the waitqueue, the scanline counter
will still read as evade->vblank_start, since the hardware leaves it at that
value for a full scanline duration.

Since scanline equals evade->vblank_start, scanline_in_safe_range() returns
false, causing wait_event_timeout() to put the thread back to sleep.

As no further vblank interrupts will fire for this frame, will the thread
sleep for the entire 1ms timeout, leading to a regression with missed vblanks
and dropped frames?

>  	return *scanline < evade->min || *scanline > evade->max;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=7

[PATCH v8 08/27] drm/i915: Use preempt_disable/enable_rt() where recommended

[Maarten Lankhorst]

From: Mike Galbraith <umgwanakikbuti@gmail.com>

Mario Kleiner suggest in commit
  ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.")

a spots where preemption should be disabled on PREEMPT_RT. The
difference is that on PREEMPT_RT the intel_uncore::lock disables neither
preemption nor interrupts and so region remains preemptible.

The area covers only register reads and writes. The part that worries me
is:
- __intel_get_crtc_scanline() the worst case is 100us if no match is
  found.

- intel_crtc_scanlines_since_frame_timestamp() not sure how long this
  may take in the worst case.

It was in the RT queue for a while and nobody complained.
Disable preemption on PREEPMPT_RT during timestamping.

[bigeasy: patch description.]

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Mike Galbraith <umgwanakikbuti@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 43 ++++++++++++++++-----
 1 file changed, 33 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 6f1fa952b5391..07dca05332e5b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -316,6 +316,20 @@ static void intel_vblank_section_exit(struct intel_display *display)
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	spin_unlock(&uncore->lock);
 }
+
+static void intel_vblank_section_enter_irqf(struct intel_display *display, unsigned long *flags)
+	__acquires(i915->uncore.lock)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_lock_irqsave(&uncore->lock, *flags);
+}
+
+static void intel_vblank_section_exit_irqf(struct intel_display *display, unsigned long flags)
+	__releases(i915->uncore.lock)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_unlock_irqrestore(&uncore->lock, flags);
+}
 #else
 static void intel_vblank_section_enter(struct intel_display *display)
 {
@@ -324,6 +338,17 @@ static void intel_vblank_section_enter(struct intel_display *display)
 static void intel_vblank_section_exit(struct intel_display *display)
 {
 }
+
+static void intel_vblank_section_enter_irqf(struct intel_display *display, unsigned long *flags)
+{
+	*flags = 0;
+}
+
+static void intel_vblank_section_exit_irqf(struct intel_display *display, unsigned long flags)
+{
+	if (flags)
+		return;
+}
 #endif
 
 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
@@ -360,10 +385,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	 * timing critical raw register reads, potentially with
 	 * preemption disabled, so the following code must not block.
 	 */
-	local_irq_save(irqflags);
-	intel_vblank_section_enter(display);
+	intel_vblank_section_enter_irqf(display, &irqflags);
 
-	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+	if (IS_ENABLED(CONFIG_PREEMPT_RT))
+		preempt_disable();
 
 	/* Get optional system timestamp before query. */
 	if (stime)
@@ -427,10 +452,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 	if (etime)
 		*etime = ktime_get();
 
-	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
+	if (IS_ENABLED(CONFIG_PREEMPT_RT))
+		preempt_enable();
 
-	intel_vblank_section_exit(display);
-	local_irq_restore(irqflags);
+	intel_vblank_section_exit_irqf(display, irqflags);
 
 	/*
 	 * While in vblank, position will be negative
@@ -468,13 +493,11 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
 	unsigned long irqflags;
 	int position;
 
-	local_irq_save(irqflags);
-	intel_vblank_section_enter(display);
+	intel_vblank_section_enter_irqf(display, &irqflags);
 
 	position = __intel_get_crtc_scanline(crtc);
 
-	intel_vblank_section_exit(display);
-	local_irq_restore(irqflags);
+	intel_vblank_section_exit_irqf(display, irqflags);
 
 	return position;
 }
-- 
2.53.0

Re: [PATCH v8 08/27] drm/i915: Use preempt_disable/enable_rt() where recommended

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Removal of atomic context protection (interrupt and preemption disabling) during time-critical vblank register reads for the Xe driver on non-RT kernels.
--

commit 4b863f1335422d07b094a5072752ea5c148f7cbc
Author: Mike Galbraith <umgwanakikbuti@gmail.com>

drm/i915: Use preempt_disable/enable_rt() where recommended

This commit replaces unconditional local_irq_save() calls with a new
intel_vblank_section_enter_irqf() helper and adds conditional
preempt_disable() for PREEMPT_RT during vblank timestamping.

> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 6f1fa952b5391..07dca05332e5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
[ ... ]
> @@ -324,6 +338,17 @@ static void intel_vblank_section_enter(struct intel_display *display)
>  static void intel_vblank_section_exit(struct intel_display *display)
>  {
>  }
> +
> +static void intel_vblank_section_enter_irqf(struct intel_display *display, unsigned long *flags)
> +{
> +	*flags = 0;
> +}
> +
> +static void intel_vblank_section_exit_irqf(struct intel_display *display, unsigned long flags)
> +{
> +	if (flags)
> +		return;
> +}
>  #endif
>  
>  static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
> @@ -360,10 +385,10 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>  	 * timing critical raw register reads, potentially with
>  	 * preemption disabled, so the following code must not block.
>  	 */
> -	local_irq_save(irqflags);
> -	intel_vblank_section_enter(display);
> +	intel_vblank_section_enter_irqf(display, &irqflags);
>  
> -	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
> +	if (IS_ENABLED(CONFIG_PREEMPT_RT))
> +		preempt_disable();

[Severity: High]
Does this leave the timing-critical vblank register reads completely
unprotected on non-RT kernels when the #else path is taken?

Previously, local_irq_save() was unconditionally called to protect the
timestamping delta. With this change, the #else implementation of
intel_vblank_section_enter_irqf() is a no-op. Because preempt_disable()
is now strictly guarded by CONFIG_PREEMPT_RT, a standard non-RT kernel
taking this path executes with both interrupts and preemption enabled.

Could this allow random latency spikes during context switches or
interrupts, artificially inflating the delta between stime and etime
and resulting in timestamping failures?

>  
>  	/* Get optional system timestamp before query. */
>  	if (stime)
[ ... ]
> @@ -468,13 +493,11 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
>  	unsigned long irqflags;
>  	int position;
>  
> -	local_irq_save(irqflags);
> -	intel_vblank_section_enter(display);
> +	intel_vblank_section_enter_irqf(display, &irqflags);
>  
>  	position = __intel_get_crtc_scanline(crtc);
>  
> -	intel_vblank_section_exit(display);
> -	local_irq_restore(irqflags);
> +	intel_vblank_section_exit_irqf(display, irqflags);

[Severity: High]
Similarly, does this leave __intel_get_crtc_scanline() entirely unprotected
from interrupts and preemption when the #else path is used on non-RT kernels?

>  
>  	return position;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=8

[PATCH v8 09/27] drm/i915/display: Make get_vblank_counter use intel_de_read_fw()

[Maarten Lankhorst]

Fixes the following lockdep splat on PREEMPT_RT:
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
<3> in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1373, name: xe_module_load
<3> preempt_count: 1, expected: 0
<3> RCU nest depth: 0, expected: 0
<4> 11 locks held by xe_module_load/1373:
<4>  #0: ffff888107b691a0 (&dev->mutex){....}-{3:3}, at: __driver_attach+0x104/0x220
<4>  #1: ffff88813cd30280 (&dev->clientlist_mutex){+.+.}-{3:3}, at: drm_client_register+0x32/0xe0
<4>  #2: ffffffff837f88f8 (registration_lock){+.+.}-{3:3}, at: register_framebuffer+0x1b/0x50
<4>  #3: ffffffff835985e0 (console_lock){+.+.}-{0:0}, at: fbcon_fb_registered+0x6f/0x90
<4>  #4: ffff88812589e6a0 (&helper->lock){+.+.}-{3:3}, at: __drm_fb_helper_restore_fbdev_mode_unlocked+0x7b/0x110
<4>  #5: ffff88813cd30158 (&dev->master_mutex){+.+.}-{3:3}, at: drm_master_internal_acquire+0x20/0x50
<4>  #6: ffff88812589e488 (&client->modeset_mutex){+.+.}-{3:3}, at: drm_client_modeset_commit_locked+0x2a/0x1b0
<4>  #7: ffffc9000031eef0 (crtc_ww_class_acquire){+.+.}-{0:0}, at: drm_client_modeset_commit_atomic+0x4c/0x2b0
<4>  #8: ffffc9000031ef18 (crtc_ww_class_mutex){+.+.}-{3:3}, at: drm_client_modeset_commit_atomic+0x4c/0x2b0
<4>  #9: ffff888114f7b8b8 (&intel_dp->psr.lock){+.+.}-{3:3}, at: intel_psr_lock+0xc5/0xf0 [xe]
<4>  #10: ffff88812a0cbbc0 (&wl->lock){+.+.}-{2:2}, at: intel_dmc_wl_get+0x3c/0x140 [xe]

This splat will happen otherwise on all tracepoints too, for similar reasons.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 07dca05332e5b..c0cc0a4c25dbe 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -132,7 +132,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc)
 	if (!vblank->max_vblank_count)
 		return 0;
 
-	return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe));
+	return intel_de_read_fw(display, PIPE_FRMCOUNT_G4X(display, pipe));
 }
 
 static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
-- 
2.53.0

Re: [PATCH v8 09/27] drm/i915/display: Make get_vblank_counter use intel_de_read_fw()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] Bypassing uncore->lock serialization by using intel_de_read_fw() causes machine hangs on older architectures like Ivybridge.
- [High] intel_de_read_fw() bypasses the DMC wakelock, causing powered-off register reads during the vblank disable timer.

Pre-existing issues:
- [High] drm_crtc_vblank_put() is called with hardware interrupts disabled, leading to a sleeping-in-atomic bug on PREEMPT_RT.
--

commit cfe5d45290a062b6a0335162bbb5cd6c13db5e3d
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Make get_vblank_counter use intel_de_read_fw()

This commit changes g4x_get_vblank_counter() to use intel_de_read_fw()
to avoid a sleeping-in-atomic lockdep splat on PREEMPT_RT.

> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 07dca05332e5b..c0cc0a4c25dbe 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -132,7 +132,7 @@ u32 g4x_get_vblank_counter(struct drm_crtc *crtc)
>  	if (!vblank->max_vblank_count)
>  		return 0;
>  
> -	return intel_de_read(display, PIPE_FRMCOUNT_G4X(display, pipe));
> +	return intel_de_read_fw(display, PIPE_FRMCOUNT_G4X(display, pipe));

[Severity: High]
Does bypassing the uncore->lock serialization here risk cacheline concurrent
access bugs on older architectures like Ivybridge?

As documented in intel_de.h, unlocked MMIO accessors can cause machine hangs
on older platforms if the same cacheline is accessed concurrently by different
clients. PIPE_FRMCOUNT_G4X shares a cacheline with registers like
PIPE_FRMTMSTMP.

Since this is called holding only the vbl_lock, could an underrun interrupt
handler or other subsystem access the same cacheline concurrently without
holding vbl_lock and cause a hang?


[Severity: High]
Can using the fw variant here cause a read from a powered-off register?

By using intel_de_read_fw(), this bypasses the display microcontroller wakelock.
If g4x_get_vblank_counter() is called by drm_update_vblank_count() during the
asynchronous vblank_disable_fn() timer, the display engine pipeline might be
in a deep power-saving state like DC5/DC6.

Would reading this register while powered off return garbage and cause a
massive jump in the vblank counter?

[ ... ]
>  static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
>  {
[ ... ]
>  	do {
>  		/*
>  		 * This field provides read back of the display
>  		 * pipe frame time stamp. The time stamp value
>  		 * is sampled at every start of vertical blank.
>  		 */
>  		scan_prev_time = intel_de_read_fw(display,
>  						  PIPE_FRMTMSTMP(crtc->pipe));

[Severity: High]
This isn't a bug introduced by this patch, but the same DC5 power state bug
seems to exist here.

Because intel_crtc_scanlines_since_frame_timestamp() also uses
intel_de_read_fw(), could it also suffer from the exact same issue and
read garbage if called during the disable timer?


While reviewing the atomic context handling for vblank locks, I noticed a
related pattern in drivers/gpu/drm/i915/display/intel_crtc.c:

intel_pipe_update_start() {
        ...
	local_irq_disable();

	crtc->debug.min_vbl = evade.min;
	crtc->debug.max_vbl = evade.max;
	trace_intel_pipe_update_start(crtc);

	scanline = intel_vblank_evade(&evade);

	drm_crtc_vblank_put(&crtc->base);
        ...
}

[Severity: High]
This isn't a bug introduced by this patch, but is it safe to call
drm_crtc_vblank_put() here with hardware interrupts disabled?

If offdelay_ms is set to less than zero, drm_vblank_put() synchronously
calls vblank_disable_fn(), which attempts to acquire the dev->vbl_lock
spinlock.

On PREEMPT_RT, spinlock_t becomes a sleeping rt_mutex. Would attempting to
acquire this sleeping lock while hardware interrupts are disabled cause an
atomic context violation and a lockdep splat?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=9

[PATCH v8 10/27] drm/i915/display: Do not take uncore lock in i915_get_vblank_counter

[Maarten Lankhorst]

This fixes a lockdep splat that occurs in the code that should be run
with interrupts disabled. The uncore and DMC locks should not be taken
and released repeatedly in a timing sensitive path.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_de.h       |  8 ++++++
 drivers/gpu/drm/i915/display/intel_vblank.c   |  4 +--
 drivers/gpu/drm/i915/intel_uncore.h           | 26 +++++++++++++------
 .../drm/xe/compat-i915-headers/intel_uncore.h |  7 +++++
 4 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 1029790194296..497a308322847 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -65,6 +65,14 @@ intel_de_read64_2x32(struct intel_display *display, intel_reg_t reg)
 	return (u64)upper << 32 | lower;
 }
 
+static inline u64
+intel_de_read64_2x32_fw(struct intel_display *display,
+			i915_reg_t lower_reg, i915_reg_t upper_reg)
+{
+	return intel_uncore_read64_2x32_fw(__to_uncore(display),
+					   lower_reg, upper_reg);
+}
+
 static inline void
 intel_de_posting_read(struct intel_display *display, intel_reg_t reg)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index c0cc0a4c25dbe..5ca22899055d7 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
 	 * we get a low value that's stable across two reads of the high
 	 * register.
 	 */
-	frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
-					      PIPEFRAME(display, pipe));
+	frame = intel_de_read64_2x32_fw(display, PIPEFRAMEPIXEL(display, pipe),
+				        PIPEFRAME(display, pipe));
 
 	pixel = frame & PIPE_PIXEL_MASK;
 	frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index fafc2ca9a2376..507398a562649 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -449,13 +449,28 @@ static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
 		intel_uncore_write_fw(uncore, reg, val);
 }
 
+static inline u64
+intel_uncore_read64_2x32_fw(struct intel_uncore *uncore,
+			    i915_reg_t lower_reg, i915_reg_t upper_reg)
+{
+	u32 upper, lower, old_upper, loop = 0;
+	upper = intel_uncore_read_fw(uncore, upper_reg);
+	do {
+		old_upper = upper;
+		lower = intel_uncore_read_fw(uncore, lower_reg);
+		upper = intel_uncore_read_fw(uncore, upper_reg);
+	} while (upper != old_upper && loop++ < 2);
+
+	return (u64)upper << 32 | lower;
+}
+
 static inline u64
 intel_uncore_read64_2x32(struct intel_uncore *uncore,
 			 i915_reg_t lower_reg, i915_reg_t upper_reg)
 {
-	u32 upper, lower, old_upper, loop = 0;
 	enum forcewake_domains fw_domains;
 	unsigned long flags;
+	u64 ret;
 
 	fw_domains = intel_uncore_forcewake_for_reg(uncore, lower_reg,
 						    FW_REG_READ);
@@ -466,17 +481,12 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
 	spin_lock_irqsave(&uncore->lock, flags);
 	intel_uncore_forcewake_get__locked(uncore, fw_domains);
 
-	upper = intel_uncore_read_fw(uncore, upper_reg);
-	do {
-		old_upper = upper;
-		lower = intel_uncore_read_fw(uncore, lower_reg);
-		upper = intel_uncore_read_fw(uncore, upper_reg);
-	} while (upper != old_upper && loop++ < 2);
+	ret = intel_uncore_read64_2x32_fw(uncore, lower_reg, upper_reg);
 
 	intel_uncore_forcewake_put__locked(uncore, fw_domains);
 	spin_unlock_irqrestore(&uncore->lock, flags);
 
-	return (u64)upper << 32 | lower;
+	return ret;
 }
 
 static inline int intel_uncore_write_and_verify(struct intel_uncore *uncore,
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
index 08d7ab9336725..764bc94044537 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
@@ -74,6 +74,13 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
 	return (u64)upper << 32 | lower;
 }
 
+static inline u64
+intel_uncore_read64_2x32_fw(struct intel_uncore *uncore,
+			    i915_reg_t i915_lower_reg, i915_reg_t i915_upper_reg)
+{
+	return intel_uncore_read64_2x32(uncore, i915_lower_reg, i915_upper_reg);
+}
+
 static inline void intel_uncore_posting_read(struct intel_uncore *uncore,
 					     i915_reg_t i915_reg)
 {
-- 
2.53.0

Re: [PATCH v8 10/27] drm/i915/display: Do not take uncore lock in i915_get_vblank_counter

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The inline function `intel_de_read64_2x32_volatile` is now dead code and should be removed.
--

commit f923f01143a0bb2e1cfb7485bff2c091423e5711
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Do not take uncore lock in i915_get_vblank_counter

This commit prevents taking the uncore and DMC locks repeatedly in a
timing-sensitive path with interrupts disabled. It replaces the volatile
read variant with a new forcewake read variant in the vblank counter code.

> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index c0cc0a4c25dbe..5ca22899055d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
>  	 * we get a low value that's stable across two reads of the high
>  	 * register.
>  	 */
> -	frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
> -					      PIPEFRAME(display, pipe));
> +	frame = intel_de_read64_2x32_fw(display, PIPEFRAMEPIXEL(display, pipe),
> +				        PIPEFRAME(display, pipe));

[Severity: Low]
Since this patch updates the only caller of intel_de_read64_2x32_volatile()
in i915_get_vblank_counter() to use the new intel_de_read64_2x32_fw() 
variant instead, does intel_de_read64_2x32_volatile() become dead code?

If so, should it be completely removed from 
drivers/gpu/drm/i915/display/intel_de.h to clean up unused functions?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=10

[PATCH v8 11/27] drm/i915/display: Make icl_dsi_frame_update use _fw too

[Maarten Lankhorst]

Don't use the dmc lock inside the vblank critical section,
not even as last call.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index a549f1fac8103..277804638f207 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -242,8 +242,8 @@ void icl_dsi_frame_update(struct intel_crtc_state *crtc_state)
 	else
 		return;
 
-	intel_de_rmw(display, DSI_CMD_FRMCTL(port), 0,
-		     DSI_FRAME_UPDATE_REQUEST);
+	intel_de_rmw_fw(display, DSI_CMD_FRMCTL(port), 0,
+			DSI_FRAME_UPDATE_REQUEST);
 }
 
 static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
-- 
2.53.0

[PATCH v8 12/27] drm/i915/display: Use intel_de_read/write_fw in colorops

[Maarten Lankhorst]

Using the _fw variants fixes a module load error on PTL:

<4> [363.690050] Call Trace:
<4> [363.690052]  <TASK>
<4> [363.690055]  dump_stack_lvl+0x91/0xf0
<4> [363.690067]  dump_stack+0x10/0x20
<4> [363.690074]  __might_resched+0x174/0x260
<4> [363.690087]  rt_spin_lock+0x63/0x200
<4> [363.690092]  ? intel_dmc_wl_get+0x3c/0x140 [xe]
<4> [363.690470]  ? __lock_acquire+0x1195/0x2860
<4> [363.690487]  intel_dmc_wl_get+0x3c/0x140 [xe]
<4> [363.690842]  intel_color_plane_commit_arm+0xbc/0x140 [xe]
<4> [363.691246]  icl_plane_update_arm+0x23f/0x280 [xe]
<4> [363.691605]  intel_plane_update_arm+0x74/0x170 [xe]
<4> [363.691970]  intel_crtc_planes_update_arm+0x3cb/0x4c0 [xe]
<4> [363.692338]  intel_update_crtc+0x1c3/0x840 [xe]
<4> [363.692742]  ? intel_pre_update_crtc+0x2ce/0x470 [xe]
<4> [363.693125]  ? intel_enable_crtc+0x123/0x150 [xe]
<4> [363.693508]  skl_commit_modeset_enables+0x4c4/0x720 [xe]
<4> [363.693888]  intel_atomic_commit_tail+0xd9d/0x1b30 [xe]
<4> [363.694274]  intel_atomic_commit+0x2e8/0x330 [xe]
<4> [363.694621]  ? intel_atomic_commit+0x2e8/0x330 [xe]
<4> [363.694956]  drm_atomic_commit+0xaf/0xf0
<4> [363.694962]  ? __pfx___drm_printfn_info+0x10/0x10
<4> [363.694978]  drm_client_modeset_commit_atomic+0x25c/0x2b0
<4> [363.695018]  drm_client_modeset_commit_locked+0x63/0x1b0
<4> [363.695029]  drm_client_modeset_commit+0x26/0x50
<4> [363.695035]  __drm_fb_helper_restore_fbdev_mode_unlocked+0xdc/0x110
<4> [363.695045]  drm_fb_helper_set_par+0x2f/0x50
<4> [363.695052]  intel_fbdev_set_par+0x39/0x90 [xe]
<4> [363.695365]  fbcon_init+0x283/0x680
<4> [363.695382]  visual_init+0xf2/0x190
<4> [363.695396]  do_bind_con_driver.isra.0+0x1f1/0x4c0
<4> [363.695416]  do_take_over_console+0x181/0x220
<4> [363.695422]  ? vprintk_default+0x1d/0x30
<4> [363.695436]  do_fbcon_takeover+0x85/0x160
<4> [363.695447]  do_fb_registered+0x24c/0x2b0
<4> [363.695460]  fbcon_fb_registered+0x3a/0x90
<4> [363.695469]  do_register_framebuffer+0x216/0x320
<4> [363.695488]  register_framebuffer+0x23/0x50
<4> [363.695494]  __drm_fb_helper_initial_config_and_unlock+0x3ea/0x670
<4> [363.695502]  ? trace_hardirqs_on+0x1e/0xd0
<4> [363.695526]  drm_fb_helper_initial_config+0x3f/0x50
<4> [363.695534]  drm_fbdev_client_hotplug+0x80/0xd0
<4> [363.695543]  drm_client_register+0x8a/0xe0
<4> [363.695556]  drm_fbdev_client_setup+0x127/0x1f0
<4> [363.695563]  drm_client_setup+0xa7/0xe0
<4> [363.695569]  drm_client_setup_with_color_mode+0x24/0x40
<4> [363.695575]  intel_fbdev_setup+0x1c6/0x510 [xe]
<4> [363.695857]  intel_display_driver_register+0xb5/0x100 [xe]
<4> [363.696188]  ? __pfx___drm_printfn_dbg+0x10/0x10
<4> [363.696194]  ? intel_display_driver_register+0x2e/0x100 [xe]
<4> [363.696515]  xe_display_register+0x29/0x40 [xe]
<4> [363.696858]  xe_device_probe+0x51a/0x9e0 [xe]
<4> [363.697102]  ? __drmm_add_action+0x98/0x110
<4> [363.697108]  ? __pfx___drmm_mutex_release+0x10/0x10
<4> [363.697116]  ? __drmm_add_action_or_reset+0x1e/0x50
<4> [363.697130]  xe_pci_probe+0x396/0x620 [xe]
<4> [363.697423]  local_pci_probe+0x47/0xb0
<4> [363.697431]  pci_device_probe+0xf3/0x260
<4> [363.697444]  really_probe+0xf1/0x3c0
<4> [363.697451]  __driver_probe_device+0x8c/0x180
<4> [363.697458]  driver_probe_device+0x24/0xd0
<4> [363.697464]  __driver_attach+0x10f/0x220
<4> [363.697468]  ? __pfx___driver_attach+0x10/0x10
<4> [363.697472]  bus_for_each_dev+0x7f/0xe0
<4> [363.697484]  driver_attach+0x1e/0x30
<4> [363.697487]  bus_add_driver+0x154/0x290
<4> [363.697498]  driver_register+0x5e/0x130
<4> [363.697504]  __pci_register_driver+0x84/0xa0
<4> [363.697509]  xe_register_pci_driver+0x23/0x30 [xe]
<4> [363.697762]  xe_init+0x2c/0x110 [xe]
<4> [363.698007]  ? __pfx_xe_init+0x10/0x10 [xe]
<4> [363.698239]  do_one_initcall+0x60/0x3f0
<4> [363.698250]  ? __kmalloc_cache_noprof+0x470/0x690
<4> [363.698267]  do_init_module+0x97/0x2b0
<4> [363.698275]  load_module+0x2d08/0x2e30
<4> [363.698280]  ? __kernel_read+0x164/0x310
<4> [363.698312]  ? kernel_read_file+0x2ca/0x340
<4> [363.698328]  init_module_from_file+0x96/0xe0
<4> [363.698330]  ? init_module_from_file+0x96/0xe0
<4> [363.698357]  idempotent_init_module+0x11d/0x340
<4> [363.698384]  __x64_sys_finit_module+0x73/0xe0
<4> [363.698393]  x64_sys_call+0x1e3d/0x26a0
<4> [363.698399]  do_syscall_64+0x93/0xab0
<4> [363.698413]  ? ext4_llseek+0xc3/0x130
<4> [363.698425]  ? ksys_lseek+0x55/0xd0
<4> [363.698438]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698444]  ? switch_fpu_return+0xea/0x150
<4> [363.698454]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698465]  ? kernfs_fop_read_iter+0x197/0x210
<4> [363.698470]  ? rw_verify_area+0x16f/0x200
<4> [363.698482]  ? vfs_read+0x22a/0x360
<4> [363.698498]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698506]  ? ksys_read+0x72/0xf0
<4> [363.698520]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698526]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698532]  ? do_syscall_64+0x1b7/0xab0
<4> [363.698535]  ? exc_page_fault+0xbd/0x2c0
<4> [363.698545]  entry_SYSCALL_64_after_hwframe+0x76/0x7e
<4> [363.698549] RIP: 0033:0x715af255025d

And a similar backtrace in hsw_color_commit_arm().

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff408..cc3cdb90d6975 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1050,7 +1050,7 @@ static void hsw_color_commit_arm(struct intel_dsb *dsb,
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct intel_display *display = to_intel_display(crtc);
 
-	intel_de_write(display, GAMMA_MODE(crtc->pipe),
+	intel_de_write_fw(display, GAMMA_MODE(crtc->pipe),
 		       crtc_state->gamma_mode);
 
 	intel_de_write_fw(display, PIPE_CSC_MODE(crtc->pipe),
@@ -4066,7 +4066,7 @@ static void glk_load_lut_3d(struct intel_dsb *dsb,
 	int i, lut_size = drm_color_lut32_size(blob);
 	enum pipe pipe = crtc->pipe;
 
-	if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
+	if (!dsb && intel_de_read_fw(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
 		drm_err(display->drm, "[CRTC:%d:%s] 3D LUT not ready, not loading LUTs\n",
 			crtc->base.base.id, crtc->base.name);
 		return;
@@ -4084,7 +4084,7 @@ static void glk_lut_3d_commit(struct intel_dsb *dsb, struct intel_crtc *crtc, bo
 	enum pipe pipe = crtc->pipe;
 	u32 val = 0;
 
-	if (!dsb && intel_de_read(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
+	if (!dsb && intel_de_read_fw(display, LUT_3D_CTL(pipe)) & LUT_3D_READY) {
 		drm_err(display->drm, "[CRTC:%d:%s] 3D LUT not ready, not committing change\n",
 			crtc->base.base.id, crtc->base.name);
 		return;
-- 
2.53.0

[PATCH v8 13/27] drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset

[Maarten Lankhorst]

intel_set_pipe_src_size(), hsw_set_linetime_wm(),
intel_cpu_transcoder_set_m1_n1() and intel_set_transcoder_timings_lrr()
are called from an atomic context on PREEMPT_RT, and should be using the
_fw functions.

This likely prevents a deadlock on i915.

Again noticed when trying to disable preemption in vblank evasion:
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
<3> in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1505, name: kms_cursor_lega
<3> preempt_count: 1, expected: 0
<3> RCU nest depth: 0, expected: 0
<4> 4 locks held by kms_cursor_lega/1505:
<4>  #0: ffffc90003c6f988 (crtc_ww_class_acquire){+.+.}-{0:0}, at: drm_mode_atomic_ioctl+0x13b/0xe90
<4>  #1: ffffc90003c6f9b0 (crtc_ww_class_mutex){+.+.}-{3:3}, at: drm_mode_atomic_ioctl+0x13b/0xe90
<4>  #2: ffff888135b838b8 (&intel_dp->psr.lock){+.+.}-{3:3}, at: intel_psr_lock+0xc5/0xf0 [xe]
<4>  #3: ffff88812607bbc0 (&wl->lock){+.+.}-{2:2}, at: intel_dmc_wl_get+0x3c/0x140 [xe]
<4> CPU: 6 UID: 0 PID: 1505 Comm: kms_cursor_lega Tainted: G     U              6.18.0-rc3-lgci-xe-xe-pw-156729v1+ #1 PREEMPT_{RT,(lazy)}
<4> Tainted: [U]=USER
<4> Hardware name: Intel Corporation Panther Lake Client Platform/PTL-UH LP5 T3 RVP1, BIOS PTLPFWI1.R00.3383.D02.2509240621 09/24/2025
<4> Call Trace:
<4>  <TASK>
<4>  dump_stack_lvl+0xc1/0xf0
<4>  dump_stack+0x10/0x20
<4>  __might_resched+0x174/0x260
<4>  rt_spin_lock+0x63/0x200
<4>  ? intel_dmc_wl_get+0x3c/0x140 [xe]
<4>  intel_dmc_wl_get+0x3c/0x140 [xe]
<4>  intel_set_pipe_src_size+0x89/0xe0 [xe]
<4>  intel_update_crtc+0x3c1/0x950 [xe]
<4>  ? intel_pre_update_crtc+0x258/0x400 [xe]
<4>  skl_commit_modeset_enables+0x217/0x720 [xe]
<4>  intel_atomic_commit_tail+0xd4e/0x1af0 [xe]
<4>  ? lock_release+0xce/0x2a0
<4>  intel_atomic_commit+0x2e5/0x330 [xe]
<4>  ? intel_atomic_commit+0x2e5/0x330 [xe]
<4>  drm_atomic_commit+0xaf/0xf0
<4>  ? __pfx___drm_printfn_info+0x10/0x10
<4>  drm_mode_atomic_ioctl+0xbd5/0xe90
<4>  ? lock_acquire+0xc4/0x2e0
<4>  ? __pfx_drm_mode_atomic_ioctl+0x10/0x10
<4>  drm_ioctl_kernel+0xb6/0x120
<4>  drm_ioctl+0x2d7/0x5a0
<4>  ? __pfx_drm_mode_atomic_ioctl+0x10/0x10
<4>  ? rt_spin_unlock+0xa0/0x140
<4>  ? __pm_runtime_resume+0x53/0x90
<4>  xe_drm_ioctl+0x56/0x90 [xe]
<4>  __x64_sys_ioctl+0xa8/0x110
<4>  ? lock_acquire+0xc4/0x2e0
<4>  x64_sys_call+0x1144/0x26a0
<4>  do_syscall_64+0x93/0xae0
<4>  ? lock_release+0xce/0x2a0
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  ? find_held_lock+0x31/0x90
<4>  ? __task_pid_nr_ns+0xcf/0x270
<4>  ? __lock_acquire+0x43e/0x2860
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? lock_acquire+0xc4/0x2e0
<4>  ? find_held_lock+0x31/0x90
<4>  ? __task_pid_nr_ns+0xcf/0x270
<4>  ? lock_release+0xce/0x2a0
<4>  ? __task_pid_nr_ns+0xd9/0x270
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  ? do_syscall_64+0x1b7/0xae0
<4>  entry_SYSCALL_64_after_hwframe+0x76/0x7e

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++----------
 drivers/gpu/drm/i915/display/intel_vrr.c     | 18 ++++-----
 2 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e2e4b00a8fa99..2e3ade44f28ee 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1605,9 +1605,9 @@ static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state)
 	struct intel_display *display = to_intel_display(crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
-	intel_de_write(display, WM_LINETIME(crtc->pipe),
-		       HSW_LINETIME(crtc_state->linetime) |
-		       HSW_IPS_LINETIME(crtc_state->ips_linetime));
+	intel_de_write_fw(display, WM_LINETIME(crtc->pipe),
+			  HSW_LINETIME(crtc_state->linetime) |
+			  HSW_IPS_LINETIME(crtc_state->ips_linetime));
 }
 
 static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
@@ -2601,14 +2601,14 @@ void intel_set_m_n(struct intel_display *display,
 		   intel_reg_t data_m_reg, intel_reg_t data_n_reg,
 		   intel_reg_t link_m_reg, intel_reg_t link_n_reg)
 {
-	intel_de_write(display, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
-	intel_de_write(display, data_n_reg, m_n->data_n);
-	intel_de_write(display, link_m_reg, m_n->link_m);
+	intel_de_write_fw(display, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
+	intel_de_write_fw(display, data_n_reg, m_n->data_n);
+	intel_de_write_fw(display, link_m_reg, m_n->link_m);
 	/*
 	 * On BDW+ writing LINK_N arms the double buffered update
 	 * of all the M/N registers, so it must be written last.
 	 */
-	intel_de_write(display, link_n_reg, m_n->link_n);
+	intel_de_write_fw(display, link_n_reg, m_n->link_n);
 }
 
 bool intel_cpu_transcoder_has_m2_n2(struct intel_display *display,
@@ -2795,9 +2795,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
 	}
 
 	if (DISPLAY_VER(display) >= 13) {
-		intel_de_write(display,
-			       TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder),
-			       crtc_state->set_context_latency);
+		intel_de_write_fw(display,
+				  TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder),
+				  crtc_state->set_context_latency);
 
 		/*
 		 * VBLANK_START not used by hw, just clear it
@@ -2813,9 +2813,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
 	 * The hardware actually ignores TRANS_VBLANK.VBLANK_END in DP mode.
 	 * But let's write it anyway to keep the state checker happy.
 	 */
-	intel_de_write(display, TRANS_VBLANK(display, cpu_transcoder),
-		       VBLANK_START(crtc_vblank_start - 1) |
-		       VBLANK_END(crtc_vblank_end - 1));
+	intel_de_write_fw(display, TRANS_VBLANK(display, cpu_transcoder),
+			  VBLANK_START(crtc_vblank_start - 1) |
+			  VBLANK_END(crtc_vblank_end - 1));
 
 	/*
 	 * DP doesn't have vertical sync, so TRANS_VSYNC only affects
@@ -2823,9 +2823,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
 	 * using the VRR timing generator!). Thus updating TRANS_VSYNC
 	 * here seems fine even if it isn't double buffered.
 	 */
-	intel_de_write(display, TRANS_VSYNC(display, cpu_transcoder),
-		       VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
-		       VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
+	intel_de_write_fw(display, TRANS_VSYNC(display, cpu_transcoder),
+			  VSYNC_START(adjusted_mode->crtc_vsync_start - 1) |
+			  VSYNC_END(adjusted_mode->crtc_vsync_end - 1));
 	/*
 	 * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
 	 * bits are not required. Since the support for these bits is going to
@@ -2839,9 +2839,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
 	 * The double buffer latch point for TRANS_VTOTAL
 	 * is the transcoder's undelayed vblank.
 	 */
-	intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder),
-		       VACTIVE(crtc_vdisplay - 1) |
-		       VTOTAL(crtc_vtotal - 1));
+	intel_de_write_fw(display, TRANS_VTOTAL(display, cpu_transcoder),
+			  VACTIVE(crtc_vdisplay - 1) |
+			  VTOTAL(crtc_vtotal - 1));
 
 	intel_vrr_set_fixed_rr_timings(crtc_state);
 	intel_vrr_transcoder_enable(crtc_state);
@@ -2858,8 +2858,8 @@ static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state)
 	/* pipesrc controls the size that is scaled from, which should
 	 * always be the user's requested size.
 	 */
-	intel_de_write(display, PIPESRC(display, pipe),
-		       PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
+	intel_de_write_fw(display, PIPESRC(display, pipe),
+			  PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1));
 }
 
 static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e03b5daac5be0..735d5da1326a3 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -326,12 +326,12 @@ void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
 	if (!intel_vrr_possible(crtc_state))
 		return;
 
-	intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
-		       intel_vrr_fixed_rr_hw_vmin(crtc_state) - 1);
-	intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
-		       intel_vrr_fixed_rr_hw_vmax(crtc_state) - 1);
-	intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
-		       intel_vrr_fixed_rr_hw_flipline(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_VMIN(display, cpu_transcoder),
+			  intel_vrr_fixed_rr_hw_vmin(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_VMAX(display, cpu_transcoder),
+			  intel_vrr_fixed_rr_hw_vmax(crtc_state) - 1);
+	intel_de_write_fw(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
+			  intel_vrr_fixed_rr_hw_flipline(crtc_state) - 1);
 }
 
 static
@@ -916,8 +916,8 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 vrr_ctl;
 
-	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
-		       trans_vrr_push(crtc_state, false));
+	intel_de_write_fw(display, TRANS_PUSH(display, cpu_transcoder),
+			  trans_vrr_push(crtc_state, false));
 
 	vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
 
@@ -929,7 +929,7 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
 	if (cmrr_enable)
 		vrr_ctl |= VRR_CTL_CMRR_ENABLE;
 
-	intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl);
+	intel_de_write_fw(display, TRANS_VRR_CTL(display, cpu_transcoder), vrr_ctl);
 }
 
 static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)
-- 
2.53.0

Re: [PATCH v8 13/27] drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Missed conversions to `_fw` variants in nested and adjacent functions called during the atomic vblank evasion window.
--

commit 1b8145ae8a083acd96357095f72f68d606b4e071
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset

This commit converts several register writes in functions like 
intel_set_pipe_src_size() and intel_set_transcoder_timings_lrr() 
to use the _fw non-sleeping variants. This prevents a "sleeping 
function called from invalid context" BUG during atomic evasion 
on PREEMPT_RT.

> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e2e4b00a8fa99..2e3ade44f28ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c

[ ... ]

> @@ -2839,9 +2839,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
>  	 * The double buffer latch point for TRANS_VTOTAL
>  	 * is the transcoder's undelayed vblank.
>  	 */
> -	intel_de_write(display, TRANS_VTOTAL(display, cpu_transcoder),
> -		       VACTIVE(crtc_vdisplay - 1) |
> -		       VTOTAL(crtc_vtotal - 1));
> +	intel_de_write_fw(display, TRANS_VTOTAL(display, cpu_transcoder),
> +			  VACTIVE(crtc_vdisplay - 1) |
> +			  VTOTAL(crtc_vtotal - 1));
>  
>  	intel_vrr_set_fixed_rr_timings(crtc_state);
>  	intel_vrr_transcoder_enable(crtc_state);

[Severity: High]
This is a pre-existing issue, but it seems the fix for PREEMPT_RT might be 
incomplete.

intel_set_transcoder_timings_lrr() unconditionally calls 
intel_vrr_transcoder_enable(), which in turn calls 
intel_vrr_set_transcoder_timings(). That nested function still uses 
intel_de_write(), intel_de_read(), and intel_de_rmw() rather than the 
_fw variants:

drivers/gpu/drm/i915/display/intel_vrr.c:intel_vrr_set_transcoder_timings() {
	...
	drm_WARN_ON(display->drm,
		    !(intel_de_read(display, TRANS_DDI_FUNC_CTL(display, cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE));
	...
	intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), trans_vrr_ctl(crtc_state));
	...
}

Because these non-fw accessors acquire locks that are sleepable on PREEMPT_RT,
will they still cause the same panic during the atomic vblank evasion window?

Additionally, commit_pipe_post_planes() runs in this same atomic window and 
calls intel_vrr_enable(). This eventually executes multiple sleepable 
intel_de_write() calls:

drivers/gpu/drm/i915/display/intel_vrr.c:intel_vrr_enable_dc_balancing() {
	...
	intel_de_write(display, TRANS_VRR_DCB_ADJ_VMAX_CFG(cpu_transcoder),
		       VRR_DCB_ADJ_VMAX(crtc_state->vrr.vmax - 1));
	...
}

drivers/gpu/drm/i915/display/intel_vrr.c:intel_vrr_set_vrr_timings() {
	...
	intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
		       intel_vrr_hw_vmin(crtc_state) - 1);
	...
}

Do those accesses also need to be converted to the _fw variants to fully 
prevent the BUG?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=13

[PATCH v8 14/27] drm/i915/display: Make set_pipeconf use the fw variants

[Maarten Lankhorst]

The calls are used inside the critical section when updating
the gamma mode, and thus should use the _fw variants to prevent
locks.

Fixes following splat:
| BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
| in_atomic(): 0, irqs_disabled(): 1, non_block: 0, pid: 2115, name: modprobe
| preempt_count: 0, expected: 0
| RCU nest depth: 0, expected: 0
| 4 locks held by modprobe/2115:
|  #0: ffff99b9425161a0 (&dev->mutex){....}-{4:4}, at: __driver_attach+0xaf/0x1c0
|  #1: ffffaa224810f6c0 (crtc_ww_class_acquire){+.+.}-{0:0}, at: intel_initial_commit+0x4c/0x200 [i915]
|  #2: ffffaa224810f6e8 (crtc_ww_class_mutex){+.+.}-{4:4}, at: intel_initial_commit+0x4c/0x200 [i915]
|  #3: ffff99b94a6c9030 (&uncore->lock){+.+.}-{3:3}, at: gen6_write32+0x50/0x290 [i915]
| irq event stamp: 513344
| hardirqs last  enabled at (513343): [<ffffffff8ba8d84c>] _raw_spin_unlock_irqrestore+0x4c/0x60
| hardirqs last disabled at (513344): [<ffffffffc1543646>] intel_pipe_update_start+0x216/0x2c0 [i915]
| softirqs last  enabled at (512766): [<ffffffff8af045cf>] __local_bh_enable_ip+0x10f/0x170
| softirqs last disabled at (512712): [<ffffffffc14dfb6a>] __i915_request_queue+0x3a/0x70 [i915]
| CPU: 3 UID: 0 PID: 2115 Comm: modprobe Tainted: G        W           6.18.0-rc1+ #17 PREEMPT_{RT,(lazy)}
| Tainted: [W]=WARN
| Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./Z68 Pro3-M, BIOS P2.30 06/29/2012
| Call Trace:
|  <TASK>
|  dump_stack_lvl+0x68/0x90
|  __might_resched.cold+0xf0/0x12b
|  rt_spin_lock+0x5f/0x200
|  gen6_write32+0x50/0x290 [i915]
|  ilk_set_pipeconf+0x12d/0x230 [i915]
|  ilk_color_commit_arm+0x2d/0x70 [i915]
|  intel_update_crtc+0x15b/0x690 [i915]
|  intel_commit_modeset_enables+0xa6/0xd0 [i915]
|  intel_atomic_commit_tail+0xd55/0x19a0 [i915]
|  intel_atomic_commit+0x25d/0x2a0 [i915]
|  drm_atomic_commit+0xad/0xe0 [drm]
|  intel_initial_commit+0x16c/0x200 [i915]
|  intel_display_driver_probe+0x2e/0x80 [i915]
|  i915_driver_probe+0x791/0xc10 [i915]
|  i915_pci_probe+0xd7/0x190 [i915]

Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2e3ade44f28ee..03b15765843a0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3042,8 +3042,9 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state)
 
 	val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1);
 
-	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
-	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
+	intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
+	/* posting read */
+	intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
 }
 
 static enum intel_output_format
@@ -3238,8 +3239,9 @@ void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
 	val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1);
 	val |= TRANSCONF_MSA_TIMING_DELAY(crtc_state->msa_timing_delay);
 
-	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
-	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
+	intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
+	/* posting read */
+	intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
 }
 
 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
-- 
2.53.0

Re: [PATCH v8 14/27] drm/i915/display: Make set_pipeconf use the fw variants

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Incomplete migration to _fw register access variants in VRR handling causes 'sleeping in atomic context' BUG on PREEMPT_RT.
--

commit 3e8bb0c4e5f9821d1b47fa3563431c605e96b128
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Make set_pipeconf use the fw variants

The calls are used inside the critical section when updating
the gamma mode, and thus should use the _fw variants to prevent
locks.

> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 2e3ade44f28ee..03b15765843a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c

[ ... ]

> @@ -3042,8 +3042,9 @@ void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state)
>  
>  	val |= TRANSCONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1);
>  
> -	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
> -	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
> +	intel_de_write_fw(display, TRANSCONF(display, cpu_transcoder), val);
> +	/* posting read */
> +	intel_de_read_fw(display, TRANSCONF(display, cpu_transcoder));
>  }

[Severity: High]
This is a pre-existing issue, but since the goal is to prevent sleeping
in atomic context on PREEMPT_RT during the vblank evasion section, are
there other register accesses in this path that need the fw variants?

Several VRR functions still use the sleepable non-fw register access
variants inside the atomic section where local IRQs are disabled:

1. intel_vrr_set_vrr_timings() and intel_vrr_enable_dc_balancing() use
intel_de_write() and intel_de_read() and are called from
intel_vrr_enable(), which executes via commit_pipe_post_planes().

2. intel_vrr_set_transcoder_timings() uses intel_de_write() and executes
via commit_pipe_pre_planes() -> intel_pipe_fastset().

For example, in drivers/gpu/drm/i915/display/intel_vrr.c:

intel_vrr_set_vrr_timings() {
        ...
        intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
                       intel_vrr_hw_vmin(crtc_state) - 1);
        ...
}

Could these non-fw accesses trigger the same PREEMPT_RT splat?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=14

[PATCH v8 15/27] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

execlists_dequeue() is invoked from a function which uses
local_irq_disable() to disable interrupts so the spin_lock() behaves
like spin_lock_irq().
This breaks PREEMPT_RT because local_irq_disable() + spin_lock() is not
the same as spin_lock_irq().

execlists_dequeue_irq() and execlists_dequeue() has each one caller
only. If intel_engine_cs::active::lock is acquired and released with the
_irq suffix then it behaves almost as if execlists_dequeue() would be
invoked with disabled interrupts. The difference is the last part of the
function which is then invoked with enabled interrupts.
I can't tell if this makes a difference. From looking at it, it might
work to move the last unlock at the end of the function as I didn't find
anything that would acquire the lock again.

Reported-by: Clark Williams <williams@redhat.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 .../drm/i915/gt/intel_execlists_submission.c    | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 1359fc9cb88ef..e11db81dca9c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1300,7 +1300,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 * and context switches) submission.
 	 */
 
-	spin_lock(&sched_engine->lock);
+	spin_lock_irq(&sched_engine->lock);
 
 	/*
 	 * If the queue is higher priority than the last
@@ -1400,7 +1400,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				 * Even if ELSP[1] is occupied and not worthy
 				 * of timeslices, our queue might be.
 				 */
-				spin_unlock(&sched_engine->lock);
+				spin_unlock_irq(&sched_engine->lock);
 				return;
 			}
 		}
@@ -1426,7 +1426,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 
 		if (last && !can_merge_rq(last, rq)) {
 			spin_unlock(&ve->base.sched_engine->lock);
-			spin_unlock(&engine->sched_engine->lock);
+			spin_unlock_irq(&engine->sched_engine->lock);
 			return; /* leave this for another sibling */
 		}
 
@@ -1588,7 +1588,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	 */
 	sched_engine->queue_priority_hint = queue_prio(sched_engine);
 	i915_sched_engine_reset_on_empty(sched_engine);
-	spin_unlock(&sched_engine->lock);
+	spin_unlock_irq(&sched_engine->lock);
 
 	/*
 	 * We can skip poking the HW if we ended up with exactly the same set
@@ -1614,13 +1614,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	}
 }
 
-static void execlists_dequeue_irq(struct intel_engine_cs *engine)
-{
-	local_irq_disable(); /* Suspend interrupts across request submission */
-	execlists_dequeue(engine);
-	local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
-}
-
 static void clear_ports(struct i915_request **ports, int count)
 {
 	memset_p((void **)ports, NULL, count);
@@ -2475,7 +2468,7 @@ static void execlists_submission_tasklet(struct tasklet_struct *t)
 	}
 
 	if (!engine->execlists.pending[0]) {
-		execlists_dequeue_irq(engine);
+		execlists_dequeue(engine);
 		start_timeslice(engine);
 	}
 
-- 
2.53.0

Re: [PATCH v8 15/27] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Removing local_irq_disable() exposes the ELSP (ExecList Submit Port) MMIO writes to hardirq preemption, risking hardware hangs due to interleaved MMIO accesses.
--

commit 417d04153bfb15dc2291029341c85c1b4a51d8bb
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()

This patch modifies the execlists dequeue paths by replacing the explicit
local_irq_disable() wrapper with spin_lock_irq() semantics on the schedule
engine lock.

> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 1359fc9cb88ef..e11db81dca9c5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
[ ... ]
> @@ -1588,7 +1588,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
>  	 */
>  	sched_engine->queue_priority_hint = queue_prio(sched_engine);
>  	i915_sched_engine_reset_on_empty(sched_engine);
> -	spin_unlock(&sched_engine->lock);
> +	spin_unlock_irq(&sched_engine->lock);
>  
>  	/*
>  	 * We can skip poking the HW if we ended up with exactly the same set
[ ... ]
> -static void execlists_dequeue_irq(struct intel_engine_cs *engine)
> -{
> -	local_irq_disable(); /* Suspend interrupts across request submission */
> -	execlists_dequeue(engine);
> -	local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
> -}

[Severity: High]
Does removing the local_irq_disable() wrapper expose the ELSP MMIO writes
to hardirq preemption?

With the move to spin_unlock_irq() earlier in the function, hardware 
interrupts are re-enabled before execlists_submit_ports() is called at the
end of execlists_dequeue().

Inside the submission path, write_desc() performs multiple 32-bit writel() 
operations to the ELSP register:

	writel(upper_32_bits(desc), execlists->submit_reg);
	writel(lower_32_bits(desc), execlists->submit_reg);

If an interrupt occurs between these consecutive MMIO writes and performs
other GPU MMIO accesses, could this disrupt the hardware submission state
machine and lead to GPU hangs?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=15

[PATCH v8 16/27] drm/i915: Drop the irqs_disabled() check

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

The !irqs_disabled() check triggers on PREEMPT_RT even with
i915_sched_engine::lock acquired. The reason is the lock is transformed
into a sleeping lock on PREEMPT_RT and does not disable interrupts.

There is no need to check for disabled interrupts. The lockdep
annotation below already check if the lock has been acquired by the
caller and will yell if the interrupts are not disabled.

Remove the !irqs_disabled() check.

Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/i915_request.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index d2c7b1090df08..f66f8efc70629 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -610,7 +610,6 @@ bool __i915_request_submit(struct i915_request *request)
 
 	RQ_TRACE(request, "\n");
 
-	GEM_BUG_ON(!irqs_disabled());
 	lockdep_assert_held(&engine->sched_engine->lock);
 
 	/*
@@ -719,7 +718,6 @@ void __i915_request_unsubmit(struct i915_request *request)
 	 */
 	RQ_TRACE(request, "\n");
 
-	GEM_BUG_ON(!irqs_disabled());
 	lockdep_assert_held(&engine->sched_engine->lock);
 
 	/*
-- 
2.53.0

[PATCH v8 17/27] drm/i915/guc: Consider also RCU depth in busy loop.

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

intel_guc_send_busy_loop() looks at in_atomic() and irqs_disabled() to
decide if it should busy-spin while waiting or if it may sleep.
Both checks will report false on PREEMPT_RT if sleeping spinlocks are
acquired leading to RCU splats while the function sleeps.

Check also if RCU has been disabled.

Reported-by: "John B. Wyatt IV" <jwyatt@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 053780f562c1a..b25fa8f4dc4bd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -362,7 +362,7 @@ static inline int intel_guc_send_busy_loop(struct intel_guc *guc,
 {
 	int err;
 	unsigned int sleep_period_ms = 1;
-	bool not_atomic = !in_atomic() && !irqs_disabled();
+	bool not_atomic = !in_atomic() && !irqs_disabled() && !rcu_preempt_depth();
 
 	/*
 	 * FIXME: Have caller pass in if we are in an atomic context to avoid
-- 
2.53.0

[PATCH v8 18/27] drm/i915/gt: Fix selftests on PREEMPT_RT

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 10e556a7eac45..c1eff9edd8a5e 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -277,11 +277,11 @@ static int live_engine_busy_stats(void *arg)
 		st_engine_heartbeat_disable(engine);
 
 		ENGINE_TRACE(engine, "measuring idle time\n");
-		preempt_disable();
+		migrate_disable();
 		de = intel_engine_get_busy_time(engine, &t[0]);
 		udelay(100);
 		de = ktime_sub(intel_engine_get_busy_time(engine, &t[1]), de);
-		preempt_enable();
+		migrate_enable();
 		dt = ktime_sub(t[1], t[0]);
 		if (de < 0 || de > 10) {
 			pr_err("%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
@@ -316,11 +316,11 @@ static int live_engine_busy_stats(void *arg)
 		}
 
 		ENGINE_TRACE(engine, "measuring busy time\n");
-		preempt_disable();
+		migrate_disable();
 		de = intel_engine_get_busy_time(engine, &t[0]);
 		mdelay(100);
 		de = ktime_sub(intel_engine_get_busy_time(engine, &t[1]), de);
-		preempt_enable();
+		migrate_enable();
 		dt = ktime_sub(t[1], t[0]);
 		if (100 * de < 95 * dt || 95 * de > 100 * dt) {
 			pr_err("%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
-- 
2.53.0

[PATCH v8 19/27] drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT

[Maarten Lankhorst]

Also check if RCU is disabled for PREEMPT-RT, which is the case when
local_bh_disable() is called.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c0fd349a4600c..9dd9665128caa 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1607,7 +1607,7 @@ u64 intel_engine_get_last_batch_head(const struct intel_engine_cs *engine)
 
 static unsigned long stop_timeout(const struct intel_engine_cs *engine)
 {
-	if (in_atomic() || irqs_disabled()) /* inside atomic preempt-reset? */
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */
 		return 0;
 
 	/*
-- 
2.53.0

[PATCH v8 20/27] drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo

[Maarten Lankhorst]

TODO: Grab uncore lock during entire vblank evasion before disabling
interrupts, and check what breaks?

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 86d1c9f7f0ff0..e07303f0b3cc4 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -1863,7 +1863,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	const struct intel_crtc_state *crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	const struct vlv_fifo_state *fifo_state =
@@ -1892,7 +1891,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 	 * intel_pipe_update_start() has already disabled interrupts
 	 * for us, so a plain spin_lock() is sufficient here.
 	 */
-	spin_lock(&uncore->lock);
 
 	switch (crtc->pipe) {
 	case PIPE_A:
@@ -1951,8 +1949,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 	}
 
 	intel_de_read_fw(display, DSPARB(display));
-
-	spin_unlock(&uncore->lock);
 }
 
 #undef VLV_FIFO
-- 
2.53.0

Re: [PATCH v8 20/27] drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Removing the `uncore->lock` in `vlv_atomic_update_fifo` introduces a data race on the shared `DSPARB` registers and permits unlocked concurrent MMIO accesses, leading to corrupted hardware FIFO state and potential hardware crashes.
--

commit a9d530199c31de5dd37f0bfe14d6b4c1885aebb4
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo

This commit removes the uncore lock from vlv_atomic_update_fifo(), with
the assumption that disabling interrupts via intel_pipe_update_start()
is sufficient for synchronization.

> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c

[ ... ]

> @@ -1892,7 +1891,6 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
>  	 * intel_pipe_update_start() has already disabled interrupts
>  	 * for us, so a plain spin_lock() is sufficient here.
>  	 */
> -	spin_lock(&uncore->lock);
>  
>  	switch (crtc->pipe) {
>  	case PIPE_A:

[Severity: High]
Will removing the uncore lock here introduce a data race on the shared
DSPARB registers during concurrent updates?

While intel_pipe_update_start() disables local CPU interrupts to prevent
local preemption, non-blocking atomic commits for disjoint sets of CRTCs
can execute concurrently on different CPUs.

If two CPUs commit updates for PIPE_A and PIPE_B simultaneously, could
both CPUs read the same DSPARB register value using the unlocked
intel_de_read_fw() accessors?

For example, this sequence might occur:

CPU1 (updating PIPE_A):
    dsparb = intel_de_read_fw(display, DSPARB(display));

CPU2 (updating PIPE_B):
    dsparb = intel_de_read_fw(display, DSPARB(display));

When both CPUs modify their respective bits and write the value back, one
CPU could overwrite the other's modifications. This would silently erase
the FIFO split configuration for the other pipe and corrupt the hardware
FIFO state.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=20

[PATCH v8 21/27] drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT

[Maarten Lankhorst]

This makes the i915 selftests slightly happier, especially
related to GPU reset.

I believe this may be a better approach than trying to convert
uncore->lock to raw_spinlock

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/selftests/igt_atomic.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.c b/drivers/gpu/drm/i915/selftests/igt_atomic.c
index fb506b6990956..8ae39cf570b76 100644
--- a/drivers/gpu/drm/i915/selftests/igt_atomic.c
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.c
@@ -39,7 +39,14 @@ static void __hardirq_end(void)
 	local_irq_enable();
 }
 
+static void __maybe_unused __nop(void)
+{}
+
 const struct igt_atomic_section igt_atomic_phases[] = {
+#if IS_ENABLED(CONFIG_PREEMPT_RT)
+	{ "sleeping", __nop, __nop },
+	{ },
+#endif
 	{ "preempt", __preempt_begin, __preempt_end },
 	{ "softirq", __softirq_begin, __softirq_end },
 	{ "hardirq", __hardirq_begin, __hardirq_end },
-- 
2.53.0

[PATCH v8 22/27] Revert "drm/i915: Depend on !PREEMPT_RT."

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

Once the known issues are addressed, it should be safe to enable the
driver.

Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 5e939004b6463..40a9234e6e5dc 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -3,7 +3,6 @@ config DRM_I915
 	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
 	depends on DRM
 	depends on X86 && PCI
-	depends on !PREEMPT_RT
 	select INTEL_GTT if X86
 	select INTERVAL_TREE
 	# we need shmfs for the swappable backing store, and in particular
-- 
2.53.0

[PATCH v8 23/27] PREEMPT_RT injection

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/Kconfig.debug | 15 ---------------
 drivers/gpu/drm/xe/Kconfig.debug   |  5 +++++
 kernel/Kconfig.preempt             |  4 ++--
 3 files changed, 7 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug
index 52a3a59b4ba2c..5977d0b262b85 100644
--- a/drivers/gpu/drm/i915/Kconfig.debug
+++ b/drivers/gpu/drm/i915/Kconfig.debug
@@ -233,21 +233,6 @@ config DRM_I915_LOW_LEVEL_TRACEPOINTS
 
 	  If in doubt, say "N".
 
-config DRM_I915_DEBUG_VBLANK_EVADE
-	bool "Enable extra debug warnings for vblank evasion"
-	depends on DRM_I915
-	default n
-	help
-	  Choose this option to turn on extra debug warnings for the
-	  vblank evade mechanism. This gives a warning every time the
-	  the deadline allotted for the vblank evade critical section
-	  is exceeded, even if there isn't an actual risk of missing
-	  the vblank.
-
-	  Recommended for driver developers only.
-
-	  If in doubt, say "N".
-
 config DRM_I915_DEBUG_RUNTIME_PM
 	bool "Enable extra state checking for runtime PM"
 	depends on DRM_I915
diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
index 01227c77f6d70..1d5f11c6e88f3 100644
--- a/drivers/gpu/drm/xe/Kconfig.debug
+++ b/drivers/gpu/drm/xe/Kconfig.debug
@@ -30,6 +30,11 @@ config DRM_XE_DEBUG
 
 	  If in doubt, say "N".
 
+config DRM_I915_DEBUG_VBLANK_EVADE
+        def_bool y
+        depends on DRM_XE
+
+
 config DRM_XE_DEBUG_VM
 	bool "Enable extra VM debugging info"
 	default n
diff --git a/kernel/Kconfig.preempt b/kernel/Kconfig.preempt
index 88c594c6d7fcd..11bec9be95405 100644
--- a/kernel/Kconfig.preempt
+++ b/kernel/Kconfig.preempt
@@ -90,9 +90,9 @@ config PREEMPT_LAZY
 endchoice
 
 config PREEMPT_RT
-	bool "Fully Preemptible Kernel (Real-Time)"
-	depends on EXPERT && ARCH_SUPPORTS_RT && !COMPILE_TEST
+	def_bool y
 	select PREEMPTION
+	depends on ARCH_SUPPORTS_RT
 	help
 	  This option turns the kernel into a real-time kernel by replacing
 	  various locking primitives (spinlocks, rwlocks, etc.) with
-- 
2.53.0

Re: [PATCH v8 23/27] PREEMPT_RT injection

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] PREEMPT_RT is unconditionally enabled for all supported architectures, removing the user prompt.
- [High] DRM_I915_DEBUG_VBLANK_EVADE is moved to the DRM_XE Kconfig and forcefully enabled, breaking i915-only builds.
--

commit 64632b1f6e588fa66b14871b397cbf599d637abc
Author: Maarten Lankhorst <dev@lankhorst.se>

PREEMPT_RT injection

This commit forces PREEMPT_RT to be unconditionally enabled for supported
architectures. It also moves DRM_I915_DEBUG_VBLANK_EVADE from the i915
Kconfig to the xe Kconfig, enabling it by default.

> diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug
> index 52a3a59b4ba2c..5977d0b262b85 100644
> --- a/drivers/gpu/drm/i915/Kconfig.debug
> +++ b/drivers/gpu/drm/i915/Kconfig.debug

[ ... ]

> -config DRM_I915_DEBUG_VBLANK_EVADE
> -	bool "Enable extra debug warnings for vblank evasion"
> -	depends on DRM_I915
> -	default n
> -	help
> -	  Choose this option to turn on extra debug warnings for the
> -	  vblank evade mechanism. This gives a warning every time the
> -	  the deadline allotted for the vblank evade critical section
> -	  is exceeded, even if there isn't an actual risk of missing
> -	  the vblank.
> -
> -	  Recommended for driver developers only.
> -
> -	  If in doubt, say "N".
> -
>  config DRM_I915_DEBUG_RUNTIME_PM
> diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
> index 01227c77f6d70..1d5f11c6e88f3 100644
> --- a/drivers/gpu/drm/xe/Kconfig.debug
> +++ b/drivers/gpu/drm/xe/Kconfig.debug

[ ... ]

> @@ -30,6 +30,11 @@ config DRM_XE_DEBUG
>  
>  	  If in doubt, say "N".
>  
> +config DRM_I915_DEBUG_VBLANK_EVADE
> +        def_bool y
> +        depends on DRM_XE
> +

[Severity: High]
Does this code break the vblank evasion debug logic for i915-only builds?

By moving DRM_I915_DEBUG_VBLANK_EVADE out of i915 and defining it as
def_bool y with a dependency on DRM_XE, developers building only i915 can
no longer enable this feature. 

Additionally, does this unconditionally force the extra debug warnings and
overhead on all xe driver users without providing a way to opt out?

> +
>  config DRM_XE_DEBUG_VM
> diff --git a/kernel/Kconfig.preempt b/kernel/Kconfig.preempt
> index 88c594c6d7fcd..11bec9be95405 100644
> --- a/kernel/Kconfig.preempt
> +++ b/kernel/Kconfig.preempt

[ ... ]

> @@ -90,9 +90,9 @@ config PREEMPT_LAZY
>  endchoice
>  
>  config PREEMPT_RT
> -	bool "Fully Preemptible Kernel (Real-Time)"
> -	depends on EXPERT && ARCH_SUPPORTS_RT && !COMPILE_TEST
> +	def_bool y
>  	select PREEMPTION
> +	depends on ARCH_SUPPORTS_RT

[Severity: High]
Does this change unintentionally force a Real-Time kernel build on any
architecture where ARCH_SUPPORTS_RT is true?

By changing PREEMPT_RT to def_bool y and removing the prompt, it appears
users are completely prevented from selecting standard preemption models
like PREEMPT_NONE or PREEMPT_VOLUNTARY. 

This universally alters locking semantics across the entire kernel (for
example, converting spinlocks to rt_mutexes) regardless of whether drivers or
systems are prepared for RT.

>  	help
>  	  This option turns the kernel into a real-time kernel by replacing
>  	  various locking primitives (spinlocks, rwlocks, etc.) with

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=23

[PATCH v8 24/27] FOR-CI: bump MAX_STACK_TRACE_ENTRIES

[Maarten Lankhorst]

We're hitting a bug in CI where MAX_STACK_TRACE_ENTRIES is set too low.
My guess is the repeated loading/unloading is creating multiples of the
same entries. As a hack just reset lockdep. This might only be necessary
for CI + PREEMPT_RT.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 lib/Kconfig.debug | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 9b9f7c5935596..ec35b50068a73 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -1625,9 +1625,8 @@ config LOCKDEP_CHAINS_BITS
 config LOCKDEP_STACK_TRACE_BITS
 	int "Size for MAX_STACK_TRACE_ENTRIES (as Nth power of 2)"
 	depends on LOCKDEP && !LOCKDEP_SMALL
-	range 10 26
-	default 21 if KASAN
-	default 19
+	range 22 26
+	default 22
 	help
 	  Try increasing this value if you hit "BUG: MAX_STACK_TRACE_ENTRIES too low!" message.
 
-- 
2.53.0

Re: [PATCH v8 24/27] FOR-CI: bump MAX_STACK_TRACE_ENTRIES

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] Unacceptable minimum memory footprint for lockdep and global CI hack
- [Medium] Commit message and code mismatch: missing 'reset lockdep' logic
- [Low] Stale Kconfig help text regarding KASAN default
--

commit 6acd80559fe23be49729943270ef9f9a1fa2feeb
Author: Maarten Lankhorst <dev@lankhorst.se>

FOR-CI: bump MAX_STACK_TRACE_ENTRIES

This patch modifies the LOCKDEP_STACK_TRACE_BITS Kconfig limits to address a
bug in CI where MAX_STACK_TRACE_ENTRIES is set too low. It restricts the
allowed range for this value and sets a new default of 22.

> FOR-CI: bump MAX_STACK_TRACE_ENTRIES
>
> We're hitting a bug in CI where MAX_STACK_TRACE_ENTRIES is set too low.
> My guess is the repeated loading/unloading is creating multiples of the
> same entries. As a hack just reset lockdep. This might only be necessary
> for CI + PREEMPT_RT.

[Severity: Medium]
Is the commit message outdated, or is the logic to reset lockdep missing?

The message mentions resetting lockdep as a hack, but the patch only modifies
the LOCKDEP_STACK_TRACE_BITS limits in Kconfig and includes no code changes
to perform any lockdep reset.

> diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
> index e2f976c3301b6..1e670aa6a0812 100644
> --- a/lib/Kconfig.debug
> +++ b/lib/Kconfig.debug
> @@ -1617,9 +1617,8 @@ config LOCKDEP_CHAINS_BITS
>  config LOCKDEP_STACK_TRACE_BITS
>  	int "Size for MAX_STACK_TRACE_ENTRIES (as Nth power of 2)"
>  	depends on LOCKDEP && !LOCKDEP_SMALL
> -	range 10 26
> -	default 21 if KASAN
> -	default 19
> +	range 22 26
> +	default 22

[Severity: High]
Does this force a massive minimum memory footprint on all systems?

Bumping the range to a minimum of 22 forces 2^22 (4,194,304) entries globally
for all builds with lockdep enabled. On 64-bit systems, this mandates a
minimum allocation of roughly 33.5 MB of kernel memory. 

Is it possible to avoid forcing this large footprint on memory-constrained
embedded systems just for a CI workaround?

>  	help
>  	  Try increasing this value if you hit "BUG: MAX_STACK_TRACE_ENTRIES too low!" message.

[Severity: Low]
Does the help text below this line need to be updated?

The KASAN conditional default was removed, but the extended help text still
reads "The higher default when KASAN is enabled costs ~12MB extra..." which
is now stale and contradicts the new configuration limits.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=24

[PATCH v8 25/27] drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

[Maarten Lankhorst]

From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

IRQ-Work (FIFO-1) will be preempted by the threaded-interrupt (FIFO-50)
and the interrupt will poll on signaler_active while the irq-work can't
make progress.

Solve this by adding a spinlock to prevent starvation and force
completion.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c       | 8 +++++++-
 drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index c10ac0ab3bfa8..c2b174bfa1418 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -209,6 +209,7 @@ static void signal_irq_work(struct irq_work *work)
 		intel_breadcrumbs_disarm_irq(b);
 
 	rcu_read_lock();
+	spin_lock(&b->signaler_active_sync);
 	atomic_inc(&b->signaler_active);
 	list_for_each_entry_rcu(ce, &b->signalers, signal_link) {
 		struct i915_request *rq;
@@ -246,6 +247,7 @@ static void signal_irq_work(struct irq_work *work)
 		}
 	}
 	atomic_dec(&b->signaler_active);
+	spin_unlock(&b->signaler_active_sync);
 	rcu_read_unlock();
 
 	llist_for_each_safe(signal, sn, signal) {
@@ -290,6 +292,7 @@ intel_breadcrumbs_create(struct intel_engine_cs *irq_engine)
 	init_llist_head(&b->signaled_requests);
 
 	spin_lock_init(&b->irq_lock);
+	spin_lock_init(&b->signaler_active_sync);
 	init_irq_work(&b->irq_work, signal_irq_work);
 
 	b->irq_engine = irq_engine;
@@ -487,8 +490,11 @@ void intel_context_remove_breadcrumbs(struct intel_context *ce,
 	if (release)
 		intel_context_put(ce);
 
-	while (atomic_read(&b->signaler_active))
+	while (atomic_read(&b->signaler_active)) {
+		spin_lock(&b->signaler_active_sync);
+		spin_unlock(&b->signaler_active_sync);
 		cpu_relax();
+	}
 }
 
 static void print_signals(struct intel_breadcrumbs *b, struct drm_printer *p)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
index bdf09fd67b6e7..28dae32628aab 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
@@ -40,6 +40,7 @@ struct intel_breadcrumbs {
 	struct list_head signalers;
 	struct llist_head signaled_requests;
 	atomic_t signaler_active;
+	spinlock_t signaler_active_sync;
 
 	spinlock_t irq_lock; /* protects the interrupt from hardirq context */
 	struct irq_work irq_work; /* for use from inside irq_lock */
-- 
2.53.0

Re: [PATCH v8 25/27] drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing hardirq disable when acquiring the `signaler_active_sync` spinlock in `intel_context_remove_breadcrumbs()`, leading to a hard deadlock and lockdep splat on non-RT kernels.
--

commit c441a60da28f5ef8bb16a4ea0dbdd666e51caed6
Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

drm/i915/gt: Add a spinlock to prevent starvation of irq_work.

This commit adds the signaler_active_sync spinlock to prevent irq_work
starvation and force completion.

> diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> --- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
> @@ -209,6 +209,7 @@ static void signal_irq_work(struct irq_work *work)
>  		intel_breadcrumbs_disarm_irq(b);
>  
>  	rcu_read_lock();
> +	spin_lock(&b->signaler_active_sync);

[Severity: High]
Because signal_irq_work() executes as an irq_work, this lock is acquired in
hardirq context on non-RT kernels. Doesn't this establish a requirement that
all other takers must disable hardware interrupts?

>  	atomic_inc(&b->signaler_active);

[ ... ]

> @@ -487,8 +490,11 @@ void intel_context_remove_breadcrumbs(struct intel_context *ce,
>  	if (release)
>  		intel_context_put(ce);
>  
> -	while (atomic_read(&b->signaler_active))
> +	while (atomic_read(&b->signaler_active)) {
> +		spin_lock(&b->signaler_active_sync);

[Severity: High]
Can this cause a deadlock if a hardware interrupt fires while we hold this
lock?

Since intel_context_remove_breadcrumbs() acquires the lock using a plain
spin_lock(), it leaves hardware interrupts enabled.

If a hardware interrupt fires on the same CPU while the lock is held,
and triggers the irq_work, would we see a scenario like this:

CPU0
intel_context_remove_breadcrumbs()
   spin_lock(&b->signaler_active_sync);
   <hardware interrupt fires>
   signal_irq_work()
      spin_lock(&b->signaler_active_sync);  <- deadlock
      
Should this use spin_lock_irq() or spin_lock_irqsave() instead?

> +		spin_unlock(&b->signaler_active_sync);
>  		cpu_relax();
> +	}
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=25

[PATCH v8 26/27] drm/xe/display: Always use system memory on PREEMPT_RT for DPT.

[Maarten Lankhorst]

We were using stolen memory because it was unused memory, but
on recent platforms this adds extra latency when waking from
RC6, because memory accesses go through the media IP.

Reported-by: Alexander B Slota <alexander.b.slota@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index f93c98bec5b5f..c4e23926cd06e 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -173,14 +173,6 @@ static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
 						   XE_BO_FLAG_PAGETABLE,
 						   pin_params->alignment, false);
 	else
-		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
-						   dpt_size,  ~0ull,
-						   ttm_bo_type_kernel,
-						   XE_BO_FLAG_STOLEN |
-						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE,
-						   pin_params->alignment, false);
-	if (IS_ERR(dpt))
 		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
 						   dpt_size,  ~0ull,
 						   ttm_bo_type_kernel,
-- 
2.53.0

Re: [PATCH v8 26/27] drm/xe/display: Always use system memory on PREEMPT_RT for DPT.

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Meaningful code and commit message mismatch: The patch unconditionally removes STOLEN memory for DPT allocations, but the commit title states it should only apply to PREEMPT_RT.
--

commit 8469a8535d5587b09893e7c1628a8713f1ca3cb9
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/xe/display: Always use system memory on PREEMPT_RT for DPT.

We were using stolen memory because it was unused memory, but
on recent platforms this adds extra latency when waking from
RC6, because memory accesses go through the media IP.

> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -173,14 +173,6 @@ static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
>  						   XE_BO_FLAG_PAGETABLE,
>  						   pin_params->alignment, false);
>  	else
> -		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
> -						   dpt_size,  ~0ull,
> -						   ttm_bo_type_kernel,
> -						   XE_BO_FLAG_STOLEN |
> -						   XE_BO_FLAG_GGTT |
> -						   XE_BO_FLAG_PAGETABLE,
> -						   pin_params->alignment, false);
> -	if (IS_ERR(dpt))
>  		dpt = xe_bo_create_pin_map_at_novm(xe, tile0,
>  						   dpt_size,  ~0ull,
>  						   ttm_bo_type_kernel,

[Severity: Medium]
The commit title indicates this change should only apply "on PREEMPT_RT", but
does this code in __xe_pin_fb_vma_dpt() unconditionally remove the stolen
memory fallback for all configurations?

If the intention is to unconditionally allocate new framebuffers in system
memory rather than stolen memory, could the commit title be updated to
accurately reflect that this applies to all configurations and not just
PREEMPT_RT?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=26

[PATCH v8 27/27] drm/xe/display: Prefer not to allocate a framebuffers in stolen memory

[Maarten Lankhorst]

For the same reasons as using stolen memory for DPT, it's also a bad
idea for framebuffers. Allocate new framebuffers always in system memory
when we don't inherit them, and prohibit inheriting stolen framebuffers
when CONFIG_PREEMPT_RT is enabled.

Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/display/xe_display_bo.c | 35 +++++-----------------
 1 file changed, 7 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_display_bo.c b/drivers/gpu/drm/xe/display/xe_display_bo.c
index 7fbac223b0977..5b54d247cb212 100644
--- a/drivers/gpu/drm/xe/display/xe_display_bo.c
+++ b/drivers/gpu/drm/xe/display/xe_display_bo.c
@@ -127,7 +127,7 @@ bool xe_display_bo_fbdev_prefer_stolen(struct xe_device *xe, unsigned int size)
 	if (!stolen)
 		return false;
 
-	if (IS_DGFX(xe))
+	if (IS_DGFX(xe) || IS_ENABLED(CONFIG_PREEMPT_RT))
 		return false;
 
 	if (XE_DEVICE_WA(xe, 22019338487_display))
@@ -146,33 +146,12 @@ static struct drm_gem_object *xe_display_bo_fbdev_create(struct drm_device *drm,
 	struct xe_device *xe = to_xe_device(drm);
 	struct xe_bo *obj;
 
-	obj = ERR_PTR(-ENODEV);
-
-	if (xe_display_bo_fbdev_prefer_stolen(xe, size)) {
-		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe),
-						size,
-						ttm_bo_type_kernel,
-						XE_BO_FLAG_FORCE_WC |
-						XE_BO_FLAG_STOLEN |
-						XE_BO_FLAG_GGTT,
-						false);
-		if (!IS_ERR(obj))
-			drm_info(&xe->drm, "Allocated fbdev into stolen\n");
-		else
-			drm_info(&xe->drm, "Allocated fbdev into stolen failed: %li\n", PTR_ERR(obj));
-	} else {
-		drm_info(&xe->drm, "Allocating fbdev: Stolen memory not preferred.\n");
-	}
-
-	if (IS_ERR(obj)) {
-		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
-						ttm_bo_type_kernel,
-						XE_BO_FLAG_FORCE_WC |
-						XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
-						XE_BO_FLAG_GGTT,
-						false);
-	}
-
+	obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
+					ttm_bo_type_kernel,
+					XE_BO_FLAG_FORCE_WC |
+					XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
+					XE_BO_FLAG_GGTT,
+					false);
 	if (IS_ERR(obj)) {
 		drm_err(&xe->drm, "failed to allocate framebuffer (%pe)\n", obj);
 		return ERR_PTR(-ENOMEM);
-- 
2.53.0

Re: [PATCH v8 27/27] drm/xe/display: Prefer not to allocate a framebuffers in stolen memory

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Incomplete PREEMPT_RT restriction and misleading diagnostic log for stolen framebuffers.
- [Low] The `IS_DGFX(xe)` check within `xe_display_bo_fbdev_prefer_stolen()` is dead code.
--

commit a0d8e97afbc7423ba7650eec1d396883f1234659
Author: Maarten Lankhorst <dev@lankhorst.se>

drm/xe/display: Prefer not to allocate a framebuffers in stolen memory

For the same reasons as using stolen memory for DPT, it's also a bad
idea for framebuffers. Allocate new framebuffers always in system memory
when we don't inherit them, and prohibit inheriting stolen framebuffers
when CONFIG_PREEMPT_RT is enabled.

> diff --git a/drivers/gpu/drm/xe/display/xe_display_bo.c b/drivers/gpu/drm/xe/display/xe_display_bo.c
> index 7fbac223b0977..5b54d247cb212 100644
> --- a/drivers/gpu/drm/xe/display/xe_display_bo.c
> +++ b/drivers/gpu/drm/xe/display/xe_display_bo.c
> @@ -127,7 +127,7 @@ bool xe_display_bo_fbdev_prefer_stolen(struct xe_device *xe, unsigned int size)
>  	if (!stolen)
>  		return false;
>  
> -	if (IS_DGFX(xe))
> +	if (IS_DGFX(xe) || IS_ENABLED(CONFIG_PREEMPT_RT))

[Severity: Medium]
Will this RT restriction be bypassed if fbcon or fbdev emulation are disabled?

Looking at the only caller, initial_plane_bo() in
drivers/gpu/drm/xe/display/xe_initial_plane.c:

    if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
        IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) &&
        !xe_display_bo_fbdev_prefer_stolen(xe, plane_config->size)) {
            drm_info(&xe->drm, "Initial FB size exceeds half of stolen, discarding\n");
            return NULL;
    }

If a PREEMPT_RT kernel is built without fbcon or fbdev emulation, the
condition short-circuits, the RT check is skipped, and it appears the
driver would incorrectly proceed to inherit the stolen framebuffer.

Additionally, if the RT restriction does trigger, it will unconditionally
print "Initial FB size exceeds half of stolen, discarding". Is this
misleading when the rejection is actually due to RT constraints?

[Severity: Low]
Is the IS_DGFX(xe) check now dead code?

The patch removes the usage of xe_display_bo_fbdev_prefer_stolen() from
xe_display_bo_fbdev_create(), leaving initial_plane_bo() as its only
caller. Since initial_plane_bo() already guards against discrete graphics
before making the function call:

    if (IS_DGFX(xe)) {
        ...
    } else {
        ...
        if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
            IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) &&
            !xe_display_bo_fbdev_prefer_stolen(xe, plane_config->size)) {

IS_DGFX(xe) appears to be guaranteed false whenever
xe_display_bo_fbdev_prefer_stolen() is executed.

>  		return false;
>  
>  	if (XE_DEVICE_WA(xe, 22019338487_display))

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260615201846.307297-1-dev@lankhorst.se?part=27

✗ CI.checkpatch: warning for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159034/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5c2eea77f0753a789b23df288cb259d263949172
Author: Maarten Lankhorst <dev@lankhorst.se>
Date:   Mon Jun 15 22:18:45 2026 +0200

    drm/xe/display: Prefer not to allocate a framebuffers in stolen memory
    
    For the same reasons as using stolen memory for DPT, it's also a bad
    idea for framebuffers. Allocate new framebuffers always in system memory
    when we don't inherit them, and prohibit inheriting stolen framebuffers
    when CONFIG_PREEMPT_RT is enabled.
    
    Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch 0984dfdee2a4f9e1922fe919a6b469e115e23360 drm-intel
ed2bed0c6c9a drm/vblank_work: Add methods to schedule vblank_work in 2 stages
-:116: CHECK:LINE_SPACING: Please don't use multiple blank lines
#116: FILE: drivers/gpu/drm/drm_vblank_work.c:180:
 
+

total: 0 errors, 0 warnings, 1 checks, 162 lines checked
64c92a41e537 drm/vblank: Add a 2-stage version of drm_crtc_arm_vblank_event
f3b8865d92ff drm/intel/display: Make intel_crtc_arm_vblank_event static
4a3970c07d16 drm/intel/display: Convert vblank event handling to 2-stage arming
-:139: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#139: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:798:
+							 drm_crtc_accurate_vblank_count(&crtc->base) + 1,

-:142: WARNING:LONG_LINE_COMMENT: line length of 110 exceeds 100 columns
#142: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:801:
+				/* Remove plane from atomic state, cleanup/free is done from vblank worker. */

total: 0 errors, 2 warnings, 0 checks, 120 lines checked
bc2efbbe735f drm/i915/display: Move vblank put until after critical section
29bb5cf69e80 drm/i915/display: Remove locking from intel_vblank_evade critical section
-:47: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:735:
+static bool scanline_in_safe_range(struct intel_vblank_evade_ctx *evade, int *scanline, bool unlocked)

-:91: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#91: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:767:
+		timeout = wait_event_timeout(*wq, scanline_in_safe_range(evade, &scanline, true), timeout);

total: 0 errors, 2 warnings, 0 checks, 78 lines checked
579f9c738250 drm/i915/display: Handle vlv dsi workaround in scanline_in_safe_range too
e00f183ce35c drm/i915: Use preempt_disable/enable_rt() where recommended
-:7: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#7: 
  ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.")

-:46: WARNING:LINE_SPACING: Missing a blank line after declarations
#46: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:324:
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_lock_irqsave(&uncore->lock, *flags);

-:53: WARNING:LINE_SPACING: Missing a blank line after declarations
#53: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:331:
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+	spin_unlock_irqrestore(&uncore->lock, flags);

total: 0 errors, 3 warnings, 0 checks, 78 lines checked
1b54d465e7b9 drm/i915/display: Make get_vblank_counter use intel_de_read_fw()
-:8: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#8: 
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
8b56fc7691e5 drm/i915/display: Do not take uncore lock in i915_get_vblank_counter
-:43: ERROR:CODE_INDENT: code indent should use tabs where possible
#43: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:113:
+^I^I^I^I        PIPEFRAME(display, pipe));$

-:43: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#43: FILE: drivers/gpu/drm/i915/display/intel_vblank.c:113:
+	frame = intel_de_read64_2x32_fw(display, PIPEFRAMEPIXEL(display, pipe),
+				        PIPEFRAME(display, pipe));

-:60: WARNING:LINE_SPACING: Missing a blank line after declarations
#60: FILE: drivers/gpu/drm/i915/intel_uncore.h:457:
+	u32 upper, lower, old_upper, loop = 0;
+	upper = intel_uncore_read_fw(uncore, upper_reg);

total: 1 errors, 1 warnings, 1 checks, 85 lines checked
fb74330e80cb drm/i915/display: Make icl_dsi_frame_update use _fw too
a69962d6f172 drm/i915/display: Use intel_de_read/write_fw in colorops
-:123: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#123: FILE: drivers/gpu/drm/i915/display/intel_color.c:1054:
+	intel_de_write_fw(display, GAMMA_MODE(crtc->pipe),
 		       crtc_state->gamma_mode);

-:143: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 1 warnings, 1 checks, 24 lines checked
8df0d43f9e1d drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#14: 
<3> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

-:216: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 2 warnings, 0 checks, 124 lines checked
c5056eedfef3 drm/i915/display: Make set_pipeconf use the fw variants
-:11: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#11: 
| BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48

-:46: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#46: 
Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>

-:76: WARNING:MISSING_FIXES_TAG: The commit message has 'Call Trace:', perhaps it also needs a 'Fixes:' tag?

total: 0 errors, 3 warnings, 0 checks, 22 lines checked
3ac9beff8602 drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
-:22: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#22: 
Reported-by: Clark Williams <williams@redhat.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

total: 0 errors, 1 warnings, 0 checks, 53 lines checked
7ef7e54f7fc3 drm/i915: Drop the irqs_disabled() check
-:16: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#16: 
Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>

total: 0 errors, 1 warnings, 0 checks, 14 lines checked
37a6c2e27c86 drm/i915/guc: Consider also RCU depth in busy loop.
-:13: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#13: 
Reported-by: "John B. Wyatt IV" <jwyatt@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

-:27: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#27: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.h:365:
+	bool not_atomic = !in_atomic() && !irqs_disabled() && !rcu_preempt_depth();

total: 1 errors, 1 warnings, 0 checks, 8 lines checked
556c4af2ecc5 drm/i915/gt: Fix selftests on PREEMPT_RT
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 26 lines checked
6941d2ec72c4 drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT
-:20: WARNING:LONG_LINE_COMMENT: line length of 101 exceeds 100 columns
#20: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:1610:
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */

-:20: ERROR:IN_ATOMIC: do not use in_atomic in drivers
#20: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:1610:
+	if (in_atomic() || irqs_disabled() || rcu_preempt_depth()) /* inside atomic preempt-reset? */

total: 1 errors, 1 warnings, 0 checks, 8 lines checked
84824a55d1ee drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo
27f9e2fb2b55 drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT
5ff6bf8c03a8 Revert "drm/i915: Depend on !PREEMPT_RT."
5acc88fe2a15 PREEMPT_RT injection
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 43 lines checked
a3eaa726cbcb FOR-CI: bump MAX_STACK_TRACE_ENTRIES
68328fd85575 drm/i915/gt: Add a spinlock to prevent starvation of irq_work.
-:65: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#65: FILE: drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h:43:
+	spinlock_t signaler_active_sync;

-:68: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Sebastian Andrzej Siewior <bigeasy@linutronix.de>'

total: 1 errors, 0 warnings, 1 checks, 40 lines checked
c63714c44647 drm/xe/display: Always use system memory on PREEMPT_RT for DPT.
-:11: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#11: 
Reported-by: Alexander B Slota <alexander.b.slota@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>

total: 0 errors, 1 warnings, 0 checks, 14 lines checked
5c2eea77f075 drm/xe/display: Prefer not to allocate a framebuffers in stolen memory

✓ CI.KUnit: success for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159034/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:33:19] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:33:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:33:54] Starting KUnit Kernel (1/1)...
[20:33:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:33:54] ================== guc_buf (11 subtests) ===================
[20:33:54] [PASSED] test_smallest
[20:33:54] [PASSED] test_largest
[20:33:54] [PASSED] test_granular
[20:33:54] [PASSED] test_unique
[20:33:54] [PASSED] test_overlap
[20:33:54] [PASSED] test_reusable
[20:33:54] [PASSED] test_too_big
[20:33:54] [PASSED] test_flush
[20:33:54] [PASSED] test_lookup
[20:33:54] [PASSED] test_data
[20:33:54] [PASSED] test_class
[20:33:54] ===================== [PASSED] guc_buf =====================
[20:33:54] =================== guc_dbm (7 subtests) ===================
[20:33:54] [PASSED] test_empty
[20:33:54] [PASSED] test_default
[20:33:54] ======================== test_size  ========================
[20:33:54] [PASSED] 4
[20:33:54] [PASSED] 8
[20:33:54] [PASSED] 32
[20:33:54] [PASSED] 256
[20:33:54] ==================== [PASSED] test_size ====================
[20:33:54] ======================= test_reuse  ========================
[20:33:54] [PASSED] 4
[20:33:54] [PASSED] 8
[20:33:54] [PASSED] 32
[20:33:54] [PASSED] 256
[20:33:54] =================== [PASSED] test_reuse ====================
[20:33:54] =================== test_range_overlap  ====================
[20:33:54] [PASSED] 4
[20:33:54] [PASSED] 8
[20:33:54] [PASSED] 32
[20:33:54] [PASSED] 256
[20:33:54] =============== [PASSED] test_range_overlap ================
[20:33:54] =================== test_range_compact  ====================
[20:33:54] [PASSED] 4
[20:33:54] [PASSED] 8
[20:33:54] [PASSED] 32
[20:33:54] [PASSED] 256
[20:33:54] =============== [PASSED] test_range_compact ================
[20:33:54] ==================== test_range_spare  =====================
[20:33:54] [PASSED] 4
[20:33:54] [PASSED] 8
[20:33:54] [PASSED] 32
[20:33:54] [PASSED] 256
[20:33:54] ================ [PASSED] test_range_spare =================
[20:33:54] ===================== [PASSED] guc_dbm =====================
[20:33:54] =================== guc_idm (6 subtests) ===================
[20:33:54] [PASSED] bad_init
[20:33:54] [PASSED] no_init
[20:33:54] [PASSED] init_fini
[20:33:54] [PASSED] check_used
[20:33:54] [PASSED] check_quota
[20:33:54] [PASSED] check_all
[20:33:54] ===================== [PASSED] guc_idm =====================
[20:33:54] ================== no_relay (3 subtests) ===================
[20:33:54] [PASSED] xe_drops_guc2pf_if_not_ready
[20:33:54] [PASSED] xe_drops_guc2vf_if_not_ready
[20:33:54] [PASSED] xe_rejects_send_if_not_ready
[20:33:54] ==================== [PASSED] no_relay =====================
[20:33:54] ================== pf_relay (14 subtests) ==================
[20:33:54] [PASSED] pf_rejects_guc2pf_too_short
[20:33:54] [PASSED] pf_rejects_guc2pf_too_long
[20:33:54] [PASSED] pf_rejects_guc2pf_no_payload
[20:33:54] [PASSED] pf_fails_no_payload
[20:33:54] [PASSED] pf_fails_bad_origin
[20:33:54] [PASSED] pf_fails_bad_type
[20:33:54] [PASSED] pf_txn_reports_error
[20:33:54] [PASSED] pf_txn_sends_pf2guc
[20:33:54] [PASSED] pf_sends_pf2guc
[20:33:54] [SKIPPED] pf_loopback_nop
[20:33:54] [SKIPPED] pf_loopback_echo
[20:33:54] [SKIPPED] pf_loopback_fail
[20:33:54] [SKIPPED] pf_loopback_busy
[20:33:54] [SKIPPED] pf_loopback_retry
[20:33:54] ==================== [PASSED] pf_relay =====================
[20:33:54] ================== vf_relay (3 subtests) ===================
[20:33:54] [PASSED] vf_rejects_guc2vf_too_short
[20:33:54] [PASSED] vf_rejects_guc2vf_too_long
[20:33:54] [PASSED] vf_rejects_guc2vf_no_payload
[20:33:54] ==================== [PASSED] vf_relay =====================
[20:33:54] ================ pf_gt_config (9 subtests) =================
[20:33:54] [PASSED] fair_contexts_1vf
[20:33:54] [PASSED] fair_doorbells_1vf
[20:33:54] [PASSED] fair_ggtt_1vf
[20:33:54] ====================== fair_vram_1vf  ======================
[20:33:54] [PASSED] 3.50 GiB
[20:33:54] [PASSED] 11.5 GiB
[20:33:54] [PASSED] 15.5 GiB
[20:33:54] [PASSED] 31.5 GiB
[20:33:54] [PASSED] 63.5 GiB
[20:33:54] [PASSED] 1.91 GiB
[20:33:54] ================== [PASSED] fair_vram_1vf ==================
[20:33:54] ================ fair_vram_1vf_admin_only  =================
[20:33:54] [PASSED] 3.50 GiB
[20:33:54] [PASSED] 11.5 GiB
[20:33:54] [PASSED] 15.5 GiB
[20:33:54] [PASSED] 31.5 GiB
[20:33:54] [PASSED] 63.5 GiB
[20:33:54] [PASSED] 1.91 GiB
[20:33:54] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:33:54] ====================== fair_contexts  ======================
[20:33:54] [PASSED] 1 VF
[20:33:54] [PASSED] 2 VFs
[20:33:54] [PASSED] 3 VFs
[20:33:54] [PASSED] 4 VFs
[20:33:54] [PASSED] 5 VFs
[20:33:54] [PASSED] 6 VFs
[20:33:54] [PASSED] 7 VFs
[20:33:54] [PASSED] 8 VFs
[20:33:54] [PASSED] 9 VFs
[20:33:54] [PASSED] 10 VFs
[20:33:54] [PASSED] 11 VFs
[20:33:54] [PASSED] 12 VFs
[20:33:54] [PASSED] 13 VFs
[20:33:54] [PASSED] 14 VFs
[20:33:54] [PASSED] 15 VFs
[20:33:54] [PASSED] 16 VFs
[20:33:54] [PASSED] 17 VFs
[20:33:54] [PASSED] 18 VFs
[20:33:54] [PASSED] 19 VFs
[20:33:54] [PASSED] 20 VFs
[20:33:54] [PASSED] 21 VFs
[20:33:54] [PASSED] 22 VFs
[20:33:54] [PASSED] 23 VFs
[20:33:54] [PASSED] 24 VFs
[20:33:54] [PASSED] 25 VFs
[20:33:54] [PASSED] 26 VFs
[20:33:54] [PASSED] 27 VFs
[20:33:54] [PASSED] 28 VFs
[20:33:54] [PASSED] 29 VFs
[20:33:54] [PASSED] 30 VFs
[20:33:54] [PASSED] 31 VFs
[20:33:54] [PASSED] 32 VFs
[20:33:54] [PASSED] 33 VFs
[20:33:54] [PASSED] 34 VFs
[20:33:54] [PASSED] 35 VFs
[20:33:54] [PASSED] 36 VFs
[20:33:54] [PASSED] 37 VFs
[20:33:54] [PASSED] 38 VFs
[20:33:54] [PASSED] 39 VFs
[20:33:54] [PASSED] 40 VFs
[20:33:54] [PASSED] 41 VFs
[20:33:54] [PASSED] 42 VFs
[20:33:54] [PASSED] 43 VFs
[20:33:54] [PASSED] 44 VFs
[20:33:54] [PASSED] 45 VFs
[20:33:54] [PASSED] 46 VFs
[20:33:54] [PASSED] 47 VFs
[20:33:54] [PASSED] 48 VFs
[20:33:54] [PASSED] 49 VFs
[20:33:54] [PASSED] 50 VFs
[20:33:54] [PASSED] 51 VFs
[20:33:54] [PASSED] 52 VFs
[20:33:54] [PASSED] 53 VFs
[20:33:54] [PASSED] 54 VFs
[20:33:54] [PASSED] 55 VFs
[20:33:55] [PASSED] 56 VFs
[20:33:55] [PASSED] 57 VFs
[20:33:55] [PASSED] 58 VFs
[20:33:55] [PASSED] 59 VFs
[20:33:55] [PASSED] 60 VFs
[20:33:55] [PASSED] 61 VFs
[20:33:55] [PASSED] 62 VFs
[20:33:55] [PASSED] 63 VFs
[20:33:55] ================== [PASSED] fair_contexts ==================
[20:33:55] ===================== fair_doorbells  ======================
[20:33:55] [PASSED] 1 VF
[20:33:55] [PASSED] 2 VFs
[20:33:55] [PASSED] 3 VFs
[20:33:55] [PASSED] 4 VFs
[20:33:55] [PASSED] 5 VFs
[20:33:55] [PASSED] 6 VFs
[20:33:55] [PASSED] 7 VFs
[20:33:55] [PASSED] 8 VFs
[20:33:55] [PASSED] 9 VFs
[20:33:55] [PASSED] 10 VFs
[20:33:55] [PASSED] 11 VFs
[20:33:55] [PASSED] 12 VFs
[20:33:55] [PASSED] 13 VFs
[20:33:55] [PASSED] 14 VFs
[20:33:55] [PASSED] 15 VFs
[20:33:55] [PASSED] 16 VFs
[20:33:55] [PASSED] 17 VFs
[20:33:55] [PASSED] 18 VFs
[20:33:55] [PASSED] 19 VFs
[20:33:55] [PASSED] 20 VFs
[20:33:55] [PASSED] 21 VFs
[20:33:55] [PASSED] 22 VFs
[20:33:55] [PASSED] 23 VFs
[20:33:55] [PASSED] 24 VFs
[20:33:55] [PASSED] 25 VFs
[20:33:55] [PASSED] 26 VFs
[20:33:55] [PASSED] 27 VFs
[20:33:55] [PASSED] 28 VFs
[20:33:55] [PASSED] 29 VFs
[20:33:55] [PASSED] 30 VFs
[20:33:55] [PASSED] 31 VFs
[20:33:55] [PASSED] 32 VFs
[20:33:55] [PASSED] 33 VFs
[20:33:55] [PASSED] 34 VFs
[20:33:55] [PASSED] 35 VFs
[20:33:55] [PASSED] 36 VFs
[20:33:55] [PASSED] 37 VFs
[20:33:55] [PASSED] 38 VFs
[20:33:55] [PASSED] 39 VFs
[20:33:55] [PASSED] 40 VFs
[20:33:55] [PASSED] 41 VFs
[20:33:55] [PASSED] 42 VFs
[20:33:55] [PASSED] 43 VFs
[20:33:55] [PASSED] 44 VFs
[20:33:55] [PASSED] 45 VFs
[20:33:55] [PASSED] 46 VFs
[20:33:55] [PASSED] 47 VFs
[20:33:55] [PASSED] 48 VFs
[20:33:55] [PASSED] 49 VFs
[20:33:55] [PASSED] 50 VFs
[20:33:55] [PASSED] 51 VFs
[20:33:55] [PASSED] 52 VFs
[20:33:55] [PASSED] 53 VFs
[20:33:55] [PASSED] 54 VFs
[20:33:55] [PASSED] 55 VFs
[20:33:55] [PASSED] 56 VFs
[20:33:55] [PASSED] 57 VFs
[20:33:55] [PASSED] 58 VFs
[20:33:55] [PASSED] 59 VFs
[20:33:55] [PASSED] 60 VFs
[20:33:55] [PASSED] 61 VFs
[20:33:55] [PASSED] 62 VFs
[20:33:55] [PASSED] 63 VFs
[20:33:55] ================= [PASSED] fair_doorbells ==================
[20:33:55] ======================== fair_ggtt  ========================
[20:33:55] [PASSED] 1 VF
[20:33:55] [PASSED] 2 VFs
[20:33:55] [PASSED] 3 VFs
[20:33:55] [PASSED] 4 VFs
[20:33:55] [PASSED] 5 VFs
[20:33:55] [PASSED] 6 VFs
[20:33:55] [PASSED] 7 VFs
[20:33:55] [PASSED] 8 VFs
[20:33:55] [PASSED] 9 VFs
[20:33:55] [PASSED] 10 VFs
[20:33:55] [PASSED] 11 VFs
[20:33:55] [PASSED] 12 VFs
[20:33:55] [PASSED] 13 VFs
[20:33:55] [PASSED] 14 VFs
[20:33:55] [PASSED] 15 VFs
[20:33:55] [PASSED] 16 VFs
[20:33:55] [PASSED] 17 VFs
[20:33:55] [PASSED] 18 VFs
[20:33:55] [PASSED] 19 VFs
[20:33:55] [PASSED] 20 VFs
[20:33:55] [PASSED] 21 VFs
[20:33:55] [PASSED] 22 VFs
[20:33:55] [PASSED] 23 VFs
[20:33:55] [PASSED] 24 VFs
[20:33:55] [PASSED] 25 VFs
[20:33:55] [PASSED] 26 VFs
[20:33:55] [PASSED] 27 VFs
[20:33:55] [PASSED] 28 VFs
[20:33:55] [PASSED] 29 VFs
[20:33:55] [PASSED] 30 VFs
[20:33:55] [PASSED] 31 VFs
[20:33:55] [PASSED] 32 VFs
[20:33:55] [PASSED] 33 VFs
[20:33:55] [PASSED] 34 VFs
[20:33:55] [PASSED] 35 VFs
[20:33:55] [PASSED] 36 VFs
[20:33:55] [PASSED] 37 VFs
[20:33:55] [PASSED] 38 VFs
[20:33:55] [PASSED] 39 VFs
[20:33:55] [PASSED] 40 VFs
[20:33:55] [PASSED] 41 VFs
[20:33:55] [PASSED] 42 VFs
[20:33:55] [PASSED] 43 VFs
[20:33:55] [PASSED] 44 VFs
[20:33:55] [PASSED] 45 VFs
[20:33:55] [PASSED] 46 VFs
[20:33:55] [PASSED] 47 VFs
[20:33:55] [PASSED] 48 VFs
[20:33:55] [PASSED] 49 VFs
[20:33:55] [PASSED] 50 VFs
[20:33:55] [PASSED] 51 VFs
[20:33:55] [PASSED] 52 VFs
[20:33:55] [PASSED] 53 VFs
[20:33:55] [PASSED] 54 VFs
[20:33:55] [PASSED] 55 VFs
[20:33:55] [PASSED] 56 VFs
[20:33:55] [PASSED] 57 VFs
[20:33:55] [PASSED] 58 VFs
[20:33:55] [PASSED] 59 VFs
[20:33:55] [PASSED] 60 VFs
[20:33:55] [PASSED] 61 VFs
[20:33:55] [PASSED] 62 VFs
[20:33:55] [PASSED] 63 VFs
[20:33:55] ==================== [PASSED] fair_ggtt ====================
[20:33:55] ======================== fair_vram  ========================
[20:33:55] [PASSED] 1 VF
[20:33:55] [PASSED] 2 VFs
[20:33:55] [PASSED] 3 VFs
[20:33:55] [PASSED] 4 VFs
[20:33:55] [PASSED] 5 VFs
[20:33:55] [PASSED] 6 VFs
[20:33:55] [PASSED] 7 VFs
[20:33:55] [PASSED] 8 VFs
[20:33:55] [PASSED] 9 VFs
[20:33:55] [PASSED] 10 VFs
[20:33:55] [PASSED] 11 VFs
[20:33:55] [PASSED] 12 VFs
[20:33:55] [PASSED] 13 VFs
[20:33:55] [PASSED] 14 VFs
[20:33:55] [PASSED] 15 VFs
[20:33:55] [PASSED] 16 VFs
[20:33:55] [PASSED] 17 VFs
[20:33:55] [PASSED] 18 VFs
[20:33:55] [PASSED] 19 VFs
[20:33:55] [PASSED] 20 VFs
[20:33:55] [PASSED] 21 VFs
[20:33:55] [PASSED] 22 VFs
[20:33:55] [PASSED] 23 VFs
[20:33:55] [PASSED] 24 VFs
[20:33:55] [PASSED] 25 VFs
[20:33:55] [PASSED] 26 VFs
[20:33:55] [PASSED] 27 VFs
[20:33:55] [PASSED] 28 VFs
[20:33:55] [PASSED] 29 VFs
[20:33:55] [PASSED] 30 VFs
[20:33:55] [PASSED] 31 VFs
[20:33:55] [PASSED] 32 VFs
[20:33:55] [PASSED] 33 VFs
[20:33:55] [PASSED] 34 VFs
[20:33:55] [PASSED] 35 VFs
[20:33:55] [PASSED] 36 VFs
[20:33:55] [PASSED] 37 VFs
[20:33:55] [PASSED] 38 VFs
[20:33:55] [PASSED] 39 VFs
[20:33:55] [PASSED] 40 VFs
[20:33:55] [PASSED] 41 VFs
[20:33:55] [PASSED] 42 VFs
[20:33:55] [PASSED] 43 VFs
[20:33:55] [PASSED] 44 VFs
[20:33:55] [PASSED] 45 VFs
[20:33:55] [PASSED] 46 VFs
[20:33:55] [PASSED] 47 VFs
[20:33:55] [PASSED] 48 VFs
[20:33:55] [PASSED] 49 VFs
[20:33:55] [PASSED] 50 VFs
[20:33:55] [PASSED] 51 VFs
[20:33:55] [PASSED] 52 VFs
[20:33:55] [PASSED] 53 VFs
[20:33:55] [PASSED] 54 VFs
[20:33:55] [PASSED] 55 VFs
[20:33:55] [PASSED] 56 VFs
[20:33:55] [PASSED] 57 VFs
[20:33:55] [PASSED] 58 VFs
[20:33:55] [PASSED] 59 VFs
[20:33:55] [PASSED] 60 VFs
[20:33:55] [PASSED] 61 VFs
[20:33:55] [PASSED] 62 VFs
[20:33:55] [PASSED] 63 VFs
[20:33:55] ==================== [PASSED] fair_vram ====================
[20:33:55] ================== [PASSED] pf_gt_config ===================
[20:33:55] ===================== lmtt (1 subtest) =====================
[20:33:55] ======================== test_ops  =========================
[20:33:55] [PASSED] 2-level
[20:33:55] [PASSED] multi-level
[20:33:55] ==================== [PASSED] test_ops =====================
[20:33:55] ====================== [PASSED] lmtt =======================
[20:33:55] ================= pf_service (11 subtests) =================
[20:33:55] [PASSED] pf_negotiate_any
[20:33:55] [PASSED] pf_negotiate_base_match
[20:33:55] [PASSED] pf_negotiate_base_newer
[20:33:55] [PASSED] pf_negotiate_base_next
[20:33:55] [SKIPPED] pf_negotiate_base_older
[20:33:55] [PASSED] pf_negotiate_base_prev
[20:33:55] [PASSED] pf_negotiate_latest_match
[20:33:55] [PASSED] pf_negotiate_latest_newer
[20:33:55] [PASSED] pf_negotiate_latest_next
[20:33:55] [SKIPPED] pf_negotiate_latest_older
[20:33:55] [SKIPPED] pf_negotiate_latest_prev
[20:33:55] =================== [PASSED] pf_service ====================
[20:33:55] ================= xe_guc_g2g (2 subtests) ==================
[20:33:55] ============== xe_live_guc_g2g_kunit_default  ==============
[20:33:55] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:33:55] ============== xe_live_guc_g2g_kunit_allmem  ===============
[20:33:55] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:33:55] =================== [SKIPPED] xe_guc_g2g ===================
[20:33:55] =================== xe_mocs (2 subtests) ===================
[20:33:55] ================ xe_live_mocs_kernel_kunit  ================
[20:33:55] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:33:55] ================ xe_live_mocs_reset_kunit  =================
[20:33:55] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:33:55] ==================== [SKIPPED] xe_mocs =====================
[20:33:55] ================= xe_migrate (2 subtests) ==================
[20:33:55] ================= xe_migrate_sanity_kunit  =================
[20:33:55] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:33:55] ================== xe_validate_ccs_kunit  ==================
[20:33:55] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:33:55] =================== [SKIPPED] xe_migrate ===================
[20:33:55] ================== xe_dma_buf (1 subtest) ==================
[20:33:55] ==================== xe_dma_buf_kunit  =====================
[20:33:55] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:33:55] =================== [SKIPPED] xe_dma_buf ===================
[20:33:55] ================= xe_bo_shrink (1 subtest) =================
[20:33:55] =================== xe_bo_shrink_kunit  ====================
[20:33:55] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:33:55] ================== [SKIPPED] xe_bo_shrink ==================
[20:33:55] ==================== xe_bo (2 subtests) ====================
[20:33:55] ================== xe_ccs_migrate_kunit  ===================
[20:33:55] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:33:55] ==================== xe_bo_evict_kunit  ====================
[20:33:55] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:33:55] ===================== [SKIPPED] xe_bo ======================
[20:33:55] ==================== args (13 subtests) ====================
[20:33:55] [PASSED] count_args_test
[20:33:55] [PASSED] call_args_example
[20:33:55] [PASSED] call_args_test
[20:33:55] [PASSED] drop_first_arg_example
[20:33:55] [PASSED] drop_first_arg_test
[20:33:55] [PASSED] first_arg_example
[20:33:55] [PASSED] first_arg_test
[20:33:55] [PASSED] last_arg_example
[20:33:55] [PASSED] last_arg_test
[20:33:55] [PASSED] pick_arg_example
[20:33:55] [PASSED] if_args_example
[20:33:55] [PASSED] if_args_test
[20:33:55] [PASSED] sep_comma_example
[20:33:55] ====================== [PASSED] args =======================
[20:33:55] =================== xe_pci (3 subtests) ====================
[20:33:55] ==================== check_graphics_ip  ====================
[20:33:55] [PASSED] 12.00 Xe_LP
[20:33:55] [PASSED] 12.10 Xe_LP+
[20:33:55] [PASSED] 12.55 Xe_HPG
[20:33:55] [PASSED] 12.60 Xe_HPC
[20:33:55] [PASSED] 12.70 Xe_LPG
[20:33:55] [PASSED] 12.71 Xe_LPG
[20:33:55] [PASSED] 12.74 Xe_LPG+
[20:33:55] [PASSED] 20.01 Xe2_HPG
[20:33:55] [PASSED] 20.02 Xe2_HPG
[20:33:55] [PASSED] 20.04 Xe2_LPG
[20:33:55] [PASSED] 30.00 Xe3_LPG
[20:33:55] [PASSED] 30.01 Xe3_LPG
[20:33:55] [PASSED] 30.03 Xe3_LPG
[20:33:55] [PASSED] 30.04 Xe3_LPG
[20:33:55] [PASSED] 30.05 Xe3_LPG
[20:33:55] [PASSED] 35.10 Xe3p_LPG
[20:33:55] [PASSED] 35.11 Xe3p_XPC
[20:33:55] ================ [PASSED] check_graphics_ip ================
[20:33:55] ===================== check_media_ip  ======================
[20:33:55] [PASSED] 12.00 Xe_M
[20:33:55] [PASSED] 12.55 Xe_HPM
[20:33:55] [PASSED] 13.00 Xe_LPM+
[20:33:55] [PASSED] 13.01 Xe2_HPM
[20:33:55] [PASSED] 20.00 Xe2_LPM
[20:33:55] [PASSED] 30.00 Xe3_LPM
[20:33:55] [PASSED] 30.02 Xe3_LPM
[20:33:55] [PASSED] 35.00 Xe3p_LPM
[20:33:55] [PASSED] 35.03 Xe3p_HPM
[20:33:55] ================= [PASSED] check_media_ip ==================
[20:33:55] =================== check_platform_desc  ===================
[20:33:55] [PASSED] 0x9A60 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A68 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A70 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A40 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A49 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A59 (TIGERLAKE)
[20:33:55] [PASSED] 0x9A78 (TIGERLAKE)
[20:33:55] [PASSED] 0x9AC0 (TIGERLAKE)
[20:33:55] [PASSED] 0x9AC9 (TIGERLAKE)
[20:33:55] [PASSED] 0x9AD9 (TIGERLAKE)
[20:33:55] [PASSED] 0x9AF8 (TIGERLAKE)
[20:33:55] [PASSED] 0x4C80 (ROCKETLAKE)
[20:33:55] [PASSED] 0x4C8A (ROCKETLAKE)
[20:33:55] [PASSED] 0x4C8B (ROCKETLAKE)
[20:33:55] [PASSED] 0x4C8C (ROCKETLAKE)
[20:33:55] [PASSED] 0x4C90 (ROCKETLAKE)
[20:33:55] [PASSED] 0x4C9A (ROCKETLAKE)
[20:33:55] [PASSED] 0x4680 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4682 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4688 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x468A (ALDERLAKE_S)
[20:33:55] [PASSED] 0x468B (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4690 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4692 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4693 (ALDERLAKE_S)
[20:33:55] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46AA (ALDERLAKE_P)
[20:33:55] [PASSED] 0x462A (ALDERLAKE_P)
[20:33:55] [PASSED] 0x4626 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x4628 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:33:55] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:33:55] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:33:55] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:33:55] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:33:55] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:33:55] [PASSED] 0xA721 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA720 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:33:55] [PASSED] 0xA780 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA781 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA782 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA783 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA788 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA789 (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA78A (ALDERLAKE_S)
[20:33:55] [PASSED] 0xA78B (ALDERLAKE_S)
[20:33:55] [PASSED] 0x4905 (DG1)
[20:33:55] [PASSED] 0x4906 (DG1)
[20:33:55] [PASSED] 0x4907 (DG1)
[20:33:55] [PASSED] 0x4908 (DG1)
[20:33:55] [PASSED] 0x4909 (DG1)
[20:33:55] [PASSED] 0x56C0 (DG2)
[20:33:55] [PASSED] 0x56C2 (DG2)
[20:33:55] [PASSED] 0x56C1 (DG2)
[20:33:55] [PASSED] 0x7D51 (METEORLAKE)
[20:33:55] [PASSED] 0x7DD1 (METEORLAKE)
[20:33:55] [PASSED] 0x7D41 (METEORLAKE)
[20:33:55] [PASSED] 0x7D67 (METEORLAKE)
[20:33:55] [PASSED] 0xB640 (METEORLAKE)
[20:33:55] [PASSED] 0x56A0 (DG2)
[20:33:55] [PASSED] 0x56A1 (DG2)
[20:33:55] [PASSED] 0x56A2 (DG2)
[20:33:55] [PASSED] 0x56BE (DG2)
[20:33:55] [PASSED] 0x56BF (DG2)
[20:33:55] [PASSED] 0x5690 (DG2)
[20:33:55] [PASSED] 0x5691 (DG2)
[20:33:55] [PASSED] 0x5692 (DG2)
[20:33:55] [PASSED] 0x56A5 (DG2)
[20:33:55] [PASSED] 0x56A6 (DG2)
[20:33:55] [PASSED] 0x56B0 (DG2)
[20:33:55] [PASSED] 0x56B1 (DG2)
[20:33:55] [PASSED] 0x56BA (DG2)
[20:33:55] [PASSED] 0x56BB (DG2)
[20:33:55] [PASSED] 0x56BC (DG2)
[20:33:55] [PASSED] 0x56BD (DG2)
[20:33:55] [PASSED] 0x5693 (DG2)
[20:33:55] [PASSED] 0x5694 (DG2)
[20:33:55] [PASSED] 0x5695 (DG2)
[20:33:55] [PASSED] 0x56A3 (DG2)
[20:33:55] [PASSED] 0x56A4 (DG2)
[20:33:55] [PASSED] 0x56B2 (DG2)
[20:33:55] [PASSED] 0x56B3 (DG2)
[20:33:55] [PASSED] 0x5696 (DG2)
[20:33:55] [PASSED] 0x5697 (DG2)
[20:33:55] [PASSED] 0xB69 (PVC)
[20:33:55] [PASSED] 0xB6E (PVC)
[20:33:55] [PASSED] 0xBD4 (PVC)
[20:33:55] [PASSED] 0xBD5 (PVC)
[20:33:55] [PASSED] 0xBD6 (PVC)
[20:33:55] [PASSED] 0xBD7 (PVC)
[20:33:55] [PASSED] 0xBD8 (PVC)
[20:33:55] [PASSED] 0xBD9 (PVC)
[20:33:55] [PASSED] 0xBDA (PVC)
[20:33:55] [PASSED] 0xBDB (PVC)
[20:33:55] [PASSED] 0xBE0 (PVC)
[20:33:55] [PASSED] 0xBE1 (PVC)
[20:33:55] [PASSED] 0xBE5 (PVC)
[20:33:55] [PASSED] 0x7D40 (METEORLAKE)
[20:33:55] [PASSED] 0x7D45 (METEORLAKE)
[20:33:55] [PASSED] 0x7D55 (METEORLAKE)
[20:33:55] [PASSED] 0x7D60 (METEORLAKE)
[20:33:55] [PASSED] 0x7DD5 (METEORLAKE)
[20:33:55] [PASSED] 0x6420 (LUNARLAKE)
[20:33:55] [PASSED] 0x64A0 (LUNARLAKE)
[20:33:55] [PASSED] 0x64B0 (LUNARLAKE)
[20:33:55] [PASSED] 0xE202 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE209 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE20B (BATTLEMAGE)
[20:33:55] [PASSED] 0xE20C (BATTLEMAGE)
[20:33:55] [PASSED] 0xE20D (BATTLEMAGE)
[20:33:55] [PASSED] 0xE210 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE211 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE212 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE216 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE220 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE221 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE222 (BATTLEMAGE)
[20:33:55] [PASSED] 0xE223 (BATTLEMAGE)
[20:33:55] [PASSED] 0xB080 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB081 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB082 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB083 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB084 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB085 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB086 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB087 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB08F (PANTHERLAKE)
[20:33:55] [PASSED] 0xB090 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:33:55] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:33:55] [PASSED] 0xFD80 (PANTHERLAKE)
[20:33:55] [PASSED] 0xFD81 (PANTHERLAKE)
[20:33:55] [PASSED] 0xD740 (NOVALAKE_S)
[20:33:55] [PASSED] 0xD741 (NOVALAKE_S)
[20:33:55] [PASSED] 0xD742 (NOVALAKE_S)
[20:33:55] [PASSED] 0xD743 (NOVALAKE_S)
[20:33:55] [PASSED] 0xD745 (NOVALAKE_S)
[20:33:55] [PASSED] 0xD74A (NOVALAKE_S)
[20:33:55] [PASSED] 0xD74B (NOVALAKE_S)
[20:33:55] [PASSED] 0x674C (CRESCENTISLAND)
[20:33:55] [PASSED] 0x674D (CRESCENTISLAND)
[20:33:55] [PASSED] 0x674E (CRESCENTISLAND)
[20:33:55] [PASSED] 0x674F (CRESCENTISLAND)
[20:33:55] [PASSED] 0x6750 (CRESCENTISLAND)
[20:33:55] [PASSED] 0xD750 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD751 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD752 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD753 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD754 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD755 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD756 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD757 (NOVALAKE_P)
[20:33:55] [PASSED] 0xD75F (NOVALAKE_P)
[20:33:55] =============== [PASSED] check_platform_desc ===============
[20:33:55] ===================== [PASSED] xe_pci ======================
[20:33:55] ============= xe_rtp_tables_test (4 subtests) ==============
[20:33:55] ================== xe_rtp_table_gt_test  ===================
[20:33:55] [PASSED] gt_was/14011060649
[20:33:55] [PASSED] gt_was/14011059788
[20:33:55] [PASSED] gt_was/14015795083
[20:33:55] [PASSED] gt_was/16021867713
[20:33:55] [PASSED] gt_was/14019449301
[20:33:55] [PASSED] gt_was/16028005424
[20:33:55] [PASSED] gt_was/14026578760
[20:33:55] [PASSED] gt_was/1409420604
[20:33:55] [PASSED] gt_was/1408615072
[20:33:55] [PASSED] gt_was/22010523718
[20:33:55] [PASSED] gt_was/14011006942
[20:33:55] [PASSED] gt_was/14014830051
[20:33:55] [PASSED] gt_was/18018781329
[20:33:55] [PASSED] gt_was/1509235366
[20:33:55] [PASSED] gt_was/18018781329
[20:33:55] [PASSED] gt_was/16016694945
[20:33:55] [PASSED] gt_was/14018575942
[20:33:55] [PASSED] gt_was/22016670082
[20:33:55] [PASSED] gt_was/22016670082
[20:33:55] [PASSED] gt_was/14017421178
[20:33:55] [PASSED] gt_was/16025250150
[20:33:55] [PASSED] gt_was/14021871409
[20:33:55] [PASSED] gt_was/16021865536
[20:33:55] [PASSED] gt_was/14021486841
[20:33:55] [PASSED] gt_was/14025160223
[20:33:55] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[20:33:55] [PASSED] gt_was/14025635424
[20:33:55] [PASSED] gt_was/16028005424
[20:33:55] ============== [PASSED] xe_rtp_table_gt_test ===============
[20:33:55] ================== xe_rtp_table_gt_test  ===================
[20:33:55] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[20:33:55] [PASSED] gt_tunings/Tuning: 32B Access Enable
[20:33:55] [PASSED] gt_tunings/Tuning: L3 cache
[20:33:55] [PASSED] gt_tunings/Tuning: L3 cache - media
[20:33:55] [PASSED] gt_tunings/Tuning: Compression Overfetch
[20:33:55] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[20:33:55] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[20:33:55] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[20:33:55] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[20:33:55] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[20:33:55] [PASSED] gt_tunings/Tuning: Stateless compression control
[20:33:55] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[20:33:55] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[20:33:55] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[20:33:55] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[20:33:55] ============== [PASSED] xe_rtp_table_gt_test ===============
[20:33:55] ================== xe_rtp_table_oob_test  ==================
[20:33:55] [PASSED] oob_was/1607983814
[20:33:55] [PASSED] oob_was/16010904313
[20:33:55] [PASSED] oob_was/18022495364
[20:33:55] [PASSED] oob_was/22012773006
[20:33:55] [PASSED] oob_was/14014475959
[20:33:55] [PASSED] oob_was/22011391025
[20:33:55] [PASSED] oob_was/22012727170
[20:33:55] [PASSED] oob_was/22012727685
[20:33:55] [PASSED] oob_was/22016596838
[20:33:55] [PASSED] oob_was/18020744125
[20:33:55] [PASSED] oob_was/1409600907
[20:33:55] [PASSED] oob_was/22014953428
[20:33:55] [PASSED] oob_was/16017236439
[20:33:55] [PASSED] oob_was/14019821291
[20:33:55] [PASSED] oob_was/14015076503
[20:33:55] [PASSED] oob_was/14018913170
[20:33:55] [PASSED] oob_was/14018094691
[20:33:55] [PASSED] oob_was/18024947630
[20:33:55] [PASSED] oob_was/16022287689
[20:33:55] [PASSED] oob_was/13011645652
[20:33:55] [PASSED] oob_was/14022293748
[20:33:55] [PASSED] oob_was/22019794406
[20:33:55] [PASSED] oob_was/22019338487
[20:33:55] [PASSED] oob_was/16023588340
[20:33:55] [PASSED] oob_was/14019789679
[20:33:55] [PASSED] oob_was/14022866841
[20:33:55] [PASSED] oob_was/16021333562
[20:33:55] [PASSED] oob_was/14016712196
[20:33:55] [PASSED] oob_was/14015568240
[20:33:55] [PASSED] oob_was/18013179988
[20:33:55] [PASSED] oob_was/1508761755
[20:33:55] [PASSED] oob_was/16023105232
[20:33:55] [PASSED] oob_was/16026508708
[20:33:55] [PASSED] oob_was/14020001231
[20:33:55] [PASSED] oob_was/16023683509
[20:33:55] [PASSED] oob_was/14025515070
[20:33:55] [PASSED] oob_was/15015404425_disable
[20:33:55] [PASSED] oob_was/16026007364
[20:33:55] [PASSED] oob_was/14020316580
[20:33:55] [PASSED] oob_was/14025883347
[20:33:55] [PASSED] oob_was/16029380221
[20:33:55] ============== [PASSED] xe_rtp_table_oob_test ==============
[20:33:55] ================ xe_rtp_table_dev_oob_test  ================
[20:33:55] [PASSED] device_oob_was/22010954014
[20:33:55] [PASSED] device_oob_was/15015404425
[20:33:55] [PASSED] device_oob_was/22019338487_display
[20:33:55] [PASSED] device_oob_was/14022085890
[20:33:55] [PASSED] device_oob_was/14026539277
[20:33:55] [PASSED] device_oob_was/14026633728
[20:33:55] [PASSED] device_oob_was/14026746987
[20:33:55] [PASSED] device_oob_was/14026779378
[20:33:55] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[20:33:55] =============== [PASSED] xe_rtp_tables_test ================
[20:33:55] =================== xe_rtp (3 subtests) ====================
[20:33:55] =================== xe_rtp_rules_tests  ====================
[20:33:55] [PASSED] no
[20:33:55] [PASSED] yes
[20:33:55] [PASSED] no-and-no
[20:33:55] [PASSED] no-and-yes
[20:33:55] [PASSED] yes-and-no
[20:33:55] [PASSED] yes-and-yes
[20:33:55] [PASSED] no-or-no
[20:33:55] [PASSED] no-or-yes
[20:33:55] [PASSED] yes-or-no
[20:33:55] [PASSED] yes-or-yes
[20:33:55] [PASSED] no-yes-or-yes-no
[20:33:55] [PASSED] no-yes-or-yes-yes
[20:33:55] [PASSED] yes-yes-or-no-yes
[20:33:55] [PASSED] yes-yes-or-yes-yes
[20:33:55] [PASSED] no-no-or-yes-or-no
[20:33:55] [PASSED] or
[20:33:55] [PASSED] or-yes
[20:33:55] [PASSED] or-no
[20:33:55] [PASSED] yes-or
[20:33:55] [PASSED] no-or
[20:33:55] [PASSED] no-or-or-yes
[20:33:55] [PASSED] yes-or-or-no
[20:33:55] [PASSED] no-or-or-no
[20:33:55] [PASSED] missing-context-engine-class
[20:33:55] [PASSED] missing-context-engine-class-or-yes
[20:33:55] [PASSED] missing-context-engine-class-or-or-yes
[20:33:55] =============== [PASSED] xe_rtp_rules_tests ================
[20:33:55] =============== xe_rtp_process_to_sr_tests  ================
[20:33:55] [PASSED] coalesce-same-reg
[20:33:55] [PASSED] no-match-no-add
[20:33:55] [PASSED] two-regs-two-entries
[20:33:55] [PASSED] clr-one-set-other
[20:33:55] [PASSED] set-field
[20:33:55] [PASSED] conflict-duplicate
[20:33:55] [PASSED] conflict-not-disjoint
[20:33:55] [PASSED] conflict-reg-type
[20:33:55] [PASSED] bad-mcr-reg-forced-to-regular
[20:33:55] [PASSED] bad-regular-reg-forced-to-mcr
[20:33:55] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:33:55] ================== xe_rtp_process_tests  ===================
[20:33:55] [PASSED] active1
[20:33:55] [PASSED] active2
[20:33:55] [PASSED] active-inactive
[20:33:55] [PASSED] inactive-active
[20:33:55] [PASSED] inactive-active-inactive
[20:33:55] [PASSED] inactive-inactive-inactive
[20:33:55] ============== [PASSED] xe_rtp_process_tests ===============
[20:33:55] ===================== [PASSED] xe_rtp ======================
[20:33:55] ==================== xe_wa (1 subtest) =====================
[20:33:55] ======================== xe_wa_gt  =========================
[20:33:55] [PASSED] TIGERLAKE B0
[20:33:55] [PASSED] DG1 A0
[20:33:55] [PASSED] DG1 B0
[20:33:55] [PASSED] ALDERLAKE_S A0
[20:33:55] [PASSED] ALDERLAKE_S B0
[20:33:55] [PASSED] ALDERLAKE_S C0
[20:33:55] [PASSED] ALDERLAKE_S D0
[20:33:55] [PASSED] ALDERLAKE_P A0
[20:33:55] [PASSED] ALDERLAKE_P B0
[20:33:55] [PASSED] ALDERLAKE_P C0
[20:33:55] [PASSED] ALDERLAKE_S RPLS D0
[20:33:55] [PASSED] ALDERLAKE_P RPLU E0
[20:33:55] [PASSED] DG2 G10 C0
[20:33:55] [PASSED] DG2 G11 B1
[20:33:55] [PASSED] DG2 G12 A1
[20:33:55] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:33:55] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:33:55] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:33:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:33:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:33:55] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:33:55] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:33:55] ==================== [PASSED] xe_wa_gt =====================
[20:33:55] ====================== [PASSED] xe_wa ======================
[20:33:55] ============================================================
[20:33:55] Testing complete. Ran 717 tests: passed: 699, skipped: 18
[20:33:55] Elapsed time: 36.060s total, 4.305s configuring, 31.089s building, 0.641s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:33:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:33:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:34:21] Starting KUnit Kernel (1/1)...
[20:34:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:21] ============ drm_test_pick_cmdline (2 subtests) ============
[20:34:21] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:34:21] =============== drm_test_pick_cmdline_named  ===============
[20:34:21] [PASSED] NTSC
[20:34:21] [PASSED] NTSC-J
[20:34:21] [PASSED] PAL
[20:34:21] [PASSED] PAL-M
[20:34:21] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:34:21] ============== [PASSED] drm_test_pick_cmdline ==============
[20:34:21] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:34:21] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:34:21] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:34:21] =========== drm_validate_clone_mode (2 subtests) ===========
[20:34:21] ============== drm_test_check_in_clone_mode  ===============
[20:34:21] [PASSED] in_clone_mode
[20:34:21] [PASSED] not_in_clone_mode
[20:34:21] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:34:21] =============== drm_test_check_valid_clones  ===============
[20:34:21] [PASSED] not_in_clone_mode
[20:34:21] [PASSED] valid_clone
[20:34:21] [PASSED] invalid_clone
[20:34:21] =========== [PASSED] drm_test_check_valid_clones ===========
[20:34:21] ============= [PASSED] drm_validate_clone_mode =============
[20:34:21] ============= drm_validate_modeset (1 subtest) =============
[20:34:21] [PASSED] drm_test_check_connector_changed_modeset
[20:34:21] ============== [PASSED] drm_validate_modeset ===============
[20:34:21] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:34:21] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:34:21] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:34:21] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:34:21] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[20:34:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:34:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:34:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:34:21] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[20:34:21] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:34:21] ============== drm_bridge_alloc (2 subtests) ===============
[20:34:21] [PASSED] drm_test_drm_bridge_alloc_basic
[20:34:21] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:34:21] ================ [PASSED] drm_bridge_alloc =================
[20:34:21] ============= drm_bridge_bus_fmt (5 subtests) ==============
[20:34:21] [PASSED] drm_test_bridge_rgb_yuv_rgb
[20:34:21] [PASSED] drm_test_bridge_must_convert_to_yuv444
[20:34:21] [PASSED] drm_test_bridge_hdmi_auto_rgb
[20:34:21] [PASSED] drm_test_bridge_auto_first
[20:34:21] [PASSED] drm_test_bridge_rgb_yuv_no_path
[20:34:21] =============== [PASSED] drm_bridge_bus_fmt ================
[20:34:21] ============= drm_cmdline_parser (40 subtests) =============
[20:34:21] [PASSED] drm_test_cmdline_force_d_only
[20:34:21] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:34:21] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:34:21] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:34:21] [PASSED] drm_test_cmdline_force_e_only
[20:34:21] [PASSED] drm_test_cmdline_res
[20:34:21] [PASSED] drm_test_cmdline_res_vesa
[20:34:21] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:34:21] [PASSED] drm_test_cmdline_res_rblank
[20:34:21] [PASSED] drm_test_cmdline_res_bpp
[20:34:21] [PASSED] drm_test_cmdline_res_refresh
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:34:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:34:21] [PASSED] drm_test_cmdline_res_margins_force_on
[20:34:21] [PASSED] drm_test_cmdline_res_vesa_margins
[20:34:21] [PASSED] drm_test_cmdline_name
[20:34:21] [PASSED] drm_test_cmdline_name_bpp
[20:34:21] [PASSED] drm_test_cmdline_name_option
[20:34:21] [PASSED] drm_test_cmdline_name_bpp_option
[20:34:21] [PASSED] drm_test_cmdline_rotate_0
[20:34:21] [PASSED] drm_test_cmdline_rotate_90
[20:34:21] [PASSED] drm_test_cmdline_rotate_180
[20:34:21] [PASSED] drm_test_cmdline_rotate_270
[20:34:21] [PASSED] drm_test_cmdline_hmirror
[20:34:21] [PASSED] drm_test_cmdline_vmirror
[20:34:21] [PASSED] drm_test_cmdline_margin_options
[20:34:21] [PASSED] drm_test_cmdline_multiple_options
[20:34:21] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:34:21] [PASSED] drm_test_cmdline_extra_and_option
[20:34:21] [PASSED] drm_test_cmdline_freestanding_options
[20:34:21] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:34:21] [PASSED] drm_test_cmdline_panel_orientation
[20:34:21] ================ drm_test_cmdline_invalid  =================
[20:34:21] [PASSED] margin_only
[20:34:21] [PASSED] interlace_only
[20:34:21] [PASSED] res_missing_x
[20:34:21] [PASSED] res_missing_y
[20:34:21] [PASSED] res_bad_y
[20:34:21] [PASSED] res_missing_y_bpp
[20:34:21] [PASSED] res_bad_bpp
[20:34:21] [PASSED] res_bad_refresh
[20:34:21] [PASSED] res_bpp_refresh_force_on_off
[20:34:21] [PASSED] res_invalid_mode
[20:34:21] [PASSED] res_bpp_wrong_place_mode
[20:34:21] [PASSED] name_bpp_refresh
[20:34:21] [PASSED] name_refresh
[20:34:21] [PASSED] name_refresh_wrong_mode
[20:34:21] [PASSED] name_refresh_invalid_mode
[20:34:21] [PASSED] rotate_multiple
[20:34:21] [PASSED] rotate_invalid_val
[20:34:21] [PASSED] rotate_truncated
[20:34:21] [PASSED] invalid_option
[20:34:21] [PASSED] invalid_tv_option
[20:34:21] [PASSED] truncated_tv_option
[20:34:21] ============ [PASSED] drm_test_cmdline_invalid =============
[20:34:21] =============== drm_test_cmdline_tv_options  ===============
[20:34:21] [PASSED] NTSC
[20:34:21] [PASSED] NTSC_443
[20:34:21] [PASSED] NTSC_J
[20:34:21] [PASSED] PAL
[20:34:21] [PASSED] PAL_M
[20:34:21] [PASSED] PAL_N
[20:34:21] [PASSED] SECAM
[20:34:21] [PASSED] MONO_525
[20:34:21] [PASSED] MONO_625
[20:34:21] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:34:21] =============== [PASSED] drm_cmdline_parser ================
[20:34:21] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:34:21] [PASSED] drm_test_connector_hdmi_init_valid
[20:34:21] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:34:21] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:34:21] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:34:21] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:34:21] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:34:21] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:34:21] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:34:21] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:34:21] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:34:21] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:34:21] [PASSED] supported_formats=0x5 yuv420_allowed=1
[20:34:21] [PASSED] supported_formats=0x5 yuv420_allowed=0
[20:34:21] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:34:21] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:34:21] [PASSED] drm_test_connector_hdmi_init_null_product
[20:34:21] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:34:21] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:34:21] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:34:21] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:34:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:34:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:34:21] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:34:21] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:34:21] [PASSED] HDMI-A
[20:34:21] [PASSED] HDMI-B
[20:34:21] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:34:21] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:34:21] [PASSED] Unknown
[20:34:21] [PASSED] VGA
[20:34:21] [PASSED] DVI-I
[20:34:21] [PASSED] DVI-D
[20:34:21] [PASSED] DVI-A
[20:34:21] [PASSED] Composite
[20:34:21] [PASSED] SVIDEO
[20:34:21] [PASSED] LVDS
[20:34:21] [PASSED] Component
[20:34:21] [PASSED] DIN
[20:34:21] [PASSED] DP
[20:34:21] [PASSED] TV
[20:34:21] [PASSED] eDP
[20:34:21] [PASSED] Virtual
[20:34:21] [PASSED] DSI
[20:34:21] [PASSED] DPI
[20:34:21] [PASSED] Writeback
[20:34:21] [PASSED] SPI
[20:34:21] [PASSED] USB
[20:34:21] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:34:21] ============ [PASSED] drmm_connector_hdmi_init =============
[20:34:21] ============= drmm_connector_init (3 subtests) =============
[20:34:21] [PASSED] drm_test_drmm_connector_init
[20:34:21] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:34:21] ========= drm_test_drmm_connector_init_type_valid  =========
[20:34:21] [PASSED] Unknown
[20:34:21] [PASSED] VGA
[20:34:21] [PASSED] DVI-I
[20:34:21] [PASSED] DVI-D
[20:34:21] [PASSED] DVI-A
[20:34:21] [PASSED] Composite
[20:34:21] [PASSED] SVIDEO
[20:34:21] [PASSED] LVDS
[20:34:21] [PASSED] Component
[20:34:21] [PASSED] DIN
[20:34:21] [PASSED] DP
[20:34:21] [PASSED] HDMI-A
[20:34:21] [PASSED] HDMI-B
[20:34:21] [PASSED] TV
[20:34:21] [PASSED] eDP
[20:34:21] [PASSED] Virtual
[20:34:21] [PASSED] DSI
[20:34:21] [PASSED] DPI
[20:34:21] [PASSED] Writeback
[20:34:21] [PASSED] SPI
[20:34:21] [PASSED] USB
[20:34:21] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:34:21] =============== [PASSED] drmm_connector_init ===============
[20:34:21] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_init
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:34:21] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:34:21] [PASSED] Unknown
[20:34:21] [PASSED] VGA
[20:34:21] [PASSED] DVI-I
[20:34:21] [PASSED] DVI-D
[20:34:21] [PASSED] DVI-A
[20:34:21] [PASSED] Composite
[20:34:21] [PASSED] SVIDEO
[20:34:21] [PASSED] LVDS
[20:34:21] [PASSED] Component
[20:34:21] [PASSED] DIN
[20:34:21] [PASSED] DP
[20:34:21] [PASSED] HDMI-A
[20:34:21] [PASSED] HDMI-B
[20:34:21] [PASSED] TV
[20:34:21] [PASSED] eDP
[20:34:21] [PASSED] Virtual
[20:34:21] [PASSED] DSI
[20:34:21] [PASSED] DPI
[20:34:21] [PASSED] Writeback
[20:34:21] [PASSED] SPI
[20:34:21] [PASSED] USB
[20:34:21] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:34:21] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:34:21] [PASSED] Unknown
[20:34:21] [PASSED] VGA
[20:34:21] [PASSED] DVI-I
[20:34:21] [PASSED] DVI-D
[20:34:21] [PASSED] DVI-A
[20:34:21] [PASSED] Composite
[20:34:21] [PASSED] SVIDEO
[20:34:21] [PASSED] LVDS
[20:34:21] [PASSED] Component
[20:34:21] [PASSED] DIN
[20:34:21] [PASSED] DP
[20:34:21] [PASSED] HDMI-A
[20:34:21] [PASSED] HDMI-B
[20:34:21] [PASSED] TV
[20:34:21] [PASSED] eDP
[20:34:21] [PASSED] Virtual
[20:34:21] [PASSED] DSI
[20:34:21] [PASSED] DPI
[20:34:21] [PASSED] Writeback
[20:34:21] [PASSED] SPI
[20:34:21] [PASSED] USB
[20:34:21] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:34:21] =========== [PASSED] drm_connector_dynamic_init ============
[20:34:21] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:34:21] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:34:21] ======= drm_connector_dynamic_register (7 subtests) ========
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:34:21] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:34:21] ========= [PASSED] drm_connector_dynamic_register ==========
[20:34:21] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:34:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:34:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:34:21] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:34:21] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:34:21] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:34:21] [PASSED] NTSC
[20:34:21] [PASSED] NTSC-443
[20:34:21] [PASSED] NTSC-J
[20:34:21] [PASSED] PAL
[20:34:21] [PASSED] PAL-M
[20:34:21] [PASSED] PAL-N
[20:34:21] [PASSED] SECAM
[20:34:21] [PASSED] Mono
[20:34:21] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:34:21] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:34:21] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:34:21] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:34:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:34:21] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:34:21] [PASSED] VIC 96
[20:34:21] [PASSED] VIC 97
[20:34:21] [PASSED] VIC 101
[20:34:21] [PASSED] VIC 102
[20:34:21] [PASSED] VIC 106
[20:34:21] [PASSED] VIC 107
[20:34:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:34:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:34:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:34:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:34:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:34:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:34:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:34:21] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:34:21] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:34:21] [PASSED] Automatic
[20:34:21] [PASSED] Full
[20:34:21] [PASSED] Limited 16:235
[20:34:21] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:34:21] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:34:21] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:34:21] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:34:21] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:34:21] [PASSED] RGB
[20:34:21] [PASSED] YUV 4:2:0
[20:34:21] [PASSED] YUV 4:2:2
[20:34:21] [PASSED] YUV 4:4:4
[20:34:21] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:34:21] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:34:21] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:34:21] ============= drm_damage_helper (21 subtests) ==============
[20:34:21] [PASSED] drm_test_damage_iter_no_damage
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:34:21] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:34:21] [PASSED] drm_test_damage_iter_simple_damage
[20:34:21] [PASSED] drm_test_damage_iter_single_damage
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:34:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:34:21] [PASSED] drm_test_damage_iter_damage
[20:34:21] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:34:21] [PASSED] drm_test_damage_iter_damage_one_outside
[20:34:21] [PASSED] drm_test_damage_iter_damage_src_moved
[20:34:21] [PASSED] drm_test_damage_iter_damage_not_visible
[20:34:21] ================ [PASSED] drm_damage_helper ================
[20:34:21] ============== drm_dp_mst_helper (3 subtests) ==============
[20:34:21] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:34:21] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:34:21] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:34:21] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:34:21] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:34:21] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:34:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:34:21] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:34:21] [PASSED] Link rate 2000000 lane count 4
[20:34:21] [PASSED] Link rate 2000000 lane count 2
[20:34:21] [PASSED] Link rate 2000000 lane count 1
[20:34:21] [PASSED] Link rate 1350000 lane count 4
[20:34:21] [PASSED] Link rate 1350000 lane count 2
[20:34:21] [PASSED] Link rate 1350000 lane count 1
[20:34:21] [PASSED] Link rate 1000000 lane count 4
[20:34:21] [PASSED] Link rate 1000000 lane count 2
[20:34:21] [PASSED] Link rate 1000000 lane count 1
[20:34:21] [PASSED] Link rate 810000 lane count 4
[20:34:21] [PASSED] Link rate 810000 lane count 2
[20:34:21] [PASSED] Link rate 810000 lane count 1
[20:34:21] [PASSED] Link rate 540000 lane count 4
[20:34:21] [PASSED] Link rate 540000 lane count 2
[20:34:21] [PASSED] Link rate 540000 lane count 1
[20:34:21] [PASSED] Link rate 270000 lane count 4
[20:34:21] [PASSED] Link rate 270000 lane count 2
[20:34:21] [PASSED] Link rate 270000 lane count 1
[20:34:21] [PASSED] Link rate 162000 lane count 4
[20:34:21] [PASSED] Link rate 162000 lane count 2
[20:34:21] [PASSED] Link rate 162000 lane count 1
[20:34:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:34:21] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:34:21] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:34:21] [PASSED] DP_POWER_UP_PHY with port number
[20:34:21] [PASSED] DP_POWER_DOWN_PHY with port number
[20:34:21] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:34:21] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:34:21] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:34:21] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:34:21] [PASSED] DP_QUERY_PAYLOAD with port number
[20:34:21] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:34:21] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:34:21] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:34:21] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:34:21] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:34:21] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:34:21] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:34:21] [PASSED] DP_REMOTE_I2C_READ with port number
[20:34:21] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:34:21] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:34:21] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:34:21] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:34:21] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:34:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:34:21] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:34:21] ================ [PASSED] drm_dp_mst_helper ================
[20:34:21] ================== drm_exec (7 subtests) ===================
[20:34:21] [PASSED] sanitycheck
[20:34:21] [PASSED] test_lock
[20:34:21] [PASSED] test_lock_unlock
[20:34:21] [PASSED] test_duplicates
[20:34:21] [PASSED] test_prepare
[20:34:21] [PASSED] test_prepare_array
[20:34:21] [PASSED] test_multiple_loops
[20:34:21] ==================== [PASSED] drm_exec =====================
[20:34:21] =========== drm_format_helper_test (17 subtests) ===========
[20:34:21] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:34:21] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:34:21] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:34:21] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:34:21] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:34:21] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:34:21] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:34:21] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:34:21] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:34:21] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:34:21] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:34:21] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:34:21] ==================== drm_test_fb_swab  =====================
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ================ [PASSED] drm_test_fb_swab =================
[20:34:21] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:34:21] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:34:21] [PASSED] single_pixel_source_buffer
[20:34:21] [PASSED] single_pixel_clip_rectangle
[20:34:21] [PASSED] well_known_colors
[20:34:21] [PASSED] destination_pitch
[20:34:21] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:34:21] ================= drm_test_fb_clip_offset  =================
[20:34:21] [PASSED] pass through
[20:34:21] [PASSED] horizontal offset
[20:34:21] [PASSED] vertical offset
[20:34:21] [PASSED] horizontal and vertical offset
[20:34:21] [PASSED] horizontal offset (custom pitch)
[20:34:21] [PASSED] vertical offset (custom pitch)
[20:34:21] [PASSED] horizontal and vertical offset (custom pitch)
[20:34:21] ============= [PASSED] drm_test_fb_clip_offset =============
[20:34:21] =================== drm_test_fb_memcpy  ====================
[20:34:21] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:34:21] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:34:21] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:34:21] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:34:21] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:34:21] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:34:21] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:34:21] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:34:21] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:34:21] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:34:21] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:34:21] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:34:21] =============== [PASSED] drm_test_fb_memcpy ================
[20:34:21] ============= [PASSED] drm_format_helper_test ==============
[20:34:21] ================= drm_format (18 subtests) =================
[20:34:21] [PASSED] drm_test_format_block_width_invalid
[20:34:21] [PASSED] drm_test_format_block_width_one_plane
[20:34:21] [PASSED] drm_test_format_block_width_two_plane
[20:34:21] [PASSED] drm_test_format_block_width_three_plane
[20:34:21] [PASSED] drm_test_format_block_width_tiled
[20:34:21] [PASSED] drm_test_format_block_height_invalid
[20:34:21] [PASSED] drm_test_format_block_height_one_plane
[20:34:21] [PASSED] drm_test_format_block_height_two_plane
[20:34:21] [PASSED] drm_test_format_block_height_three_plane
[20:34:21] [PASSED] drm_test_format_block_height_tiled
[20:34:21] [PASSED] drm_test_format_min_pitch_invalid
[20:34:21] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:34:21] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:34:21] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:34:21] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:34:21] [PASSED] drm_test_format_min_pitch_two_plane
[20:34:21] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:34:21] [PASSED] drm_test_format_min_pitch_tiled
[20:34:21] =================== [PASSED] drm_format ====================
[20:34:21] ============== drm_framebuffer (10 subtests) ===============
[20:34:21] ========== drm_test_framebuffer_check_src_coords  ==========
[20:34:21] [PASSED] Success: source fits into fb
[20:34:21] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:34:21] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:34:21] [PASSED] Fail: overflowing fb with source width
[20:34:21] [PASSED] Fail: overflowing fb with source height
[20:34:21] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:34:21] [PASSED] drm_test_framebuffer_cleanup
[20:34:21] =============== drm_test_framebuffer_create  ===============
[20:34:21] [PASSED] ABGR8888 normal sizes
[20:34:21] [PASSED] ABGR8888 max sizes
[20:34:21] [PASSED] ABGR8888 pitch greater than min required
[20:34:21] [PASSED] ABGR8888 pitch less than min required
[20:34:21] [PASSED] ABGR8888 Invalid width
[20:34:21] [PASSED] ABGR8888 Invalid buffer handle
[20:34:21] [PASSED] No pixel format
[20:34:21] [PASSED] ABGR8888 Width 0
[20:34:21] [PASSED] ABGR8888 Height 0
[20:34:21] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:34:21] [PASSED] ABGR8888 Large buffer offset
[20:34:21] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:34:21] [PASSED] ABGR8888 Invalid flag
[20:34:21] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:34:21] [PASSED] ABGR8888 Valid buffer modifier
[20:34:21] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:34:21] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] NV12 Normal sizes
[20:34:21] [PASSED] NV12 Max sizes
[20:34:21] [PASSED] NV12 Invalid pitch
[20:34:21] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:34:21] [PASSED] NV12 different  modifier per-plane
[20:34:21] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:34:21] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] NV12 Modifier for inexistent plane
[20:34:21] [PASSED] NV12 Handle for inexistent plane
[20:34:21] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:34:21] [PASSED] YVU420 Normal sizes
[20:34:21] [PASSED] YVU420 Max sizes
[20:34:21] [PASSED] YVU420 Invalid pitch
[20:34:21] [PASSED] YVU420 Different pitches
[20:34:21] [PASSED] YVU420 Different buffer offsets/pitches
[20:34:21] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:34:21] [PASSED] YVU420 Valid modifier
[20:34:21] [PASSED] YVU420 Different modifiers per plane
[20:34:21] [PASSED] YVU420 Modifier for inexistent plane
[20:34:21] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:34:21] [PASSED] X0L2 Normal sizes
[20:34:21] [PASSED] X0L2 Max sizes
[20:34:21] [PASSED] X0L2 Invalid pitch
[20:34:21] [PASSED] X0L2 Pitch greater than minimum required
[20:34:21] [PASSED] X0L2 Handle for inexistent plane
[20:34:21] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:34:21] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:34:21] [PASSED] X0L2 Valid modifier
[20:34:21] [PASSED] X0L2 Modifier for inexistent plane
[20:34:21] =========== [PASSED] drm_test_framebuffer_create ===========
[20:34:21] [PASSED] drm_test_framebuffer_free
[20:34:21] [PASSED] drm_test_framebuffer_init
[20:34:21] [PASSED] drm_test_framebuffer_init_bad_format
[20:34:21] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:34:21] [PASSED] drm_test_framebuffer_lookup
[20:34:21] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:34:21] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:34:21] ================= [PASSED] drm_framebuffer =================
[20:34:21] ================ drm_gem_shmem (8 subtests) ================
[20:34:21] [PASSED] drm_gem_shmem_test_obj_create
[20:34:21] [PASSED] drm_gem_shmem_test_obj_create_private
[20:34:21] [PASSED] drm_gem_shmem_test_pin_pages
[20:34:21] [PASSED] drm_gem_shmem_test_vmap
[20:34:21] [PASSED] drm_gem_shmem_test_get_sg_table
[20:34:21] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:34:21] [PASSED] drm_gem_shmem_test_madvise
[20:34:21] [PASSED] drm_gem_shmem_test_purge
[20:34:21] ================== [PASSED] drm_gem_shmem ==================
[20:34:21] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:34:21] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:34:21] [PASSED] Automatic
[20:34:21] [PASSED] Full
[20:34:21] [PASSED] Limited 16:235
[20:34:21] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:34:21] [PASSED] drm_test_check_disable_connector
[20:34:21] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:34:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:34:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:34:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:34:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:34:21] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:34:21] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:34:21] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:34:21] [PASSED] drm_test_check_output_bpc_dvi
[20:34:21] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:34:21] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:34:21] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:34:21] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:34:21] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:34:21] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:34:21] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:34:21] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:34:21] ============ drm_test_check_hdmi_color_format  =============
[20:34:21] [PASSED] AUTO -> RGB
[20:34:21] [PASSED] YCBCR422 -> YUV422
[20:34:21] [PASSED] YCBCR420 -> YUV420
[20:34:21] [PASSED] YCBCR444 -> YUV444
[20:34:21] [PASSED] RGB -> RGB
[20:34:21] ======== [PASSED] drm_test_check_hdmi_color_format =========
[20:34:21] ======== drm_test_check_hdmi_color_format_420_only  ========
[20:34:21] [PASSED] RGB should fail
[20:34:21] [PASSED] YUV444 should fail
[20:34:21] [PASSED] YUV422 should fail
[20:34:21] [PASSED] YUV420 should work
[20:34:21] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[20:34:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:34:21] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:34:21] [PASSED] drm_test_check_broadcast_rgb_value
[20:34:21] [PASSED] drm_test_check_bpc_8_value
[20:34:21] [PASSED] drm_test_check_bpc_10_value
[20:34:21] [PASSED] drm_test_check_bpc_12_value
[20:34:21] [PASSED] drm_test_check_format_value
[20:34:21] [PASSED] drm_test_check_tmds_char_value
[20:34:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:34:21] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[20:34:21] [PASSED] drm_test_check_mode_valid
[20:34:21] [PASSED] drm_test_check_mode_valid_reject
[20:34:21] [PASSED] drm_test_check_mode_valid_reject_rate
[20:34:21] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:34:21] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[20:34:21] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[20:34:21] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[20:34:21] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:34:21] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:34:21] [PASSED] drm_test_check_infoframes
[20:34:21] [PASSED] drm_test_check_reject_avi_infoframe
[20:34:21] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:34:21] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:34:21] [PASSED] drm_test_check_reject_audio_infoframe
[20:34:21] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:34:21] ================= drm_managed (2 subtests) =================
[20:34:21] [PASSED] drm_test_managed_release_action
[20:34:21] [PASSED] drm_test_managed_run_action
[20:34:21] =================== [PASSED] drm_managed ===================
[20:34:21] =================== drm_mm (6 subtests) ====================
[20:34:21] [PASSED] drm_test_mm_init
[20:34:21] [PASSED] drm_test_mm_debug
[20:34:21] [PASSED] drm_test_mm_align32
[20:34:21] [PASSED] drm_test_mm_align64
[20:34:21] [PASSED] drm_test_mm_lowest
[20:34:21] [PASSED] drm_test_mm_highest
[20:34:21] ===================== [PASSED] drm_mm ======================
[20:34:21] ============= drm_modes_analog_tv (5 subtests) =============
[20:34:21] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:34:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:34:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:34:21] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:34:21] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:34:21] =============== [PASSED] drm_modes_analog_tv ===============
[20:34:21] ============== drm_plane_helper (2 subtests) ===============
[20:34:21] =============== drm_test_check_plane_state  ================
[20:34:21] [PASSED] clipping_simple
[20:34:21] [PASSED] clipping_rotate_reflect
[20:34:21] [PASSED] positioning_simple
[20:34:21] [PASSED] upscaling
[20:34:21] [PASSED] downscaling
[20:34:21] [PASSED] rounding1
[20:34:21] [PASSED] rounding2
[20:34:21] [PASSED] rounding3
[20:34:21] [PASSED] rounding4
[20:34:21] =========== [PASSED] drm_test_check_plane_state ============
[20:34:21] =========== drm_test_check_invalid_plane_state  ============
[20:34:21] [PASSED] positioning_invalid
[20:34:21] [PASSED] upscaling_invalid
[20:34:21] [PASSED] downscaling_invalid
[20:34:21] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:34:21] ================ [PASSED] drm_plane_helper =================
[20:34:21] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:34:21] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:34:21] [PASSED] None
[20:34:21] [PASSED] PAL
[20:34:21] [PASSED] NTSC
[20:34:21] [PASSED] Both, NTSC Default
[20:34:21] [PASSED] Both, PAL Default
[20:34:21] [PASSED] Both, NTSC Default, with PAL on command-line
[20:34:21] [PASSED] Both, PAL Default, with NTSC on command-line
[20:34:21] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:34:21] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:34:21] ================== drm_rect (9 subtests) ===================
[20:34:21] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:34:21] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:34:21] [PASSED] drm_test_rect_clip_scaled_clipped
[20:34:21] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:34:21] ================= drm_test_rect_intersect  =================
[20:34:21] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:34:21] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:34:21] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:34:21] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:34:21] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:34:21] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:34:21] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:34:21] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:34:21] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:34:21] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:34:21] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:34:21] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:34:21] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:34:21] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:34:21] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:34:21] ============= [PASSED] drm_test_rect_intersect =============
[20:34:21] ================ drm_test_rect_calc_hscale  ================
[20:34:21] [PASSED] normal use
[20:34:21] [PASSED] out of max range
[20:34:21] [PASSED] out of min range
[20:34:21] [PASSED] zero dst
[20:34:21] [PASSED] negative src
[20:34:21] [PASSED] negative dst
[20:34:21] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:34:21] ================ drm_test_rect_calc_vscale  ================
[20:34:21] [PASSED] normal use
[20:34:21] [PASSED] out of max range
[20:34:21] [PASSED] out of min range
[20:34:21] [PASSED] zero dst
[20:34:21] [PASSED] negative src
[20:34:21] [PASSED] negative dst
[20:34:21] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:34:21] ================== drm_test_rect_rotate  ===================
[20:34:21] [PASSED] reflect-x
[20:34:21] [PASSED] reflect-y
[20:34:21] [PASSED] rotate-0
[20:34:21] [PASSED] rotate-90
[20:34:21] [PASSED] rotate-180
[20:34:21] [PASSED] rotate-270
[20:34:21] ============== [PASSED] drm_test_rect_rotate ===============
[20:34:21] ================ drm_test_rect_rotate_inv  =================
[20:34:21] [PASSED] reflect-x
[20:34:21] [PASSED] reflect-y
[20:34:21] [PASSED] rotate-0
[20:34:21] [PASSED] rotate-90
[20:34:21] [PASSED] rotate-180
[20:34:21] [PASSED] rotate-270
[20:34:21] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:34:21] ==================== [PASSED] drm_rect =====================
[20:34:21] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:34:21] ============ drm_test_sysfb_build_fourcc_list  =============
[20:34:21] [PASSED] no native formats
[20:34:21] [PASSED] XRGB8888 as native format
[20:34:21] [PASSED] remove duplicates
[20:34:21] [PASSED] convert alpha formats
[20:34:21] [PASSED] random formats
[20:34:21] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:34:21] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:34:21] ================== drm_fixp (2 subtests) ===================
[20:34:21] [PASSED] drm_test_int2fixp
[20:34:21] [PASSED] drm_test_sm2fixp
[20:34:21] ==================== [PASSED] drm_fixp =====================
[20:34:21] ============================================================
[20:34:21] Testing complete. Ran 639 tests: passed: 639
[20:34:21] Elapsed time: 26.031s total, 1.696s configuring, 24.120s building, 0.194s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:34:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:34:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:34:32] Starting KUnit Kernel (1/1)...
[20:34:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:32] ================= ttm_device (5 subtests) ==================
[20:34:32] [PASSED] ttm_device_init_basic
[20:34:32] [PASSED] ttm_device_init_multiple
[20:34:32] [PASSED] ttm_device_fini_basic
[20:34:32] [PASSED] ttm_device_init_no_vma_man
[20:34:32] ================== ttm_device_init_pools  ==================
[20:34:32] [PASSED] No DMA allocations, no DMA32 required
[20:34:32] [PASSED] DMA allocations, DMA32 required
[20:34:32] [PASSED] No DMA allocations, DMA32 required
[20:34:32] [PASSED] DMA allocations, no DMA32 required
[20:34:32] ============== [PASSED] ttm_device_init_pools ==============
[20:34:32] =================== [PASSED] ttm_device ====================
[20:34:32] ================== ttm_pool (8 subtests) ===================
[20:34:32] ================== ttm_pool_alloc_basic  ===================
[20:34:32] [PASSED] One page
[20:34:32] [PASSED] More than one page
[20:34:32] [PASSED] Above the allocation limit
[20:34:32] [PASSED] One page, with coherent DMA mappings enabled
[20:34:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:34:32] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:34:32] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:34:32] [PASSED] One page
[20:34:32] [PASSED] More than one page
[20:34:32] [PASSED] Above the allocation limit
[20:34:32] [PASSED] One page, with coherent DMA mappings enabled
[20:34:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:34:32] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:34:32] [PASSED] ttm_pool_alloc_order_caching_match
[20:34:32] [PASSED] ttm_pool_alloc_caching_mismatch
[20:34:32] [PASSED] ttm_pool_alloc_order_mismatch
[20:34:32] [PASSED] ttm_pool_free_dma_alloc
[20:34:32] [PASSED] ttm_pool_free_no_dma_alloc
[20:34:32] [PASSED] ttm_pool_fini_basic
[20:34:32] ==================== [PASSED] ttm_pool =====================
[20:34:32] ================ ttm_resource (8 subtests) =================
[20:34:32] ================= ttm_resource_init_basic  =================
[20:34:32] [PASSED] Init resource in TTM_PL_SYSTEM
[20:34:32] [PASSED] Init resource in TTM_PL_VRAM
[20:34:32] [PASSED] Init resource in a private placement
[20:34:32] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:34:32] ============= [PASSED] ttm_resource_init_basic =============
[20:34:32] [PASSED] ttm_resource_init_pinned
[20:34:32] [PASSED] ttm_resource_fini_basic
[20:34:32] [PASSED] ttm_resource_manager_init_basic
[20:34:32] [PASSED] ttm_resource_manager_usage_basic
[20:34:32] [PASSED] ttm_resource_manager_set_used_basic
[20:34:32] [PASSED] ttm_sys_man_alloc_basic
[20:34:32] [PASSED] ttm_sys_man_free_basic
[20:34:32] ================== [PASSED] ttm_resource ===================
[20:34:32] =================== ttm_tt (15 subtests) ===================
[20:34:32] ==================== ttm_tt_init_basic  ====================
[20:34:32] [PASSED] Page-aligned size
[20:34:32] [PASSED] Extra pages requested
[20:34:32] ================ [PASSED] ttm_tt_init_basic ================
[20:34:32] [PASSED] ttm_tt_init_misaligned
[20:34:32] [PASSED] ttm_tt_fini_basic
[20:34:32] [PASSED] ttm_tt_fini_sg
[20:34:32] [PASSED] ttm_tt_fini_shmem
[20:34:32] [PASSED] ttm_tt_create_basic
[20:34:32] [PASSED] ttm_tt_create_invalid_bo_type
[20:34:32] [PASSED] ttm_tt_create_ttm_exists
[20:34:32] [PASSED] ttm_tt_create_failed
[20:34:32] [PASSED] ttm_tt_destroy_basic
[20:34:32] [PASSED] ttm_tt_populate_null_ttm
[20:34:32] [PASSED] ttm_tt_populate_populated_ttm
[20:34:32] [PASSED] ttm_tt_unpopulate_basic
[20:34:32] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:34:32] [PASSED] ttm_tt_swapin_basic
[20:34:32] ===================== [PASSED] ttm_tt ======================
[20:34:32] =================== ttm_bo (14 subtests) ===================
[20:34:32] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:34:32] [PASSED] Cannot be interrupted and sleeps
[20:34:32] [PASSED] Cannot be interrupted, locks straight away
[20:34:32] [PASSED] Can be interrupted, sleeps
[20:34:32] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:34:32] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:34:32] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:34:32] [PASSED] ttm_bo_reserve_double_resv
[20:34:32] [PASSED] ttm_bo_reserve_interrupted
[20:34:32] [PASSED] ttm_bo_reserve_deadlock
[20:34:32] [PASSED] ttm_bo_unreserve_basic
[20:34:32] [PASSED] ttm_bo_unreserve_pinned
[20:34:32] [PASSED] ttm_bo_unreserve_bulk
[20:34:32] [PASSED] ttm_bo_fini_basic
[20:34:32] [PASSED] ttm_bo_fini_shared_resv
[20:34:32] [PASSED] ttm_bo_pin_basic
[20:34:32] [PASSED] ttm_bo_pin_unpin_resource
[20:34:32] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:34:32] ===================== [PASSED] ttm_bo ======================
[20:34:32] ============== ttm_bo_validate (22 subtests) ===============
[20:34:32] ============== ttm_bo_init_reserved_sys_man  ===============
[20:34:32] [PASSED] Buffer object for userspace
[20:34:32] [PASSED] Kernel buffer object
[20:34:32] [PASSED] Shared buffer object
[20:34:32] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:34:32] ============== ttm_bo_init_reserved_mock_man  ==============
[20:34:32] [PASSED] Buffer object for userspace
[20:34:32] [PASSED] Kernel buffer object
[20:34:32] [PASSED] Shared buffer object
[20:34:32] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:34:32] [PASSED] ttm_bo_init_reserved_resv
[20:34:32] ================== ttm_bo_validate_basic  ==================
[20:34:32] [PASSED] Buffer object for userspace
[20:34:32] [PASSED] Kernel buffer object
[20:34:32] [PASSED] Shared buffer object
[20:34:32] ============== [PASSED] ttm_bo_validate_basic ==============
[20:34:32] [PASSED] ttm_bo_validate_invalid_placement
[20:34:32] ============= ttm_bo_validate_same_placement  ==============
[20:34:32] [PASSED] System manager
[20:34:32] [PASSED] VRAM manager
[20:34:32] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:34:32] [PASSED] ttm_bo_validate_failed_alloc
[20:34:32] [PASSED] ttm_bo_validate_pinned
[20:34:32] [PASSED] ttm_bo_validate_busy_placement
[20:34:32] ================ ttm_bo_validate_multihop  =================
[20:34:32] [PASSED] Buffer object for userspace
[20:34:32] [PASSED] Kernel buffer object
[20:34:32] [PASSED] Shared buffer object
[20:34:32] ============ [PASSED] ttm_bo_validate_multihop =============
[20:34:32] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:34:32] [PASSED] Buffer object in system domain, no page vector
[20:34:32] [PASSED] Buffer object in system domain with an existing page vector
[20:34:32] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:34:32] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:34:32] [PASSED] Buffer object for userspace
[20:34:32] [PASSED] Kernel buffer object
[20:34:32] [PASSED] Shared buffer object
[20:34:32] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:34:32] [PASSED] ttm_bo_validate_move_fence_signaled
[20:34:32] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:34:32] [PASSED] Waits for GPU
[20:34:32] [PASSED] Tries to lock straight away
[20:34:32] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:34:32] [PASSED] ttm_bo_validate_swapout
[20:34:32] [PASSED] ttm_bo_validate_happy_evict
[20:34:32] [PASSED] ttm_bo_validate_all_pinned_evict
[20:34:32] [PASSED] ttm_bo_validate_allowed_only_evict
[20:34:32] [PASSED] ttm_bo_validate_deleted_evict
[20:34:32] [PASSED] ttm_bo_validate_busy_domain_evict
[20:34:32] [PASSED] ttm_bo_validate_evict_gutting
[20:34:32] [PASSED] ttm_bo_validate_recrusive_evict
[20:34:32] ================= [PASSED] ttm_bo_validate =================
[20:34:32] ============================================================
[20:34:32] Testing complete. Ran 102 tests: passed: 102
[20:34:33] Elapsed time: 11.481s total, 1.719s configuring, 9.496s building, 0.216s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159034/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 0984dfdee2a4f9e1922fe919a6b469e115e23360
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+/kernel/Makefile:1247: C=1 specified, but sparse is not available or not up to date

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2157 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159034/
State : failure

== Summary ==

CI Bug Log - changes from xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360_BAT -> xe-pw-159034v16_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159034v16_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159034v16_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 10)
------------------------------

  Missing    (3): bat-ptl-1 bat-ptl-2 bat-ptl-vm 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159034v16_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - bat-lnl-1:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/bat-lnl-1/igt@runner@aborted.html
    - bat-wcl-2:          NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/bat-wcl-2/igt@runner@aborted.html
    - bat-lnl-2:          NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/bat-lnl-2/igt@runner@aborted.html
    - bat-wcl-1:          NOTRUN -> [FAIL][4]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/bat-wcl-1/igt@runner@aborted.html

  


Build changes
-------------

  * IGT: IGT_8963 -> IGT_8964
  * Linux: xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360 -> xe-pw-159034v16

  IGT_8963: b19a1c7c50adbf0e090be48d9cbc90596a3434bf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8964: 8964
  xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360: 0984dfdee2a4f9e1922fe919a6b469e115e23360
  xe-pw-159034v16: 159034v16

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/index.html

[-- Attachment #2: Type: text/html, Size: 2777 bytes --]

✗ i915.CI.BAT: failure for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6049 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159035/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_18682 -> Patchwork_159035v16
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_159035v16 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_159035v16, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/index.html

Participating hosts (42 -> 33)
------------------------------

  Missing    (9): bat-mtlp-8 bat-mtlp-9 bat-arlh-3 fi-snb-2520m fi-pnv-d510 bat-dg2-13 bat-arls-6 bat-arls-5 bat-arlh-2 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_159035v16:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_lmem_swapping@basic:
    - bat-atsm-1:         [PASS][1] -> [TIMEOUT][2] +1 other test timeout
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-atsm-1/igt@gem_lmem_swapping@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-atsm-1/igt@gem_lmem_swapping@basic.html

  * igt@gem_render_tiled_blits@basic:
    - fi-bsw-n3050:       [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/fi-bsw-n3050/igt@gem_render_tiled_blits@basic.html

  * igt@i915_selftest@live:
    - fi-kbl-8809g:       [PASS][5] -> [DMESG-FAIL][6] +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/fi-kbl-8809g/igt@i915_selftest@live.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/fi-kbl-8809g/igt@i915_selftest@live.html
    - bat-adls-6:         [PASS][7] -> [ABORT][8] +1 other test abort
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-adls-6/igt@i915_selftest@live.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-adls-6/igt@i915_selftest@live.html

  * igt@i915_selftest@live@active:
    - fi-bsw-nick:        [PASS][9] -> [INCOMPLETE][10] +1 other test incomplete
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/fi-bsw-nick/igt@i915_selftest@live@active.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/fi-bsw-nick/igt@i915_selftest@live@active.html

  * igt@i915_selftest@live@execlists:
    - bat-apl-1:          [PASS][11] -> [INCOMPLETE][12] +1 other test incomplete
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-apl-1/igt@i915_selftest@live@execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-apl-1/igt@i915_selftest@live@execlists.html
    - bat-kbl-2:          [PASS][13] -> [DMESG-FAIL][14] +1 other test dmesg-fail
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-kbl-2/igt@i915_selftest@live@execlists.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-kbl-2/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gem_migrate:
    - bat-atsm-1:         [PASS][15] -> [INCOMPLETE][16] +1 other test incomplete
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-atsm-1/igt@i915_selftest@live@gem_migrate.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-atsm-1/igt@i915_selftest@live@gem_migrate.html

  * igt@i915_selftest@live@migrate:
    - bat-apl-1:          [PASS][17] -> [DMESG-FAIL][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-apl-1/igt@i915_selftest@live@migrate.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-apl-1/igt@i915_selftest@live@migrate.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
    - bat-apl-1:          [PASS][19] -> [FAIL][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/bat-apl-1/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/bat-apl-1/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html

  
#### Warnings ####

  * igt@i915_selftest@live:
    - fi-cfl-8109u:       [DMESG-WARN][21] ([i915#13735]) -> [DMESG-FAIL][22] +2 other tests dmesg-fail
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/fi-cfl-8109u/igt@i915_selftest@live.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/fi-cfl-8109u/igt@i915_selftest@live.html

  
Known issues
------------

  Here are the changes found in Patchwork_159035v16 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@migrate:
    - fi-bsw-nick:        [PASS][23] -> [DMESG-FAIL][24] ([i915#16318])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18682/fi-bsw-nick/igt@i915_selftest@live@migrate.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/fi-bsw-nick/igt@i915_selftest@live@migrate.html

  
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#16318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16318


Build changes
-------------

  * Linux: CI_DRM_18682 -> Patchwork_159035v16

  CI-20190529: 20190529
  CI_DRM_18682: 0984dfdee2a4f9e1922fe919a6b469e115e23360 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8963: b19a1c7c50adbf0e090be48d9cbc90596a3434bf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_159035v16: 0984dfdee2a4f9e1922fe919a6b469e115e23360 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_159035v16/index.html

[-- Attachment #2: Type: text/html, Size: 6920 bytes --]

✗ Xe.CI.FULL: failure for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 34856 bytes --]

== Series Details ==

Series: drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
URL   : https://patchwork.freedesktop.org/series/159034/
State : failure

== Summary ==

CI Bug Log - changes from xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360_FULL -> xe-pw-159034v16_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159034v16_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159034v16_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159034v16_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - shard-lnl:          NOTRUN -> ([FAIL][1], [FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-7/igt@runner@aborted.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-5/igt@runner@aborted.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-5/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-2/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-3/igt@runner@aborted.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-3/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-3/igt@runner@aborted.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-2/igt@runner@aborted.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-1/igt@runner@aborted.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-1/igt@runner@aborted.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-6/igt@runner@aborted.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-2/igt@runner@aborted.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-lnl-7/igt@runner@aborted.html

  * igt@xe_module_load@reload-no-display:
    - shard-bmg:          [PASS][14] -> [FAIL][15] +5 other tests fail
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-10/igt@xe_module_load@reload-no-display.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_module_load@reload-no-display.html

  
Known issues
------------

  Here are the changes found in xe-pw-159034v16_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-read:
    - shard-bmg:          [PASS][16] -> [SKIP][17] ([Intel XE#5177] / [Intel XE#6703])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-1/igt@intel_hwmon@hwmon-read.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-bmg:          [PASS][18] -> [FAIL][19] ([Intel XE#3718] / [Intel XE#6078]) +3 other tests fail
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3:
    - shard-bmg:          [PASS][20] -> [FAIL][21] ([Intel XE#6078]) +10 other tests fail
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2327]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-10/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#1124]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2887]) +3 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-10/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#3432])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2252]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2320]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-10/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#8265])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [PASS][29] -> [FAIL][30] ([Intel XE#3149] / [Intel XE#3321]) +3 other tests fail
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-10/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
    - shard-bmg:          [PASS][31] -> [FAIL][32] ([Intel XE#3321]) +15 other tests fail
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-10/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7178] / [Intel XE#7351])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2311]) +13 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#4141]) +4 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2313]) +11 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1503])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-1/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#7922]) +3 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-1/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][40] -> [SKIP][41] ([Intel XE#7915]) +5 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-5/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#6901])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-8/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#7283])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-7/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#5021] / [Intel XE#7377])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#1489])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-1/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2330] / [Intel XE#5813])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@xe_eudebug@vma-ufence:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7636]) +3 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_eudebug@vma-ufence.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][49] -> [INCOMPLETE][50] ([Intel XE#6321])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-7/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#7136]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-2/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6874]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html

  * igt@xe_exec_system_allocator@many-large-execqueues-mmap-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#6703]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_system_allocator@many-large-execqueues-mmap-prefetch.html

  * igt@xe_exec_system_allocator@process-many-new-nomemset:
    - shard-bmg:          [PASS][55] -> [SKIP][56] ([Intel XE#6703]) +56 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-1/igt@xe_exec_system_allocator@process-many-new-nomemset.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_system_allocator@process-many-new-nomemset.html

  * igt@xe_exec_system_allocator@twice-large-mmap:
    - shard-bmg:          [PASS][57] -> [SKIP][58] ([Intel XE#6557] / [Intel XE#6703])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-10/igt@xe_exec_system_allocator@twice-large-mmap.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_system_allocator@twice-large-mmap.html

  * igt@xe_exec_threads@threads-multi-queue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#7138]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-rebind.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-basic:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#6964])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@xe_multigpu_svm@mgpu-xgpu-access-basic.html

  * igt@xe_oa@non-zero-reason-all@oag-0:
    - shard-bmg:          [PASS][61] -> [FAIL][62] ([Intel XE#7334]) +1 other test fail
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-1/igt@xe_oa@non-zero-reason-all@oag-0.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-10/igt@xe_oa@non-zero-reason-all@oag-0.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2245] / [Intel XE#7590])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_pat@pat-index-xelp.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#7599])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-2/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_query@multigpu-query-hwconfig:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#944]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_query@multigpu-query-hwconfig.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3:
    - shard-bmg:          [FAIL][66] ([Intel XE#3149] / [Intel XE#3321]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a3.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-bmg:          [FAIL][68] ([Intel XE#6569]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-2/igt@xe_sriov_flr@flr-twice.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-4/igt@xe_sriov_flr@flr-twice.html

  * igt@xe_sriov_scheduling@default-enabled-fair-scheduling:
    - shard-bmg:          [FAIL][70] ([Intel XE#7992]) -> [PASS][71] +1 other test pass
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-6/igt@xe_sriov_scheduling@default-enabled-fair-scheduling.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-5/igt@xe_sriov_scheduling@default-enabled-fair-scheduling.html

  * igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt1-vcs0:
    - shard-bmg:          [SKIP][72] -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-6/igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt1-vcs0.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-5/igt@xe_sriov_scheduling@default-enabled-fair-scheduling@numvfs-random-gt1-vcs0.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-bmg:          [ABORT][74] ([Intel XE#8007]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-7/igt@xe_wedged@wedged-mode-toggle.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@xe_wedged@wedged-mode-toggle.html

  
#### Warnings ####

  * igt@kms_big_fb@4-tiled-64bpp-rotate-90:
    - shard-bmg:          [SKIP][76] ([Intel XE#2327]) -> [SKIP][77] ([Intel XE#6703])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-4/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          [SKIP][78] ([Intel XE#1124]) -> [SKIP][79] ([Intel XE#6703])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-10/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_bw@linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          [SKIP][80] ([Intel XE#367]) -> [SKIP][81] ([Intel XE#6703])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-9/igt@kms_bw@linear-tiling-4-displays-target-2160x1440p.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_bw@linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-bmg:          [SKIP][82] ([Intel XE#2652]) -> [SKIP][83] ([Intel XE#6703])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-bmg:          [SKIP][84] ([Intel XE#6507]) -> [SKIP][85] ([Intel XE#6703])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-2/igt@kms_chamelium_sharpness_filter@filter-basic.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-bmg:          [SKIP][86] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][87] ([Intel XE#6703])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_dsc@dsc-with-formats-ultrajoiner:
    - shard-bmg:          [SKIP][88] ([Intel XE#8265]) -> [SKIP][89] ([Intel XE#6703])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-6/igt@kms_dsc@dsc-with-formats-ultrajoiner.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_dsc@dsc-with-formats-ultrajoiner.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][90] ([Intel XE#3149] / [Intel XE#3321]) -> [FAIL][91] ([Intel XE#3321])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-bmg:          [SKIP][92] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][93] ([Intel XE#6703])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][94] ([Intel XE#4141]) -> [SKIP][95] ([Intel XE#6703]) +2 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][96] ([Intel XE#2311]) -> [SKIP][97] ([Intel XE#6703]) +4 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt:
    - shard-bmg:          [SKIP][98] ([Intel XE#7061]) -> [SKIP][99] ([Intel XE#6703])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][100] ([Intel XE#2313]) -> [SKIP][101] ([Intel XE#6703]) +4 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][102] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916]) -> [SKIP][103] ([Intel XE#6703])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
    - shard-bmg:          [SKIP][104] ([Intel XE#7283]) -> [SKIP][105] ([Intel XE#6703])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-7/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          [SKIP][106] ([Intel XE#1489]) -> [SKIP][107] ([Intel XE#6703])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-9/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-pr-basic:
    - shard-bmg:          [SKIP][108] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][109] ([Intel XE#6703]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-1/igt@kms_psr@fbc-pr-basic.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_psr@fbc-pr-basic.html

  * igt@kms_sharpness_filter@filter-dpms:
    - shard-bmg:          [SKIP][110] ([Intel XE#6503]) -> [SKIP][111] ([Intel XE#6703])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-8/igt@kms_sharpness_filter@filter-dpms.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_sharpness_filter@filter-dpms.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][112] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][113] ([Intel XE#2426] / [Intel XE#5848])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-basic:
    - shard-bmg:          [SKIP][114] ([Intel XE#1499]) -> [SKIP][115] ([Intel XE#6703])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-7/igt@kms_vrr@flip-basic.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@kms_vrr@flip-basic.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-bmg:          [SKIP][116] ([Intel XE#7636]) -> [SKIP][117] ([Intel XE#6703]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-5/igt@xe_eudebug@basic-exec-queues.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
    - shard-bmg:          [SKIP][118] ([Intel XE#7136]) -> [SKIP][119] ([Intel XE#6703])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html

  * igt@xe_exec_multi_queue@many-execs-dyn-priority:
    - shard-bmg:          [SKIP][120] ([Intel XE#6874]) -> [SKIP][121] ([Intel XE#6703]) +3 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-5/igt@xe_exec_multi_queue@many-execs-dyn-priority.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_multi_queue@many-execs-dyn-priority.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic:
    - shard-bmg:          [SKIP][122] ([Intel XE#7138]) -> [SKIP][123] ([Intel XE#6703])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html

  * igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
    - shard-bmg:          [SKIP][124] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][125] ([Intel XE#6703])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360/shard-bmg-3/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/shard-bmg-6/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5177]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5177
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
  [Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8963 -> IGT_8964
  * Linux: xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360 -> xe-pw-159034v16

  IGT_8963: b19a1c7c50adbf0e090be48d9cbc90596a3434bf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8964: 8964
  xe-5260-0984dfdee2a4f9e1922fe919a6b469e115e23360: 0984dfdee2a4f9e1922fe919a6b469e115e23360
  xe-pw-159034v16: 159034v16

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159034v16/index.html

[-- Attachment #2: Type: text/html, Size: 41020 bytes --]