From: Chen Pei <cp0613@linux.alibaba.com>
To: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Cc: jic23@kernel.org, pbonzini@redhat.com, palmer@dabbelt.com,
alistair.francis@wdc.com, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, chao.liu.zevorn@gmail.com,
sunilvl@ventanamicro.com, dave.jiang@intel.com,
alison.schofield@intel.com, imammedo@redhat.com, mst@redhat.com,
guoren@kernel.org, qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
linux-cxl@vger.kernel.org
Subject: Re: [PATCH v2 1/4] hw/riscv/virt: Add CXL support to the RISC-V virt machine
Date: Mon, 29 Jun 2026 17:06:41 +0800 [thread overview]
Message-ID: <20260629090654.70869-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <9279723a-b079-4749-b3a5-e6e7ecfd2121@oss.qualcomm.com>
Hi Daniel,
On 6/24/2026 1:42 PM, Daniel Henrique Barboza wrote:
> create_cxl_host_reg_region() is doing the same check:
>
> if (!s->cxl_devices_state.is_enabled) {
> (...)
>
> Maybe we could squash these update_mmio() lines in the same helper to have
> everything CXL related in the same place. The helper would need to be
> renamed to something more appropriate (e.g. cxl_host_state_init() since we're
> at init time).
Thanks for the review. You are right, the x86 pc_memory_init() path keeps
the CXL host register region creation and the FMW address programming
inside a single 'if (is_enabled)' block, and there is no reason for
RISC-V to split them. I'll fold the cxl_fmws_set_memmap() and
cxl_fmws_update_mmio() calls into create_cxl_host_reg_region(), rename
the helper to cxl_host_state_init(), and drop the duplicate guard in
virt_machine_init() in v3.
Thanks,
Pei
next prev parent reply other threads:[~2026-06-29 9:08 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 9:38 [PATCH v2 0/4] hw/riscv/virt: Add CXL support to the RISC-V virt machine Chen Pei
2026-06-18 9:38 ` [PATCH v2 1/4] " Chen Pei
2026-06-24 16:42 ` Daniel Henrique Barboza
2026-06-29 9:06 ` Chen Pei [this message]
2026-06-18 9:38 ` [PATCH v2 2/4] hw/riscv/virt-acpi-build: Add _DEP to ACPI0017 for CXL host bridge dependency Chen Pei
2026-06-18 9:38 ` [PATCH v2 3/4] hw/riscv/virt,gpex: Provide 32-bit MMIO window for CXL host bridges Chen Pei
2026-06-18 9:38 ` [PATCH v2 3/4] hw/riscv/virt, gpex: " Chen Pei
2026-06-24 17:21 ` [PATCH v2 3/4] hw/riscv/virt,gpex: " Daniel Henrique Barboza
2026-06-24 17:21 ` [PATCH v2 3/4] hw/riscv/virt, gpex: " Daniel Henrique Barboza via qemu development
2026-06-24 17:21 ` Daniel Henrique Barboza via
2026-06-29 9:10 ` [PATCH v2 3/4] hw/riscv/virt,gpex: " Chen Pei
2026-06-29 9:10 ` [PATCH v2 3/4] hw/riscv/virt, gpex: " Chen Pei
2026-06-18 9:38 ` [PATCH v2 4/4] tests/qtest: Add RISC-V ACPI bios tables test for CXL Chen Pei
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