From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Subject: [PULL 21/23] tests/tcg/mips: cover Octeon QMAC instructions
Date: Tue, 7 Jul 2026 20:15:26 +0200 [thread overview]
Message-ID: <20260707181529.60191-22-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260707181529.60191-1-philmd@oss.qualcomm.com>
From: James Hilliard <james.hilliard1@gmail.com>
Add smoke coverage for Octeon QMAC and QMACS fixed-point accumulator
instruction paths.
The coverage exercises normal accumulation, saturating accumulation, and
the sticky saturation flag.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-21-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
tests/tcg/mips/user/isa/octeon/octeon-insns.c | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/tests/tcg/mips/user/isa/octeon/octeon-insns.c b/tests/tcg/mips/user/isa/octeon/octeon-insns.c
index 6480c8532a1..6fffc820103 100644
--- a/tests/tcg/mips/user/isa/octeon/octeon-insns.c
+++ b/tests/tcg/mips/user/isa/octeon/octeon-insns.c
@@ -129,6 +129,43 @@ static uint64_t octeon_vmm0(uint64_t mpl0, uint64_t p0,
return rd;
}
+static uint64_t octeon_qmac_lo(uint64_t rs, uint64_t rt, uint64_t lo)
+{
+ uint64_t rd;
+
+ asm volatile(
+ "move $8, %[rs]\n\t"
+ "move $9, %[rt]\n\t"
+ "mtlo %[lo]\n\t"
+ "mthi $0\n\t"
+ ".word 0x710904d2\n\t" /* qmac.03 $8, $9 */
+ "mflo %[rd]\n\t"
+ : [rd] "=r" (rd)
+ : [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo)
+ : "$8", "$9");
+
+ return rd;
+}
+
+static uint64_t octeon_qmacs_state(uint64_t rs, uint64_t rt, uint64_t lo)
+{
+ uint64_t hi, rd;
+
+ asm volatile(
+ "move $8, %[rs]\n\t"
+ "move $9, %[rt]\n\t"
+ "mtlo %[lo]\n\t"
+ "mthi $0\n\t"
+ ".word 0x71090012\n\t" /* qmacs.00 $8, $9 */
+ "mfhi %[hi]\n\t"
+ "mflo %[rd]\n\t"
+ : [hi] "=r" (hi), [rd] "=r" (rd)
+ : [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo)
+ : "$8", "$9");
+
+ return ((hi & 1) << 32) | (rd & 0xffffffff);
+}
+
static uint64_t octeon_vmm0_zeroes_mpl1(void)
{
uint64_t rd;
@@ -355,6 +392,9 @@ int main(void)
assert(octeon_seq(0xabc, 0xdef) == 0);
assert(octeon_sne(0xabc, 0xabc) == 0);
assert(octeon_sne(0xabc, 0xdef) == 1);
+ assert(octeon_qmac_lo(0x0003000000000000ULL, 2, 1) == 13);
+ assert(octeon_qmacs_state(1, 1, 0x7ffffffe) == 0x17fffffffULL);
+ assert(octeon_qmacs_state(0x8000, 0x8000, 0) == 0x17fffffffULL);
assert(octeon_vmulu(5, 7, 11) == 46);
assert(octeon_vmm0(5, 13, 7, 11) == 59);
assert(octeon_vmm0_zeroes_mpl1() == 0);
--
2.53.0
next prev parent reply other threads:[~2026-07-07 18:21 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 18:15 [PULL 00/23] MIPS & SH4 patches for 2026-07-07 Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 01/23] target/mips: add Octeon COP2 crypto state Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 02/23] target/mips: add Octeon COP2 crypto helper plumbing Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 03/23] target/mips: add Octeon CRC COP2 helpers Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 04/23] target/mips: add Octeon GFM " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 05/23] target/mips: add Octeon SHA3 " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 06/23] target/mips: add Octeon ZUC " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 07/23] target/mips: add Octeon SNOW3G " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 08/23] target/mips: add Octeon AES " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 09/23] target/mips: add Octeon SMS4 " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 10/23] target/mips: add Octeon 3DES and KASUMI " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 11/23] target/mips: add Octeon Camellia " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 12/23] target/mips: add Octeon HSH " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 13/23] target/mips: add Octeon CHORD and LLM " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 14/23] target/mips: decode Octeon COP2 register selectors Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 15/23] target/mips: decode Octeon CRC and GFM COP2 selectors Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 16/23] target/mips: decode Octeon HSH and SHA3 " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 17/23] target/mips: decode Octeon ZUC and SNOW3G " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 18/23] target/mips: decode Octeon block-cipher " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 19/23] target/mips: decode Octeon CHORD and LLM " Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 20/23] target/mips: add Octeon CvmCount RDHWR support Philippe Mathieu-Daudé
2026-07-07 18:15 ` Philippe Mathieu-Daudé [this message]
2026-07-07 18:15 ` [PULL 22/23] target/sh4: fixup tcg for sh4 fipr/ftrv instructions Philippe Mathieu-Daudé
2026-07-07 18:15 ` [PULL 23/23] qemu-options: Do not list -enable-kvm on MIPS binaries Philippe Mathieu-Daudé
2026-07-08 5:19 ` [PULL 00/23] MIPS & SH4 patches for 2026-07-07 Philippe Mathieu-Daudé
2026-07-08 15:32 ` Stefan Hajnoczi
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