* [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline
@ 2026-07-13 5:15 Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
` (18 more replies)
0 siblings, 19 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Chaitanya Kumar Borah, Harry Wentland, Louis Chauvet, Melissa Wen,
Simon Ser, Alex Hung, Daniel Stone, Uma Shankar,
Maarten Lankhorst, Pekka Paalanen, Pranay Samala, Swati Sharma,
Naveen Kumar
This series adds color pipeline support for SDR planes in i915 and
exposes the functionality to userspace through the DRM colorop
framework.
In contrast to HDR planes, SDR planes have LUTs with smaller sizes
and a fixed function CSC block in contrast to a programmable CTM.
The series first introduces a new DRM colorop type,
DRM_COLOROP_FIXED_MATRIX, which represents fixed-function CSC blocks where
userspace selects predefined hardware conversion modes instead of
programming arbitrary matrices. It also adds the YUV correction HW block.
With this the color pipeline can accept both limited range and full range
YUV framebuffers.
With that, the SDR plane color pipeline looks like.
[YUV Range Correct] -> [1D LUT] -> [CSC] -> [1D LUT]
v2:
- Naming changes [Pekka]
- Adds YUV color range correct block
v3:
- Fix NC matrix enum name and string [Melissa]
- Extract and simplify glk_plane_color_ctl_input_csc into
helpers (new prep patches)
- Restructure SDR pre/post-CSC LUT loops to match HDR function
pattern
- Drop HDR pre-CSC LUT clamping fix (submitted separately)
- Rebase
v4:
- For CI
- Rebase
IGT series (needs update): https://patchwork.freedesktop.org/series/165021/
A rough updated IGT implementation with some additional test can be found here.
https://github.com/ckborah/igt-sandbox/tree/color/sdr-sw-ref
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Louis Chauvet <louis.chauvet@bootlin.com>
Cc: Melissa Wen <mwen@igalia.com>
Cc: Simon Ser <contact@emersion.fr>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Daniel Stone <daniels@collabora.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Cc: Pekka Paalanen <pekka.paalanen@collabora.com>
Cc: Pranay Samala <pranay.samala@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Naveen Kumar <naveen1.kumar@intel.com>
Chaitanya Kumar Borah (10):
drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
drm/i915/color: Add CSC on SDR plane color pipeline
drm/i915/display: extract glk_plane_color_ctl_input_csc helper
drm/i915/display: simplify glk_plane_color_ctl_input_csc
drm/i915/display: Track CSC mode in intel plane state
drm/i915/display: Program input CSC on SDR planes
drm/i915/color: Add YCbCr limited-to-full range color block support
drm/i915/color: Add YUV range correction to SDR plane pipeline
drm/i915/color: Add support for 1D LUT in SDR planes
drm/i915/color: Add color pipeline support for SDR planes
Pranay Samala (4):
drm/i915/color: Extract HDR pre-CSC LUT programming to helper function
drm/i915/color: Program Pre-CSC registers for SDR
drm/i915/color: Extract HDR post-CSC LUT programming to helper
function
drm/i915/color: Program Plane Post CSC registers for SDR planes
drivers/gpu/drm/drm_atomic.c | 4 +
drivers/gpu/drm/drm_atomic_uapi.c | 7 +
drivers/gpu/drm/drm_colorop.c | 106 +++++++++++++
drivers/gpu/drm/i915/display/intel_color.c | 140 +++++++++++++++---
.../drm/i915/display/intel_color_pipeline.c | 43 +++++-
.../drm/i915/display/intel_display_limits.h | 2 +
.../drm/i915/display/intel_display_types.h | 3 +
drivers/gpu/drm/i915/display/intel_plane.c | 15 +-
.../drm/i915/display/skl_universal_plane.c | 84 ++++++++---
include/drm/drm_colorop.h | 84 +++++++++++
include/uapi/drm/drm_mode.h | 12 ++
11 files changed, 447 insertions(+), 53 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 29+ messages in thread
* [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:48 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
` (17 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Chaitanya Kumar Borah, Melissa Wen, Harry Wentland
Introduce DRM_COLOROP_FIXED_MATRIX, a new colorop type representing a
hardware that performs a fixed matrix operation.
Unlike CTM-based colorops, this block does not expose programmable
coefficients. Instead, userspace selects one of the predefined
hardware modes via a new FIXED_MATRIX_TYPE enum property. Supported modes
include common YCbCr->RGB and RGB709->RGB2020 conversions.
v2:
- Naming changes (Pekka)
v3:
- Fix NC matrix enum name and string (Melissa)
- Rebase
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/drm_atomic.c | 4 ++
drivers/gpu/drm/drm_atomic_uapi.c | 7 ++
drivers/gpu/drm/drm_colorop.c | 106 ++++++++++++++++++++++++++++++
include/drm/drm_colorop.h | 84 +++++++++++++++++++++++
include/uapi/drm/drm_mode.h | 12 ++++
5 files changed, 213 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 735ab7badc2e..c95e18393d32 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -925,6 +925,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
drm_get_colorop_lut3d_interpolation_name(state->lut3d_interpolation));
drm_printf_indent(p, 1, "data blob id=%d\n", state->data ? state->data->base.id : 0);
break;
+ case DRM_COLOROP_FIXED_MATRIX:
+ drm_printf_indent(p, 1, "fixed_matrix_type=%s\n",
+ drm_get_colorop_fixed_matrix_type_name(state->fixed_matrix_type));
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 1050dddadb17..d52504d823bc 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -786,6 +786,11 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
return drm_atomic_color_set_data_property(colorop, state,
property, val,
replaced);
+ } else if (property == colorop->fixed_matrix_type_property) {
+ if (state->fixed_matrix_type != val) {
+ state->fixed_matrix_type = val;
+ *replaced = true;
+ }
} else {
drm_dbg_atomic(colorop->dev,
"[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
@@ -818,6 +823,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
*val = state->lut3d_interpolation;
else if (property == colorop->data_property)
*val = (state->data) ? state->data->base.id : 0;
+ else if (property == colorop->fixed_matrix_type_property)
+ *val = state->fixed_matrix_type;
else
return -EINVAL;
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index 682fcc651525..483defad699c 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
{ DRM_COLOROP_3D_LUT, "3D LUT"},
+ { DRM_COLOROP_FIXED_MATRIX, "Fixed Matrix"},
};
static const char * const colorop_curve_1d_type_names[] = {
@@ -90,6 +91,14 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
};
+static const char * const colorop_fixed_matrix_type_names[] = {
+ [DRM_COLOROP_FM_YCBCR601_FULL_RGB] = "YCbCr 601 Full to RGB",
+ [DRM_COLOROP_FM_YCBCR709_FULL_RGB] = "YCbCr 709 Full to RGB",
+ [DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB] = "YCbCr 2020 NC Full to RGB",
+ [DRM_COLOROP_FM_YCBCR_LIMITED_FULL] = "YCbCr limited to full",
+ [DRM_COLOROP_FM_RGB709_RGB2020] = "RGB709 to RGB2020",
+};
+
/* Init Helpers */
static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
@@ -453,6 +462,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
}
EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
+/**
+ * drm_plane_colorop_fixed_matrix_init - Initialize a DRM_COLOROP_FIXED_MATRIX
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @funcs: control functions for the new colorop
+ * @supported_fm: A bitfield of supported drm_colorop_fixed_matrix_type enum values,
+ * created using BIT(fixed_matrix_type) and combined with the OR '|'
+ * operator.
+ * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
+ * @return zero on success, -E value on failure
+ */
+int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_colorop_funcs *funcs,
+ u64 supported_fm, uint32_t flags)
+{
+ struct drm_prop_enum_list enum_list[DRM_COLOROP_FM_COUNT];
+ int i, len;
+ struct drm_property *prop;
+ int ret;
+
+ if (!supported_fm) {
+ drm_err(dev,
+ "No supported FM type op for new Fixed Matrix colorop on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ if ((supported_fm & -BIT(DRM_COLOROP_FM_COUNT)) != 0) {
+ drm_err(dev, "Unknown Fixed Matrix provided on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_FIXED_MATRIX, flags);
+ if (ret)
+ return ret;
+
+ len = 0;
+ for (i = 0; i < DRM_COLOROP_FM_COUNT; i++) {
+ if ((supported_fm & BIT(i)) == 0)
+ continue;
+
+ enum_list[len].type = i;
+ enum_list[len].name = colorop_fixed_matrix_type_names[i];
+ len++;
+ }
+
+ if (WARN_ON(len <= 0))
+ return -EINVAL;
+
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "FIXED_MATRIX_TYPE",
+ enum_list, len);
+
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->fixed_matrix_type_property = prop;
+ /*
+ * Default to the first supported CSC mode as provided by the driver.
+ * Intuitively this should be something that keeps the colorop in pixel bypass
+ * mode but that is already handled via the standard colorop bypass
+ * property.
+ */
+ drm_object_attach_property(&colorop->base, colorop->fixed_matrix_type_property,
+ enum_list[0].type);
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_plane_colorop_fixed_matrix_init);
+
static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
struct drm_colorop_state *state)
{
@@ -533,6 +616,13 @@ static void __drm_colorop_state_init(struct drm_colorop_state *colorop_state,
&val))
colorop_state->lut3d_interpolation = val;
}
+
+ if (colorop->fixed_matrix_type_property) {
+ if (!drm_object_property_get_default_value(&colorop->base,
+ colorop->fixed_matrix_type_property,
+ &val))
+ colorop_state->fixed_matrix_type = val;
+ }
}
/**
@@ -596,6 +686,7 @@ static const char * const colorop_type_name[] = {
[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
[DRM_COLOROP_MULTIPLIER] = "Multiplier",
[DRM_COLOROP_3D_LUT] = "3D LUT",
+ [DRM_COLOROP_FIXED_MATRIX] = "Fixed Matrix",
};
static const char * const colorop_lu3d_interpolation_name[] = {
@@ -652,6 +743,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
return colorop_lu3d_interpolation_name[type];
}
+/**
+ * drm_get_colorop_fixed_matrix_type_name: return a string for fixed matrix type
+ * @type: fixed matrix type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_fixed_matrix_type_name(enum drm_colorop_fixed_matrix_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_fixed_matrix_type_names)))
+ return "unknown";
+
+ return colorop_fixed_matrix_type_names[type];
+}
+
/**
* drm_colorop_set_next_property - sets the next pointer
* @colorop: drm colorop
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 224fae40ed2b..6257f6b893cd 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -134,6 +134,71 @@ enum drm_colorop_curve_1d_type {
DRM_COLOROP_1D_CURVE_COUNT
};
+/**
+ * enum drm_colorop_fixed_matrix_type - type of Fixed Matrix
+ *
+ * Describes a Fixed Matrix operation to be applied by the DRM_COLOROP_FIXED_MATRIX
+ */
+enum drm_colorop_fixed_matrix_type {
+ /**
+ * @DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+ *
+ * enum string "YCbCr 601 Full to RGB"
+ *
+ * This selects the matrix that converts full range YCbCr into RGB
+ * according to the BT.601 coefficients.
+ */
+ DRM_COLOROP_FM_YCBCR601_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+ *
+ * enum string "YCbCr 709 Full to RGB"
+ *
+ * This selects the matrix that converts full range YCbCr into RGB
+ * according to the BT.709 coefficients.
+ */
+ DRM_COLOROP_FM_YCBCR709_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+ *
+ * enum string "YCbCr 2020 NC Full to RGB"
+ *
+ * This selects the matrix that converts full range YCbCr into RGB
+ * according to the BT.2020 non-constant luminance coefficients.
+ */
+ DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR_LIMITED_FULL:
+ *
+ * enum string "YCbCr limited to full"
+ *
+ * This selects the matrix that converts limited range YCbCr into
+ * full range YCbCr. Though not strictly a matrix operation but
+ * can be represented as one.
+ */
+ DRM_COLOROP_FM_YCBCR_LIMITED_FULL,
+
+ /**
+ * @DRM_COLOROP_FM_RGB709_RGB2020:
+ *
+ * enum string "RGB709 to RGB2020"
+ *
+ * Selects the fixed-function CSC preset that converts RGB
+ * (BT.709) colorimetry to RGB (BT.2020).
+ */
+ DRM_COLOROP_FM_RGB709_RGB2020,
+
+ /**
+ * @DRM_COLOROP_FM_COUNT:
+ *
+ * enum value denoting the size of the enum
+ */
+ DRM_COLOROP_FM_COUNT
+};
+
/**
* struct drm_colorop_state - mutable colorop state
*/
@@ -197,6 +262,13 @@ struct drm_colorop_state {
*/
enum drm_colorop_lut3d_interpolation_type lut3d_interpolation;
+ /**
+ * @fixed_matrix_type:
+ *
+ * Type of Fixed Matrix operation.
+ */
+ enum drm_colorop_fixed_matrix_type fixed_matrix_type;
+
/** @state: backpointer to global drm_atomic_commit */
struct drm_atomic_commit *state;
};
@@ -366,6 +438,13 @@ struct drm_colorop {
*/
struct drm_property *data_property;
+ /**
+ * @fixed_matrix_type_property:
+ *
+ * Sub-type for DRM_COLOROP_FIXED_MATRIX type.
+ */
+ struct drm_property *fixed_matrix_type_property;
+
/**
* @next_property:
*
@@ -422,6 +501,10 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
uint32_t lut_size,
enum drm_colorop_lut3d_interpolation_type interpolation,
uint32_t flags);
+int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_colorop_funcs *funcs,
+ u64 supported_fm, uint32_t flags);
struct drm_colorop_state *
drm_atomic_helper_colorop_create_state(struct drm_colorop *colorop);
@@ -480,6 +563,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
const char *
drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
+const char *drm_get_colorop_fixed_matrix_type_name(enum drm_colorop_fixed_matrix_type type);
void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index bd435effdcee..ed1a660a3dfd 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -955,6 +955,18 @@ enum drm_colorop_type {
* color = lut3d[index]
*/
DRM_COLOROP_3D_LUT,
+
+ /**
+ * @DRM_COLOROP_FIXED_MATRIX:
+ *
+ * enum string "Fixed Matrix"
+ *
+ * A Colorop block that performs a pre-defined matrix operation selected
+ * via the FIXED_MATRIX_TYPE enum property. The driver advertises the supported
+ * operations through this property.
+ */
+ DRM_COLOROP_FIXED_MATRIX,
+
};
/**
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 6:01 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
` (16 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Add the fixed-function CSC block to color pipeline in SDR planes
as a DRM_COLOROP_FIXED_MATRIX colorop.
v2:
- s/DRM_COLOROP_FM_YCBCR2020_FULL_RGB_NC/
DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB
- Inline icl_is_hdr_plane() instead of storing in local variable
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/intel_color_pipeline.c | 21 ++++++++++++++++++-
.../drm/i915/display/intel_display_limits.h | 1 +
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 6cf8080ee800..2ef42a133a98 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -43,6 +43,16 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
INTEL_PLANE_CB_POST_CSC_LUT,
};
+static const enum intel_color_block sdr_plane_pipeline[] = {
+ INTEL_PLANE_CB_CSC_FF,
+};
+
+static const u64 intel_plane_supported_csc_ff =
+ BIT(DRM_COLOROP_FM_YCBCR601_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR709_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_RGB709_RGB2020);
+
static bool plane_has_3dlut(struct intel_display *display, enum pipe pipe,
struct drm_plane *plane)
{
@@ -92,6 +102,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
DRM_COLOROP_FLAG_ALLOW_BYPASS);
break;
+ case INTEL_PLANE_CB_CSC_FF:
+ ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
+ &intel_colorop_funcs,
+ intel_plane_supported_csc_ff,
+ DRM_COLOROP_FLAG_ALLOW_BYPASS);
+ break;
default:
drm_err(plane->dev, "Invalid colorop id [%d]", id);
ret = -EINVAL;
@@ -126,9 +142,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
if (plane_has_3dlut(display, pipe, plane)) {
pipeline = xe3plpd_primary_plane_pipeline;
pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
- } else {
+ } else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
pipeline = hdr_plane_pipeline;
pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
+ } else {
+ pipeline = sdr_plane_pipeline;
+ pipeline_len = ARRAY_SIZE(sdr_plane_pipeline);
}
for (i = 0; i < pipeline_len; i++) {
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index ea89473c177f..7ba7360c574e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -169,6 +169,7 @@ enum aux_ch {
enum intel_color_block {
INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC,
+ INTEL_PLANE_CB_CSC_FF,
INTEL_PLANE_CB_POST_CSC_LUT,
INTEL_PLANE_CB_3DLUT,
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
` (15 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Extract the input CSC and YUV range correction logic from
glk_plane_color_ctl() into a dedicated glk_plane_color_ctl_input_csc()
helper. No functional change.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/skl_universal_plane.c | 32 +++++++++++--------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index ad4bfff6903d..50c6ceef9b9a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1240,37 +1240,43 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
return plane_color_ctl;
}
-static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- u32 plane_color_ctl = 0;
-
- plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
- plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+ u32 ctl = 0;
if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
switch (plane_state->hw.color_encoding) {
case DRM_COLOR_YCBCR_BT709:
- plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
break;
case DRM_COLOR_YCBCR_BT2020:
- plane_color_ctl |=
- PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
break;
default:
- plane_color_ctl |=
- PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
}
if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
} else if (fb->format->is_yuv) {
- plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
+ ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
}
+ return ctl;
+}
+
+static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+{
+ u32 plane_color_ctl = 0;
+
+ plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
+ plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+ plane_color_ctl |= glk_plane_color_ctl_input_csc(plane_state);
+
if (plane_state->force_black)
plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (2 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
` (14 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Add early return for non-YUV formats and hoist the duplicated
color_range check out of the if/else branches. No functional change.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 50c6ceef9b9a..da2df5be9848 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1247,7 +1247,10 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
u32 ctl = 0;
- if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
+ if (!fb->format->is_yuv)
+ return 0;
+
+ if (!icl_is_hdr_plane(display, plane->id)) {
switch (plane_state->hw.color_encoding) {
case DRM_COLOR_YCBCR_BT709:
ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
@@ -1258,14 +1261,13 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
default:
ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
}
- if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
- } else if (fb->format->is_yuv) {
+ } else {
ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
- if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
}
+ if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+
return ctl;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (3 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:59 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
` (13 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Add CSC mode to hw plane state to enable programming the fixed-function
CSC block for SDR planes based on the DRM_COLOROP_FIXED_MATRIX state.
Track the bypass state explicitly as a boolean since bypass is managed
separately from the FIXED_MATRIX enum value in the colorop framework.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++
drivers/gpu/drm/i915/display/intel_plane.c | 12 ++++++++++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index c048da7d6fea..b3e86a9a5c87 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -683,6 +683,8 @@ struct intel_plane_state {
enum drm_color_range color_range;
enum drm_scaling_filter scaling_filter;
struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
+ enum drm_colorop_fixed_matrix_type csc_ff_type; /* For SDR plane */
+ bool csc_ff_enable;
} hw;
struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index a440f92ff00c..217c7a84bbfa 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -430,11 +430,19 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
while (iter_colorop) {
for_each_new_colorop_in_state(&state->base, colorop, new_colorop_state, i) {
if (new_colorop_state->colorop == iter_colorop) {
- blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
intel_colorop = to_intel_colorop(colorop);
- changed |= intel_plane_colorop_replace_blob(plane_state,
+ if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
+ plane_state->hw.csc_ff_enable =
+ !new_colorop_state->bypass;
+ plane_state->hw.csc_ff_type =
+ new_colorop_state->fixed_matrix_type;
+ } else {
+ blob = new_colorop_state->bypass ?
+ NULL : new_colorop_state->data;
+ changed |= intel_plane_colorop_replace_blob(plane_state,
intel_colorop,
blob);
+ }
}
}
iter_colorop = iter_colorop->next;
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (4 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 6:01 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
` (12 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
When a color pipeline is active, program the SDR plane fixed-function
CSC. Keep the legacy color_encoding/color_range properties mutually
exclusive with color pipeline uapi.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/skl_universal_plane.c | 64 ++++++++++++++-----
1 file changed, 47 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index da2df5be9848..0e951b36ccca 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1240,33 +1240,63 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
return plane_color_ctl;
}
+static u32 intel_csc_ff_type_to_csc_mode(enum drm_colorop_fixed_matrix_type csc_ff_type)
+{
+ u32 csc_mode;
+
+ switch (csc_ff_type) {
+ case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ break;
+ case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ break;
+ case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+ csc_mode = PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ break;
+ case DRM_COLOROP_FM_RGB709_RGB2020:
+ csc_mode = PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020;
+ break;
+ default:
+ csc_mode = PLANE_COLOR_CSC_MODE_BYPASS;
+ }
+ return csc_mode;
+}
+
static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ bool color_pipeline = plane_state->uapi.state &&
+ plane_state->uapi.state->plane_color_pipeline;
u32 ctl = 0;
- if (!fb->format->is_yuv)
- return 0;
+ if (!color_pipeline) {
+ if (!fb->format->is_yuv)
+ return 0;
- if (!icl_is_hdr_plane(display, plane->id)) {
- switch (plane_state->hw.color_encoding) {
- case DRM_COLOR_YCBCR_BT709:
- ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
- break;
- case DRM_COLOR_YCBCR_BT2020:
- ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
- break;
- default:
- ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ if (!icl_is_hdr_plane(display, plane->id)) {
+ switch (plane_state->hw.color_encoding) {
+ case DRM_COLOR_YCBCR_BT709:
+ ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ break;
+ case DRM_COLOR_YCBCR_BT2020:
+ ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ break;
+ default:
+ ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ }
+ } else {
+ ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
}
- } else {
- ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
- }
- if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ } else if (!icl_is_hdr_plane(display, plane->id)) {
+ if (plane_state->hw.csc_ff_enable)
+ ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
+ }
return ctl;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (5 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:55 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
` (11 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Add support for color block which performs YCbCr limited-to-full
range expansion in the plane color pipeline. The color block is
represented using DRM_COLOROP_FIXED_MATRIX colorop.
v2:
- s/yuv_range_correct/yuv_range_correction_disable/ to mirror
HW register bit naming
- Fix inverted bypass logic: assign bypass state directly since
bypass=true means HW range correction should be disabled
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_display_limits.h | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_plane.c | 3 +++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 ++
5 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 2ef42a133a98..7d25f4fbfa9b 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -108,6 +108,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
intel_plane_supported_csc_ff,
DRM_COLOROP_FLAG_ALLOW_BYPASS);
break;
+ case INTEL_PLANE_CB_YUV_RANGE_CORRECT:
+ ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
+ &intel_colorop_funcs,
+ BIT(DRM_COLOROP_FM_YCBCR_LIMITED_FULL),
+ DRM_COLOROP_FLAG_ALLOW_BYPASS);
+ break;
default:
drm_err(plane->dev, "Invalid colorop id [%d]", id);
ret = -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index 7ba7360c574e..9493d333a242 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -172,6 +172,7 @@ enum intel_color_block {
INTEL_PLANE_CB_CSC_FF,
INTEL_PLANE_CB_POST_CSC_LUT,
INTEL_PLANE_CB_3DLUT,
+ INTEL_PLANE_CB_YUV_RANGE_CORRECT,
INTEL_CB_MAX
};
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b3e86a9a5c87..1c95271742eb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -685,6 +685,7 @@ struct intel_plane_state {
struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
enum drm_colorop_fixed_matrix_type csc_ff_type; /* For SDR plane */
bool csc_ff_enable;
+ bool yuv_range_correction_disable;
} hw;
struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index 217c7a84bbfa..54fb014f9087 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -436,6 +436,9 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
!new_colorop_state->bypass;
plane_state->hw.csc_ff_type =
new_colorop_state->fixed_matrix_type;
+ } else if (intel_colorop->id == INTEL_PLANE_CB_YUV_RANGE_CORRECT) {
+ plane_state->hw.yuv_range_correction_disable =
+ new_colorop_state->bypass;
} else {
blob = new_colorop_state->bypass ?
NULL : new_colorop_state->data;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 0e951b36ccca..9f4bc5a61ffb 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1296,6 +1296,8 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
} else if (!icl_is_hdr_plane(display, plane->id)) {
if (plane_state->hw.csc_ff_enable)
ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
+ if (plane_state->hw.yuv_range_correction_disable)
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
}
return ctl;
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (6 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:55 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
` (10 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Insert the INTEL_PLANE_CB_YUV_RANGE_CORRECT color block into the SDR
plane color pipeline. This enables YCbCr limited-to-full range expansion
ahead of the CSC block that expects full range pixel data. With this,
the pipeline can accept limited range framebuffers.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 7d25f4fbfa9b..7457fa51cb97 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -44,6 +44,7 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
};
static const enum intel_color_block sdr_plane_pipeline[] = {
+ INTEL_PLANE_CB_YUV_RANGE_CORRECT,
INTEL_PLANE_CB_CSC_FF,
};
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (7 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:56 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
` (9 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Extend the SDR plane color pipeline to include pre- and post-CSC
1D LUT blocks.
SDR planes use a smaller LUT size than HDR planes and therefore
initialize the 1D LUT colorops with the appropriate hardware
capacity.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 7457fa51cb97..136b9378ca48 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -15,6 +15,7 @@
#define MAX_COLOROP 4
#define PLANE_DEGAMMA_SIZE 128
#define PLANE_GAMMA_SIZE 32
+#define PLANE_DEGAMMA_SIZE_SDR 32
static const struct drm_colorop_funcs intel_colorop_funcs = {
.destroy = intel_colorop_destroy,
@@ -45,7 +46,9 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
static const enum intel_color_block sdr_plane_pipeline[] = {
INTEL_PLANE_CB_YUV_RANGE_CORRECT,
+ INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC_FF,
+ INTEL_PLANE_CB_POST_CSC_LUT,
};
static const u64 intel_plane_supported_csc_ff =
@@ -68,8 +71,10 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
enum intel_color_block id)
{
struct drm_device *dev = plane->dev;
+ struct intel_display *display = to_intel_display(dev);
struct intel_colorop *colorop;
int ret;
+ bool is_hdr = icl_is_hdr_plane(display, to_intel_plane(plane)->id);
colorop = intel_colorop_create(id);
@@ -81,7 +86,9 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
ret = drm_plane_colorop_curve_1d_lut_init(dev,
&colorop->base, plane,
&intel_colorop_funcs,
- PLANE_DEGAMMA_SIZE,
+ is_hdr ?
+ PLANE_DEGAMMA_SIZE :
+ PLANE_DEGAMMA_SIZE_SDR,
DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
DRM_COLOROP_FLAG_ALLOW_BYPASS);
break;
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (8 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
` (8 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Pranay Samala, Chaitanya Kumar Borah, Uma Shankar
From: Pranay Samala <pranay.samala@intel.com>
As we prepare to add support for LUT programming in SDR planes,
refactor HDR plane pre-CSC LUT programming to a helper.
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 30 ++++++++++++++--------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..2a32ab62721c 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3959,20 +3959,15 @@ xelpd_load_plane_csc_matrix(struct intel_dsb *dsb,
}
static void
-xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
- const struct intel_plane_state *plane_state)
+xelpd_load_hdr_pre_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *pre_csc_lut)
{
- struct intel_display *display = to_intel_display(plane_state);
- const struct drm_plane_state *state = &plane_state->uapi;
- enum pipe pipe = to_intel_plane(state->plane)->pipe;
- enum plane_id plane = to_intel_plane(state->plane)->id;
- const struct drm_color_lut32 *pre_csc_lut = plane_state->hw.degamma_lut->data;
int i, lut_size = 128;
u32 lut_val;
- if (!icl_is_hdr_plane(display, plane))
- return;
-
intel_de_write_dsb(display, dsb,
PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
PLANE_PAL_PREC_AUTO_INCREMENT);
@@ -3997,6 +3992,21 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
}
+static void
+xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
+ const struct intel_plane_state *plane_state)
+{
+ struct intel_display *display = to_intel_display(plane_state);
+ const struct drm_plane_state *state = &plane_state->uapi;
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ const struct drm_color_lut32 *pre_csc_lut = plane_state->hw.degamma_lut ?
+ plane_state->hw.degamma_lut->data : NULL;
+
+ if (icl_is_hdr_plane(display, plane))
+ xelpd_load_hdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
+}
+
static void
xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state)
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 11/14] drm/i915/color: Program Pre-CSC registers for SDR
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (9 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
` (7 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Pranay Samala, Chaitanya Kumar Borah, Uma Shankar
From: Pranay Samala <pranay.samala@intel.com>
Implement plane pre-CSC LUT support for SDR planes.
v2:
- s/drm_color_lut_extract/drm_color_lut32_extract
v3:
- Restructure loop to match HDR function pattern
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Co-developed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 2a32ab62721c..abf3b3a2e177 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3992,6 +3992,46 @@ xelpd_load_hdr_pre_csc_lut(struct intel_display *display,
intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
}
+static void
+xelpd_load_sdr_pre_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *pre_csc_lut)
+{
+ int i, lut_size = 32;
+ u32 lut_val;
+
+ /*
+ * First 3 planes are HDR, so reduce by 3 to get to the right
+ * SDR plane offset
+ */
+ plane = plane - 3;
+
+ intel_de_write_dsb(display, dsb,
+ PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0),
+ PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ for (i = 0; i < lut_size + 3; i++) {
+ if (pre_csc_lut) {
+ if (i < lut_size)
+ lut_val = drm_color_lut32_extract(pre_csc_lut[i].green, 16);
+ /* else duplicate last lut_val */
+ } else {
+ if (i < lut_size)
+ lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+ else
+ lut_val = 1 << 16;
+ }
+
+ intel_de_write_dsb(display, dsb,
+ PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+ lut_val);
+ }
+
+ intel_de_write_dsb(display, dsb, PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
static void
xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state)
@@ -4005,6 +4045,8 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
if (icl_is_hdr_plane(display, plane))
xelpd_load_hdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
+ else
+ xelpd_load_sdr_pre_csc_lut(display, dsb, pipe, plane, pre_csc_lut);
}
static void
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (10 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
` (6 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Pranay Samala, Chaitanya Kumar Borah, Uma Shankar
From: Pranay Samala <pranay.samala@intel.com>
Move HDR plane post-CSC LUT programming to improve code organization.
While at it, remove the segment 0 index register writes as it is not
currently programmed.
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 35 ++++++++++++----------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index abf3b3a2e177..360046979556 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4050,25 +4050,17 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
}
static void
-xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
- const struct intel_plane_state *plane_state)
+xelpd_load_hdr_post_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *post_csc_lut)
{
- struct intel_display *display = to_intel_display(plane_state);
- const struct drm_plane_state *state = &plane_state->uapi;
- enum pipe pipe = to_intel_plane(state->plane)->pipe;
- enum plane_id plane = to_intel_plane(state->plane)->id;
- const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
int i, lut_size = 32;
u32 lut_val;
- if (!icl_is_hdr_plane(display, plane))
- return;
-
intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
PLANE_PAL_PREC_AUTO_INCREMENT);
- /* TODO: Add macro */
- intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
- PLANE_PAL_PREC_AUTO_INCREMENT);
for (i = 0; i < lut_size + 3; i++) {
if (post_csc_lut) {
@@ -4088,8 +4080,21 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
}
intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
- intel_de_write_dsb(display, dsb,
- PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
+}
+
+static void
+xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
+ const struct intel_plane_state *plane_state)
+{
+ struct intel_display *display = to_intel_display(plane_state);
+ const struct drm_plane_state *state = &plane_state->uapi;
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut ?
+ plane_state->hw.gamma_lut->data : NULL;
+
+ if (icl_is_hdr_plane(display, plane))
+ xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
}
static void
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (11 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 6:05 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
` (5 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Pranay Samala, Chaitanya Kumar Borah, Uma Shankar
From: Pranay Samala <pranay.samala@intel.com>
Implement plane post-CSC LUT support for SDR planes.
v2:
- Restructure loop to match HDR function pattern
Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Co-developed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 360046979556..be2e1d8ce0e6 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4082,6 +4082,45 @@ xelpd_load_hdr_post_csc_lut(struct intel_display *display,
intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
}
+static void
+xelpd_load_sdr_post_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *post_csc_lut)
+{
+ int i, lut_size = 32;
+ u32 lut_val;
+
+ /*
+ * First 3 planes are HDR, so reduce by 3 to get to the right
+ * SDR plane offset
+ */
+ plane = plane - 3;
+
+ intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0),
+ PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ for (i = 0; i < lut_size + 3; i++) {
+ if (post_csc_lut) {
+ if (i < lut_size)
+ lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 16);
+ /* else duplicate last lut_val */
+ } else {
+ if (i < lut_size)
+ lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+ else
+ lut_val = 1 << 16;
+ }
+
+ intel_de_write_dsb(display, dsb,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+ lut_val);
+ }
+
+ intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
static void
xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state)
@@ -4095,6 +4134,8 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
if (icl_is_hdr_plane(display, plane))
xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
+ else
+ xelpd_load_sdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
}
static void
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [CI v4 14/14] drm/i915/color: Add color pipeline support for SDR planes
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (12 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
@ 2026-07-13 5:15 ` Chaitanya Kumar Borah
2026-07-13 5:59 ` sashiko-bot
2026-07-13 5:50 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev5) Patchwork
` (4 subsequent siblings)
18 siblings, 1 reply; 29+ messages in thread
From: Chaitanya Kumar Borah @ 2026-07-13 5:15 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel; +Cc: Chaitanya Kumar Borah, Uma Shankar
Now that everything is in place expose the SDR plane color pipeline
to user-space.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 136b9378ca48..a99b6eb20448 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -188,17 +188,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
{
- struct drm_device *dev = plane->dev;
- struct intel_display *display = to_intel_display(dev);
struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
int len = 0;
int ret = 0;
int i;
- /* Currently expose pipeline only for HDR planes */
- if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
- return 0;
-
/* Add pipeline consisting of transfer functions */
ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
if (ret)
--
2.25.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
2026-07-13 5:15 ` [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
@ 2026-07-13 5:48 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:48 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `u64 supported_fm` bitmask is incorrectly validated using the 32-bit `BIT()` macro, causing the validation to ignore invalid high bits on 32-bit systems.
--
--- Patch [1]: [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX ---
commit c09a55528ad3801e2bc4cab04c676078a00cc4e2
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
Introduce DRM_COLOROP_FIXED_MATRIX, a new colorop type representing a
hardware that performs a fixed matrix operation. Userspace selects one of
the predefined hardware modes via a new FIXED_MATRIX_TYPE enum property.
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index 682fcc6515259..483defad699c0 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
[ ... ]
> @@ -453,6 +462,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
> }
> EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>
> +/**
> + * drm_plane_colorop_fixed_matrix_init - Initialize a DRM_COLOROP_FIXED_MATRIX
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @funcs: control functions for the new colorop
> + * @supported_fm: A bitfield of supported drm_colorop_fixed_matrix_type enum values,
> + * created using BIT(fixed_matrix_type) and combined with the OR '|'
> + * operator.
> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> + * @return zero on success, -E value on failure
> + */
> +int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane,
> + const struct drm_colorop_funcs *funcs,
> + u64 supported_fm, uint32_t flags)
> +{
> + struct drm_prop_enum_list enum_list[DRM_COLOROP_FM_COUNT];
> + int i, len;
> + struct drm_property *prop;
> + int ret;
> +
> + if (!supported_fm) {
> + drm_err(dev,
> + "No supported FM type op for new Fixed Matrix colorop on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
> +
> + if ((supported_fm & -BIT(DRM_COLOROP_FM_COUNT)) != 0) {
[Severity: Medium]
Will this check ignore invalid high bits in supported_fm on 32-bit systems?
Since supported_fm is a u64, using the 32-bit BIT() macro on a 32-bit
architecture means -BIT(DRM_COLOROP_FM_COUNT) will result in a 32-bit
unsigned long (e.g., 0xFFFFFFE0UL). When bitwise-ANDed with a u64, this mask
zero-extends to 0x00000000FFFFFFE0ULL, causing any invalid bits set in the
upper 32 bits to be silently ignored instead of returning -EINVAL.
Would it be safer to use BIT_ULL() or GENMASK_ULL() here?
> + drm_err(dev, "Unknown Fixed Matrix provided on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=1
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev5)
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (13 preceding siblings ...)
2026-07-13 5:15 ` [CI v4 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
@ 2026-07-13 5:50 ` Patchwork
2026-07-13 6:34 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2026-07-13 5:50 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
== Series Details ==
Series: drm/i915/color: Enable SDR plane color pipeline (rev5)
URL : https://patchwork.freedesktop.org/series/162786/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:48:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:48:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:49:22] Starting KUnit Kernel (1/1)...
[05:49:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:49:22] ================== guc_buf (11 subtests) ===================
[05:49:22] [PASSED] test_smallest
[05:49:22] [PASSED] test_largest
[05:49:22] [PASSED] test_granular
[05:49:22] [PASSED] test_unique
[05:49:22] [PASSED] test_overlap
[05:49:22] [PASSED] test_reusable
[05:49:22] [PASSED] test_too_big
[05:49:22] [PASSED] test_flush
[05:49:22] [PASSED] test_lookup
[05:49:22] [PASSED] test_data
[05:49:22] [PASSED] test_class
[05:49:22] ===================== [PASSED] guc_buf =====================
[05:49:22] =================== guc_dbm (7 subtests) ===================
[05:49:22] [PASSED] test_empty
[05:49:22] [PASSED] test_default
[05:49:22] ======================== test_size ========================
[05:49:22] [PASSED] 4
[05:49:22] [PASSED] 8
[05:49:22] [PASSED] 32
[05:49:22] [PASSED] 256
[05:49:22] ==================== [PASSED] test_size ====================
[05:49:22] ======================= test_reuse ========================
[05:49:22] [PASSED] 4
[05:49:22] [PASSED] 8
[05:49:22] [PASSED] 32
[05:49:22] [PASSED] 256
[05:49:22] =================== [PASSED] test_reuse ====================
[05:49:22] =================== test_range_overlap ====================
[05:49:22] [PASSED] 4
[05:49:22] [PASSED] 8
[05:49:22] [PASSED] 32
[05:49:22] [PASSED] 256
[05:49:22] =============== [PASSED] test_range_overlap ================
[05:49:22] =================== test_range_compact ====================
[05:49:22] [PASSED] 4
[05:49:22] [PASSED] 8
[05:49:22] [PASSED] 32
[05:49:22] [PASSED] 256
[05:49:22] =============== [PASSED] test_range_compact ================
[05:49:22] ==================== test_range_spare =====================
[05:49:22] [PASSED] 4
[05:49:22] [PASSED] 8
[05:49:22] [PASSED] 32
[05:49:22] [PASSED] 256
[05:49:22] ================ [PASSED] test_range_spare =================
[05:49:22] ===================== [PASSED] guc_dbm =====================
[05:49:22] =================== guc_idm (6 subtests) ===================
[05:49:22] [PASSED] bad_init
[05:49:22] [PASSED] no_init
[05:49:22] [PASSED] init_fini
[05:49:22] [PASSED] check_used
[05:49:22] [PASSED] check_quota
[05:49:22] [PASSED] check_all
[05:49:22] ===================== [PASSED] guc_idm =====================
[05:49:22] =============== guc_klv_helpers (9 subtests) ===============
[05:49:22] [PASSED] test_count
[05:49:22] [PASSED] test_encode_u32
[05:49:22] [PASSED] test_encode_u64
[05:49:22] [PASSED] test_encode_string
[05:49:22] [PASSED] test_encode_object_raw
[05:49:22] [PASSED] test_encode_object_klv
[05:49:22] [PASSED] test_encode_object_nested
[05:49:22] [PASSED] test_encode_object_basic
[05:49:22] [PASSED] test_print
[05:49:22] ================= [PASSED] guc_klv_helpers =================
[05:49:22] ================== no_relay (3 subtests) ===================
[05:49:22] [PASSED] xe_drops_guc2pf_if_not_ready
[05:49:22] [PASSED] xe_drops_guc2vf_if_not_ready
[05:49:22] [PASSED] xe_rejects_send_if_not_ready
[05:49:22] ==================== [PASSED] no_relay =====================
[05:49:22] ================== pf_relay (14 subtests) ==================
[05:49:22] [PASSED] pf_rejects_guc2pf_too_short
[05:49:22] [PASSED] pf_rejects_guc2pf_too_long
[05:49:22] [PASSED] pf_rejects_guc2pf_no_payload
[05:49:22] [PASSED] pf_fails_no_payload
[05:49:22] [PASSED] pf_fails_bad_origin
[05:49:22] [PASSED] pf_fails_bad_type
[05:49:22] [PASSED] pf_txn_reports_error
[05:49:22] [PASSED] pf_txn_sends_pf2guc
[05:49:22] [PASSED] pf_sends_pf2guc
[05:49:22] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:49:22] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:49:22] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:49:22] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:49:22] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[05:49:22] ==================== [PASSED] pf_relay =====================
[05:49:22] ================== vf_relay (3 subtests) ===================
[05:49:22] [PASSED] vf_rejects_guc2vf_too_short
[05:49:22] [PASSED] vf_rejects_guc2vf_too_long
[05:49:22] [PASSED] vf_rejects_guc2vf_no_payload
[05:49:22] ==================== [PASSED] vf_relay =====================
[05:49:22] ================ pf_gt_config (9 subtests) =================
[05:49:22] [PASSED] fair_contexts_1vf
[05:49:22] [PASSED] fair_doorbells_1vf
[05:49:22] [PASSED] fair_ggtt_1vf
[05:49:22] ====================== fair_vram_1vf ======================
[05:49:22] [PASSED] 3.50 GiB
[05:49:22] [PASSED] 11.5 GiB
[05:49:22] [PASSED] 15.5 GiB
[05:49:22] [PASSED] 31.5 GiB
[05:49:22] [PASSED] 63.5 GiB
[05:49:22] [PASSED] 1.91 GiB
[05:49:22] ================== [PASSED] fair_vram_1vf ==================
[05:49:22] ================ fair_vram_1vf_admin_only =================
[05:49:22] [PASSED] 3.50 GiB
[05:49:22] [PASSED] 11.5 GiB
[05:49:22] [PASSED] 15.5 GiB
[05:49:22] [PASSED] 31.5 GiB
[05:49:22] [PASSED] 63.5 GiB
[05:49:22] [PASSED] 1.91 GiB
[05:49:22] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:49:22] ====================== fair_contexts ======================
[05:49:22] [PASSED] 1 VF
[05:49:22] [PASSED] 2 VFs
[05:49:22] [PASSED] 3 VFs
[05:49:22] [PASSED] 4 VFs
[05:49:22] [PASSED] 5 VFs
[05:49:22] [PASSED] 6 VFs
[05:49:22] [PASSED] 7 VFs
[05:49:22] [PASSED] 8 VFs
[05:49:22] [PASSED] 9 VFs
[05:49:22] [PASSED] 10 VFs
[05:49:22] [PASSED] 11 VFs
[05:49:22] [PASSED] 12 VFs
[05:49:22] [PASSED] 13 VFs
[05:49:22] [PASSED] 14 VFs
[05:49:22] [PASSED] 15 VFs
[05:49:22] [PASSED] 16 VFs
[05:49:22] [PASSED] 17 VFs
[05:49:22] [PASSED] 18 VFs
[05:49:22] [PASSED] 19 VFs
[05:49:22] [PASSED] 20 VFs
[05:49:22] [PASSED] 21 VFs
[05:49:22] [PASSED] 22 VFs
[05:49:22] [PASSED] 23 VFs
[05:49:22] [PASSED] 24 VFs
[05:49:22] [PASSED] 25 VFs
[05:49:22] [PASSED] 26 VFs
[05:49:22] [PASSED] 27 VFs
[05:49:22] [PASSED] 28 VFs
[05:49:22] [PASSED] 29 VFs
[05:49:22] [PASSED] 30 VFs
[05:49:22] [PASSED] 31 VFs
[05:49:22] [PASSED] 32 VFs
[05:49:22] [PASSED] 33 VFs
[05:49:22] [PASSED] 34 VFs
[05:49:22] [PASSED] 35 VFs
[05:49:22] [PASSED] 36 VFs
[05:49:22] [PASSED] 37 VFs
[05:49:22] [PASSED] 38 VFs
[05:49:22] [PASSED] 39 VFs
[05:49:22] [PASSED] 40 VFs
[05:49:22] [PASSED] 41 VFs
[05:49:22] [PASSED] 42 VFs
[05:49:22] [PASSED] 43 VFs
[05:49:22] [PASSED] 44 VFs
[05:49:22] [PASSED] 45 VFs
[05:49:22] [PASSED] 46 VFs
[05:49:22] [PASSED] 47 VFs
[05:49:22] [PASSED] 48 VFs
[05:49:22] [PASSED] 49 VFs
[05:49:22] [PASSED] 50 VFs
[05:49:22] [PASSED] 51 VFs
[05:49:22] [PASSED] 52 VFs
[05:49:22] [PASSED] 53 VFs
[05:49:22] [PASSED] 54 VFs
[05:49:22] [PASSED] 55 VFs
[05:49:22] [PASSED] 56 VFs
[05:49:22] [PASSED] 57 VFs
[05:49:22] [PASSED] 58 VFs
[05:49:22] [PASSED] 59 VFs
[05:49:22] [PASSED] 60 VFs
[05:49:22] [PASSED] 61 VFs
[05:49:22] [PASSED] 62 VFs
[05:49:22] [PASSED] 63 VFs
[05:49:22] ================== [PASSED] fair_contexts ==================
[05:49:22] ===================== fair_doorbells ======================
[05:49:22] [PASSED] 1 VF
[05:49:22] [PASSED] 2 VFs
[05:49:22] [PASSED] 3 VFs
[05:49:22] [PASSED] 4 VFs
[05:49:22] [PASSED] 5 VFs
[05:49:22] [PASSED] 6 VFs
[05:49:22] [PASSED] 7 VFs
[05:49:22] [PASSED] 8 VFs
[05:49:22] [PASSED] 9 VFs
[05:49:22] [PASSED] 10 VFs
[05:49:22] [PASSED] 11 VFs
[05:49:22] [PASSED] 12 VFs
[05:49:22] [PASSED] 13 VFs
[05:49:22] [PASSED] 14 VFs
[05:49:22] [PASSED] 15 VFs
[05:49:22] [PASSED] 16 VFs
[05:49:22] [PASSED] 17 VFs
[05:49:22] [PASSED] 18 VFs
[05:49:22] [PASSED] 19 VFs
[05:49:22] [PASSED] 20 VFs
[05:49:22] [PASSED] 21 VFs
[05:49:23] [PASSED] 22 VFs
[05:49:23] [PASSED] 23 VFs
[05:49:23] [PASSED] 24 VFs
[05:49:23] [PASSED] 25 VFs
[05:49:23] [PASSED] 26 VFs
[05:49:23] [PASSED] 27 VFs
[05:49:23] [PASSED] 28 VFs
[05:49:23] [PASSED] 29 VFs
[05:49:23] [PASSED] 30 VFs
[05:49:23] [PASSED] 31 VFs
[05:49:23] [PASSED] 32 VFs
[05:49:23] [PASSED] 33 VFs
[05:49:23] [PASSED] 34 VFs
[05:49:23] [PASSED] 35 VFs
[05:49:23] [PASSED] 36 VFs
[05:49:23] [PASSED] 37 VFs
[05:49:23] [PASSED] 38 VFs
[05:49:23] [PASSED] 39 VFs
[05:49:23] [PASSED] 40 VFs
[05:49:23] [PASSED] 41 VFs
[05:49:23] [PASSED] 42 VFs
[05:49:23] [PASSED] 43 VFs
[05:49:23] [PASSED] 44 VFs
[05:49:23] [PASSED] 45 VFs
[05:49:23] [PASSED] 46 VFs
[05:49:23] [PASSED] 47 VFs
[05:49:23] [PASSED] 48 VFs
[05:49:23] [PASSED] 49 VFs
[05:49:23] [PASSED] 50 VFs
[05:49:23] [PASSED] 51 VFs
[05:49:23] [PASSED] 52 VFs
[05:49:23] [PASSED] 53 VFs
[05:49:23] [PASSED] 54 VFs
[05:49:23] [PASSED] 55 VFs
[05:49:23] [PASSED] 56 VFs
[05:49:23] [PASSED] 57 VFs
[05:49:23] [PASSED] 58 VFs
[05:49:23] [PASSED] 59 VFs
[05:49:23] [PASSED] 60 VFs
[05:49:23] [PASSED] 61 VFs
[05:49:23] [PASSED] 62 VFs
[05:49:23] [PASSED] 63 VFs
[05:49:23] ================= [PASSED] fair_doorbells ==================
[05:49:23] ======================== fair_ggtt ========================
[05:49:23] [PASSED] 1 VF
[05:49:23] [PASSED] 2 VFs
[05:49:23] [PASSED] 3 VFs
[05:49:23] [PASSED] 4 VFs
[05:49:23] [PASSED] 5 VFs
[05:49:23] [PASSED] 6 VFs
[05:49:23] [PASSED] 7 VFs
[05:49:23] [PASSED] 8 VFs
[05:49:23] [PASSED] 9 VFs
[05:49:23] [PASSED] 10 VFs
[05:49:23] [PASSED] 11 VFs
[05:49:23] [PASSED] 12 VFs
[05:49:23] [PASSED] 13 VFs
[05:49:23] [PASSED] 14 VFs
[05:49:23] [PASSED] 15 VFs
[05:49:23] [PASSED] 16 VFs
[05:49:23] [PASSED] 17 VFs
[05:49:23] [PASSED] 18 VFs
[05:49:23] [PASSED] 19 VFs
[05:49:23] [PASSED] 20 VFs
[05:49:23] [PASSED] 21 VFs
[05:49:23] [PASSED] 22 VFs
[05:49:23] [PASSED] 23 VFs
[05:49:23] [PASSED] 24 VFs
[05:49:23] [PASSED] 25 VFs
[05:49:23] [PASSED] 26 VFs
[05:49:23] [PASSED] 27 VFs
[05:49:23] [PASSED] 28 VFs
[05:49:23] [PASSED] 29 VFs
[05:49:23] [PASSED] 30 VFs
[05:49:23] [PASSED] 31 VFs
[05:49:23] [PASSED] 32 VFs
[05:49:23] [PASSED] 33 VFs
[05:49:23] [PASSED] 34 VFs
[05:49:23] [PASSED] 35 VFs
[05:49:23] [PASSED] 36 VFs
[05:49:23] [PASSED] 37 VFs
[05:49:23] [PASSED] 38 VFs
[05:49:23] [PASSED] 39 VFs
[05:49:23] [PASSED] 40 VFs
[05:49:23] [PASSED] 41 VFs
[05:49:23] [PASSED] 42 VFs
[05:49:23] [PASSED] 43 VFs
[05:49:23] [PASSED] 44 VFs
[05:49:23] [PASSED] 45 VFs
[05:49:23] [PASSED] 46 VFs
[05:49:23] [PASSED] 47 VFs
[05:49:23] [PASSED] 48 VFs
[05:49:23] [PASSED] 49 VFs
[05:49:23] [PASSED] 50 VFs
[05:49:23] [PASSED] 51 VFs
[05:49:23] [PASSED] 52 VFs
[05:49:23] [PASSED] 53 VFs
[05:49:23] [PASSED] 54 VFs
[05:49:23] [PASSED] 55 VFs
[05:49:23] [PASSED] 56 VFs
[05:49:23] [PASSED] 57 VFs
[05:49:23] [PASSED] 58 VFs
[05:49:23] [PASSED] 59 VFs
[05:49:23] [PASSED] 60 VFs
[05:49:23] [PASSED] 61 VFs
[05:49:23] [PASSED] 62 VFs
[05:49:23] [PASSED] 63 VFs
[05:49:23] ==================== [PASSED] fair_ggtt ====================
[05:49:23] ======================== fair_vram ========================
[05:49:23] [PASSED] 1 VF
[05:49:23] [PASSED] 2 VFs
[05:49:23] [PASSED] 3 VFs
[05:49:23] [PASSED] 4 VFs
[05:49:23] [PASSED] 5 VFs
[05:49:23] [PASSED] 6 VFs
[05:49:23] [PASSED] 7 VFs
[05:49:23] [PASSED] 8 VFs
[05:49:23] [PASSED] 9 VFs
[05:49:23] [PASSED] 10 VFs
[05:49:23] [PASSED] 11 VFs
[05:49:23] [PASSED] 12 VFs
[05:49:23] [PASSED] 13 VFs
[05:49:23] [PASSED] 14 VFs
[05:49:23] [PASSED] 15 VFs
[05:49:23] [PASSED] 16 VFs
[05:49:23] [PASSED] 17 VFs
[05:49:23] [PASSED] 18 VFs
[05:49:23] [PASSED] 19 VFs
[05:49:23] [PASSED] 20 VFs
[05:49:23] [PASSED] 21 VFs
[05:49:23] [PASSED] 22 VFs
[05:49:23] [PASSED] 23 VFs
[05:49:23] [PASSED] 24 VFs
[05:49:23] [PASSED] 25 VFs
[05:49:23] [PASSED] 26 VFs
[05:49:23] [PASSED] 27 VFs
[05:49:23] [PASSED] 28 VFs
[05:49:23] [PASSED] 29 VFs
[05:49:23] [PASSED] 30 VFs
[05:49:23] [PASSED] 31 VFs
[05:49:23] [PASSED] 32 VFs
[05:49:23] [PASSED] 33 VFs
[05:49:23] [PASSED] 34 VFs
[05:49:23] [PASSED] 35 VFs
[05:49:23] [PASSED] 36 VFs
[05:49:23] [PASSED] 37 VFs
[05:49:23] [PASSED] 38 VFs
[05:49:23] [PASSED] 39 VFs
[05:49:23] [PASSED] 40 VFs
[05:49:23] [PASSED] 41 VFs
[05:49:23] [PASSED] 42 VFs
[05:49:23] [PASSED] 43 VFs
[05:49:23] [PASSED] 44 VFs
[05:49:23] [PASSED] 45 VFs
[05:49:23] [PASSED] 46 VFs
[05:49:23] [PASSED] 47 VFs
[05:49:23] [PASSED] 48 VFs
[05:49:23] [PASSED] 49 VFs
[05:49:23] [PASSED] 50 VFs
[05:49:23] [PASSED] 51 VFs
[05:49:23] [PASSED] 52 VFs
[05:49:23] [PASSED] 53 VFs
[05:49:23] [PASSED] 54 VFs
[05:49:23] [PASSED] 55 VFs
[05:49:23] [PASSED] 56 VFs
[05:49:23] [PASSED] 57 VFs
[05:49:23] [PASSED] 58 VFs
[05:49:23] [PASSED] 59 VFs
[05:49:23] [PASSED] 60 VFs
[05:49:23] [PASSED] 61 VFs
[05:49:23] [PASSED] 62 VFs
[05:49:23] [PASSED] 63 VFs
[05:49:23] ==================== [PASSED] fair_vram ====================
[05:49:23] ================== [PASSED] pf_gt_config ===================
[05:49:23] ===================== lmtt (1 subtest) =====================
[05:49:23] ======================== test_ops =========================
[05:49:23] [PASSED] 2-level
[05:49:23] [PASSED] multi-level
[05:49:23] ==================== [PASSED] test_ops =====================
[05:49:23] ====================== [PASSED] lmtt =======================
[05:49:23] ================= sriov_packet (1 subtest) =================
[05:49:23] [PASSED] test_descriptor_init
[05:49:23] ================== [PASSED] sriov_packet ===================
[05:49:23] ================= pf_service (11 subtests) =================
[05:49:23] [PASSED] pf_negotiate_any
[05:49:23] [PASSED] pf_negotiate_base_match
[05:49:23] [PASSED] pf_negotiate_base_newer
[05:49:23] [PASSED] pf_negotiate_base_next
[05:49:23] [SKIPPED] pf_negotiate_base_older (no older minor)
[05:49:23] [PASSED] pf_negotiate_base_prev
[05:49:23] [PASSED] pf_negotiate_latest_match
[05:49:23] [PASSED] pf_negotiate_latest_newer
[05:49:23] [PASSED] pf_negotiate_latest_next
[05:49:23] [SKIPPED] pf_negotiate_latest_older (no older minor)
[05:49:23] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[05:49:23] =================== [PASSED] pf_service ====================
[05:49:23] ================= xe_guc_g2g (2 subtests) ==================
[05:49:23] ============== xe_live_guc_g2g_kunit_default ==============
[05:49:23] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:49:23] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:49:23] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:49:23] =================== [SKIPPED] xe_guc_g2g ===================
[05:49:23] =================== xe_mocs (2 subtests) ===================
[05:49:23] ================ xe_live_mocs_kernel_kunit ================
[05:49:23] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:49:23] ================ xe_live_mocs_reset_kunit =================
[05:49:23] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:49:23] ==================== [SKIPPED] xe_mocs =====================
[05:49:23] ================= xe_migrate (2 subtests) ==================
[05:49:23] ================= xe_migrate_sanity_kunit =================
[05:49:23] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:49:23] ================== xe_validate_ccs_kunit ==================
[05:49:23] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:49:23] =================== [SKIPPED] xe_migrate ===================
[05:49:23] ================== xe_dma_buf (1 subtest) ==================
[05:49:23] ==================== xe_dma_buf_kunit =====================
[05:49:23] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:49:23] =================== [SKIPPED] xe_dma_buf ===================
[05:49:23] ================= xe_bo_shrink (1 subtest) =================
[05:49:23] =================== xe_bo_shrink_kunit ====================
[05:49:23] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:49:23] ================== [SKIPPED] xe_bo_shrink ==================
[05:49:23] ==================== xe_bo (2 subtests) ====================
[05:49:23] ================== xe_ccs_migrate_kunit ===================
[05:49:23] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:49:23] ==================== xe_bo_evict_kunit ====================
[05:49:23] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:49:23] ===================== [SKIPPED] xe_bo ======================
[05:49:23] ==================== args (13 subtests) ====================
[05:49:23] [PASSED] count_args_test
[05:49:23] [PASSED] call_args_example
[05:49:23] [PASSED] call_args_test
[05:49:23] [PASSED] drop_first_arg_example
[05:49:23] [PASSED] drop_first_arg_test
[05:49:23] [PASSED] first_arg_example
[05:49:23] [PASSED] first_arg_test
[05:49:23] [PASSED] last_arg_example
[05:49:23] [PASSED] last_arg_test
[05:49:23] [PASSED] pick_arg_example
[05:49:23] [PASSED] if_args_example
[05:49:23] [PASSED] if_args_test
[05:49:23] [PASSED] sep_comma_example
[05:49:23] ====================== [PASSED] args =======================
[05:49:23] =================== xe_pci (3 subtests) ====================
[05:49:23] ==================== check_graphics_ip ====================
[05:49:23] [PASSED] 12.00 Xe_LP
[05:49:23] [PASSED] 12.10 Xe_LP+
[05:49:23] [PASSED] 12.55 Xe_HPG
[05:49:23] [PASSED] 12.60 Xe_HPC
[05:49:23] [PASSED] 12.70 Xe_LPG
[05:49:23] [PASSED] 12.71 Xe_LPG
[05:49:23] [PASSED] 12.74 Xe_LPG+
[05:49:23] [PASSED] 20.01 Xe2_HPG
[05:49:23] [PASSED] 20.02 Xe2_HPG
[05:49:23] [PASSED] 20.04 Xe2_LPG
[05:49:23] [PASSED] 30.00 Xe3_LPG
[05:49:23] [PASSED] 30.01 Xe3_LPG
[05:49:23] [PASSED] 30.03 Xe3_LPG
[05:49:23] [PASSED] 30.04 Xe3_LPG
[05:49:23] [PASSED] 30.05 Xe3_LPG
[05:49:23] [PASSED] 35.10 Xe3p_LPG
[05:49:23] [PASSED] 35.11 Xe3p_XPC
[05:49:23] ================ [PASSED] check_graphics_ip ================
[05:49:23] ===================== check_media_ip ======================
[05:49:23] [PASSED] 12.00 Xe_M
[05:49:23] [PASSED] 12.55 Xe_HPM
[05:49:23] [PASSED] 13.00 Xe_LPM+
[05:49:23] [PASSED] 13.01 Xe2_HPM
[05:49:23] [PASSED] 20.00 Xe2_LPM
[05:49:23] [PASSED] 30.00 Xe3_LPM
[05:49:23] [PASSED] 30.02 Xe3_LPM
[05:49:23] [PASSED] 35.00 Xe3p_LPM
[05:49:23] [PASSED] 35.03 Xe3p_HPM
[05:49:23] ================= [PASSED] check_media_ip ==================
[05:49:23] =================== check_platform_desc ===================
[05:49:23] [PASSED] 0x9A60 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A68 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A70 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A40 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A49 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A59 (TIGERLAKE)
[05:49:23] [PASSED] 0x9A78 (TIGERLAKE)
[05:49:23] [PASSED] 0x9AC0 (TIGERLAKE)
[05:49:23] [PASSED] 0x9AC9 (TIGERLAKE)
[05:49:23] [PASSED] 0x9AD9 (TIGERLAKE)
[05:49:23] [PASSED] 0x9AF8 (TIGERLAKE)
[05:49:23] [PASSED] 0x4C80 (ROCKETLAKE)
[05:49:23] [PASSED] 0x4C8A (ROCKETLAKE)
[05:49:23] [PASSED] 0x4C8B (ROCKETLAKE)
[05:49:23] [PASSED] 0x4C8C (ROCKETLAKE)
[05:49:23] [PASSED] 0x4C90 (ROCKETLAKE)
[05:49:23] [PASSED] 0x4C9A (ROCKETLAKE)
[05:49:23] [PASSED] 0x4680 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4682 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4688 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x468A (ALDERLAKE_S)
[05:49:23] [PASSED] 0x468B (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4690 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4692 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4693 (ALDERLAKE_S)
[05:49:23] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46AA (ALDERLAKE_P)
[05:49:23] [PASSED] 0x462A (ALDERLAKE_P)
[05:49:23] [PASSED] 0x4626 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x4628 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:49:23] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:49:23] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:49:23] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:49:23] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:49:23] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:49:23] [PASSED] 0xA721 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA720 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:49:23] [PASSED] 0xA780 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA781 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA782 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA783 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA788 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA789 (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA78A (ALDERLAKE_S)
[05:49:23] [PASSED] 0xA78B (ALDERLAKE_S)
[05:49:23] [PASSED] 0x4905 (DG1)
[05:49:23] [PASSED] 0x4906 (DG1)
[05:49:23] [PASSED] 0x4907 (DG1)
[05:49:23] [PASSED] 0x4908 (DG1)
[05:49:23] [PASSED] 0x4909 (DG1)
[05:49:23] [PASSED] 0x56C0 (DG2)
[05:49:23] [PASSED] 0x56C2 (DG2)
[05:49:23] [PASSED] 0x56C1 (DG2)
[05:49:23] [PASSED] 0x7D51 (METEORLAKE)
[05:49:23] [PASSED] 0x7DD1 (METEORLAKE)
[05:49:23] [PASSED] 0x7D41 (METEORLAKE)
[05:49:23] [PASSED] 0x7D67 (METEORLAKE)
[05:49:23] [PASSED] 0xB640 (METEORLAKE)
[05:49:23] [PASSED] 0x56A0 (DG2)
[05:49:23] [PASSED] 0x56A1 (DG2)
[05:49:23] [PASSED] 0x56A2 (DG2)
[05:49:23] [PASSED] 0x56BE (DG2)
[05:49:23] [PASSED] 0x56BF (DG2)
[05:49:23] [PASSED] 0x5690 (DG2)
[05:49:23] [PASSED] 0x5691 (DG2)
[05:49:23] [PASSED] 0x5692 (DG2)
[05:49:23] [PASSED] 0x56A5 (DG2)
[05:49:23] [PASSED] 0x56A6 (DG2)
[05:49:23] [PASSED] 0x56B0 (DG2)
[05:49:23] [PASSED] 0x56B1 (DG2)
[05:49:23] [PASSED] 0x56BA (DG2)
[05:49:23] [PASSED] 0x56BB (DG2)
[05:49:23] [PASSED] 0x56BC (DG2)
[05:49:23] [PASSED] 0x56BD (DG2)
[05:49:23] [PASSED] 0x5693 (DG2)
[05:49:23] [PASSED] 0x5694 (DG2)
[05:49:23] [PASSED] 0x5695 (DG2)
[05:49:23] [PASSED] 0x56A3 (DG2)
[05:49:23] [PASSED] 0x56A4 (DG2)
[05:49:23] [PASSED] 0x56B2 (DG2)
[05:49:23] [PASSED] 0x56B3 (DG2)
[05:49:23] [PASSED] 0x5696 (DG2)
[05:49:23] [PASSED] 0x5697 (DG2)
[05:49:23] [PASSED] 0xB69 (PVC)
[05:49:23] [PASSED] 0xB6E (PVC)
[05:49:23] [PASSED] 0xBD4 (PVC)
[05:49:23] [PASSED] 0xBD5 (PVC)
[05:49:23] [PASSED] 0xBD6 (PVC)
[05:49:23] [PASSED] 0xBD7 (PVC)
[05:49:23] [PASSED] 0xBD8 (PVC)
[05:49:23] [PASSED] 0xBD9 (PVC)
[05:49:23] [PASSED] 0xBDA (PVC)
[05:49:23] [PASSED] 0xBDB (PVC)
[05:49:23] [PASSED] 0xBE0 (PVC)
[05:49:23] [PASSED] 0xBE1 (PVC)
[05:49:23] [PASSED] 0xBE5 (PVC)
[05:49:23] [PASSED] 0x7D40 (METEORLAKE)
[05:49:23] [PASSED] 0x7D45 (METEORLAKE)
[05:49:23] [PASSED] 0x7D55 (METEORLAKE)
[05:49:23] [PASSED] 0x7D60 (METEORLAKE)
[05:49:23] [PASSED] 0x7DD5 (METEORLAKE)
[05:49:23] [PASSED] 0x6420 (LUNARLAKE)
[05:49:23] [PASSED] 0x64A0 (LUNARLAKE)
[05:49:23] [PASSED] 0x64B0 (LUNARLAKE)
[05:49:23] [PASSED] 0xE202 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE209 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE20B (BATTLEMAGE)
[05:49:23] [PASSED] 0xE20C (BATTLEMAGE)
[05:49:23] [PASSED] 0xE20D (BATTLEMAGE)
[05:49:23] [PASSED] 0xE210 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE211 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE212 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE216 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE220 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE221 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE222 (BATTLEMAGE)
[05:49:23] [PASSED] 0xE223 (BATTLEMAGE)
[05:49:23] [PASSED] 0xB080 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB081 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB082 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB083 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB084 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB085 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB086 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB087 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB08F (PANTHERLAKE)
[05:49:23] [PASSED] 0xB090 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:49:23] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:49:23] [PASSED] 0xFD80 (PANTHERLAKE)
[05:49:23] [PASSED] 0xFD81 (PANTHERLAKE)
[05:49:23] [PASSED] 0xD740 (NOVALAKE_S)
[05:49:23] [PASSED] 0xD741 (NOVALAKE_S)
[05:49:23] [PASSED] 0xD742 (NOVALAKE_S)
[05:49:23] [PASSED] 0xD743 (NOVALAKE_S)
[05:49:23] [PASSED] 0xD745 (NOVALAKE_S)
[05:49:23] [PASSED] 0xD74A (NOVALAKE_S)
[05:49:23] [PASSED] 0xD74B (NOVALAKE_S)
[05:49:23] [PASSED] 0x674C (CRESCENTISLAND)
[05:49:23] [PASSED] 0x674D (CRESCENTISLAND)
[05:49:23] [PASSED] 0x674E (CRESCENTISLAND)
[05:49:23] [PASSED] 0x674F (CRESCENTISLAND)
[05:49:23] [PASSED] 0x6750 (CRESCENTISLAND)
[05:49:23] [PASSED] 0xD750 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD751 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD752 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD753 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD754 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD755 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD756 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD757 (NOVALAKE_P)
[05:49:23] [PASSED] 0xD75F (NOVALAKE_P)
[05:49:23] =============== [PASSED] check_platform_desc ===============
[05:49:23] ===================== [PASSED] xe_pci ======================
[05:49:23] ============= xe_rtp_tables_test (5 subtests) ==============
[05:49:23] ================== xe_rtp_table_gt_test ===================
[05:49:23] [PASSED] gt_was/14011060649
[05:49:23] [PASSED] gt_was/14011059788
[05:49:23] [PASSED] gt_was/14015795083
[05:49:23] [PASSED] gt_was/16021867713
[05:49:23] [PASSED] gt_was/14019449301
[05:49:23] [PASSED] gt_was/16028005424
[05:49:23] [PASSED] gt_was/14026578760
[05:49:23] [PASSED] gt_was/1409420604
[05:49:23] [PASSED] gt_was/1408615072
[05:49:23] [PASSED] gt_was/22010523718
[05:49:23] [PASSED] gt_was/14011006942
[05:49:23] [PASSED] gt_was/14014830051
[05:49:23] [PASSED] gt_was/18018781329
[05:49:23] [PASSED] gt_was/1509235366
[05:49:23] [PASSED] gt_was/18018781329
[05:49:23] [PASSED] gt_was/16016694945
[05:49:23] [PASSED] gt_was/14018575942
[05:49:23] [PASSED] gt_was/22016670082
[05:49:23] [PASSED] gt_was/22016670082
[05:49:23] [PASSED] gt_was/14017421178
[05:49:23] [PASSED] gt_was/16025250150
[05:49:23] [PASSED] gt_was/14021871409
[05:49:23] [PASSED] gt_was/16021865536
[05:49:23] [PASSED] gt_was/14021486841
[05:49:23] [PASSED] gt_was/14025160223
[05:49:23] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[05:49:23] [PASSED] gt_was/14025635424
[05:49:23] [PASSED] gt_was/16028005424
[05:49:23] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:49:23] ================== xe_rtp_table_gt_test ===================
[05:49:23] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[05:49:23] [PASSED] gt_tunings/Tuning: 32B Access Enable
[05:49:23] [PASSED] gt_tunings/Tuning: L3 cache
[05:49:23] [PASSED] gt_tunings/Tuning: L3 cache - media
[05:49:23] [PASSED] gt_tunings/Tuning: Compression Overfetch
[05:49:23] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[05:49:23] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[05:49:23] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[05:49:23] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[05:49:23] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[05:49:23] [PASSED] gt_tunings/Tuning: Stateless compression control
[05:49:23] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[05:49:23] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[05:49:23] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[05:49:23] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[05:49:23] ============== [PASSED] xe_rtp_table_gt_test ===============
[05:49:23] ================== xe_rtp_table_oob_test ==================
[05:49:23] [PASSED] oob_was/1607983814
[05:49:23] [PASSED] oob_was/16010904313
[05:49:23] [PASSED] oob_was/18022495364
[05:49:23] [PASSED] oob_was/22012773006
[05:49:23] [PASSED] oob_was/14014475959
[05:49:23] [PASSED] oob_was/22011391025
[05:49:23] [PASSED] oob_was/22012727170
[05:49:23] [PASSED] oob_was/22012727685
[05:49:23] [PASSED] oob_was/22016596838
[05:49:23] [PASSED] oob_was/18020744125
[05:49:23] [PASSED] oob_was/1409600907
[05:49:23] [PASSED] oob_was/22014953428
[05:49:23] [PASSED] oob_was/16017236439
[05:49:23] [PASSED] oob_was/14019821291
[05:49:23] [PASSED] oob_was/14015076503
[05:49:23] [PASSED] oob_was/14018913170
[05:49:23] [PASSED] oob_was/14018094691
[05:49:23] [PASSED] oob_was/18024947630
[05:49:23] [PASSED] oob_was/16022287689
[05:49:23] [PASSED] oob_was/13011645652
[05:49:23] [PASSED] oob_was/14022293748
[05:49:23] [PASSED] oob_was/22019794406
[05:49:23] [PASSED] oob_was/22019338487
[05:49:23] [PASSED] oob_was/16023588340
[05:49:23] [PASSED] oob_was/14019789679
[05:49:23] [PASSED] oob_was/14022866841
[05:49:23] [PASSED] oob_was/16021333562
[05:49:23] [PASSED] oob_was/14016712196
[05:49:23] [PASSED] oob_was/14015568240
[05:49:23] [PASSED] oob_was/18013179988
[05:49:23] [PASSED] oob_was/1508761755
[05:49:23] [PASSED] oob_was/16023105232
[05:49:23] [PASSED] oob_was/16026508708
[05:49:23] [PASSED] oob_was/14020001231
[05:49:23] [PASSED] oob_was/16023683509
[05:49:23] [PASSED] oob_was/14025515070
[05:49:23] [PASSED] oob_was/15015404425_disable
[05:49:23] [PASSED] oob_was/16026007364
[05:49:23] [PASSED] oob_was/14020316580
[05:49:23] [PASSED] oob_was/14025883347
[05:49:23] [PASSED] oob_was/16029380221
[05:49:23] [PASSED] oob_was/22022079272
[05:49:23] [PASSED] oob_was/16029897822
[05:49:23] ============== [PASSED] xe_rtp_table_oob_test ==============
[05:49:23] ================ xe_rtp_table_dev_oob_test ================
[05:49:23] [PASSED] device_oob_was/22010954014
[05:49:23] [PASSED] device_oob_was/15015404425
[05:49:23] [PASSED] device_oob_was/22019338487_display
[05:49:23] [PASSED] device_oob_was/14022085890
[05:49:23] [PASSED] device_oob_was/14026539277
[05:49:23] [PASSED] device_oob_was/14026633728
[05:49:23] [PASSED] device_oob_was/14026746987
[05:49:23] [PASSED] device_oob_was/14026779378
[05:49:23] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[05:49:23] ========== xe_rtp_table_missing_upper_bound_test ==========
[05:49:23] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[05:49:23] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[05:49:23] [PASSED] register_whitelist/1806527549
[05:49:23] [PASSED] register_whitelist/allow_read_ctx_timestamp
[05:49:23] [PASSED] register_whitelist/allow_read_queue_timestamp
[05:49:23] [PASSED] register_whitelist/16014440446
[05:49:23] [PASSED] register_whitelist/16017236439
[05:49:23] [PASSED] register_whitelist/16020183090
[05:49:23] [PASSED] register_whitelist/14024997852
[05:49:23] [PASSED] register_whitelist/14024997852
[05:49:23] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[05:49:23] =============== [PASSED] xe_rtp_tables_test ================
[05:49:23] =================== xe_rtp (3 subtests) ====================
[05:49:23] =================== xe_rtp_rules_tests ====================
[05:49:23] [PASSED] no
[05:49:23] [PASSED] yes
[05:49:23] [PASSED] no-and-no
[05:49:23] [PASSED] no-and-yes
[05:49:23] [PASSED] yes-and-no
[05:49:23] [PASSED] yes-and-yes
[05:49:23] [PASSED] no-or-no
[05:49:23] [PASSED] no-or-yes
[05:49:23] [PASSED] yes-or-no
[05:49:23] [PASSED] yes-or-yes
[05:49:23] [PASSED] no-yes-or-yes-no
[05:49:23] [PASSED] no-yes-or-yes-yes
[05:49:23] [PASSED] yes-yes-or-no-yes
[05:49:23] [PASSED] yes-yes-or-yes-yes
[05:49:23] [PASSED] no-no-or-yes-or-no
[05:49:23] [PASSED] or
[05:49:23] [PASSED] or-yes
[05:49:23] [PASSED] or-no
[05:49:23] [PASSED] yes-or
[05:49:23] [PASSED] no-or
[05:49:23] [PASSED] no-or-or-yes
[05:49:23] [PASSED] yes-or-or-no
[05:49:23] [PASSED] no-or-or-no
[05:49:23] [PASSED] missing-context-engine-class
[05:49:23] [PASSED] missing-context-engine-class-or-yes
[05:49:23] [PASSED] missing-context-engine-class-or-or-yes
[05:49:23] =============== [PASSED] xe_rtp_rules_tests ================
[05:49:23] =============== xe_rtp_process_to_sr_tests ================
[05:49:23] [PASSED] coalesce-same-reg
[05:49:23] [PASSED] coalesce-same-reg-literal-and-func
[05:49:23] [PASSED] no-match-no-add
[05:49:23] [PASSED] two-regs-two-entries
[05:49:23] [PASSED] clr-one-set-other
[05:49:23] [PASSED] set-field
[05:49:23] [PASSED] conflict-duplicate
[05:49:23] [PASSED] conflict-not-disjoint
[05:49:23] [PASSED] conflict-not-disjoint-literal-and-func
[05:49:23] [PASSED] conflict-reg-type
[05:49:23] [PASSED] bad-mcr-reg-forced-to-regular
[05:49:23] [PASSED] bad-regular-reg-forced-to-mcr
[05:49:23] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:49:23] ================== xe_rtp_process_tests ===================
[05:49:23] [PASSED] active1
[05:49:23] [PASSED] active2
[05:49:23] [PASSED] active-inactive
[05:49:23] [PASSED] inactive-active
[05:49:23] [PASSED] inactive-active-inactive
[05:49:23] [PASSED] inactive-inactive-inactive
[05:49:23] ============== [PASSED] xe_rtp_process_tests ===============
[05:49:23] ===================== [PASSED] xe_rtp ======================
[05:49:23] ==================== xe_wa (1 subtest) =====================
[05:49:23] ======================== xe_wa_gt =========================
[05:49:23] [PASSED] TIGERLAKE B0
[05:49:23] [PASSED] DG1 A0
[05:49:23] [PASSED] DG1 B0
[05:49:23] [PASSED] ALDERLAKE_S A0
[05:49:23] [PASSED] ALDERLAKE_S B0
[05:49:23] [PASSED] ALDERLAKE_S C0
[05:49:23] [PASSED] ALDERLAKE_S D0
[05:49:23] [PASSED] ALDERLAKE_P A0
[05:49:23] [PASSED] ALDERLAKE_P B0
[05:49:23] [PASSED] ALDERLAKE_P C0
[05:49:23] [PASSED] ALDERLAKE_S RPLS D0
[05:49:23] [PASSED] ALDERLAKE_P RPLU E0
[05:49:23] [PASSED] DG2 G10 C0
[05:49:23] [PASSED] DG2 G11 B1
[05:49:23] [PASSED] DG2 G12 A1
[05:49:23] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:49:23] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:49:23] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:49:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:49:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:49:23] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:49:23] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:49:23] ==================== [PASSED] xe_wa_gt =====================
[05:49:23] ====================== [PASSED] xe_wa ======================
[05:49:23] ============================================================
[05:49:23] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[05:49:23] Elapsed time: 36.721s total, 4.326s configuring, 31.728s building, 0.647s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:49:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:49:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:49:49] Starting KUnit Kernel (1/1)...
[05:49:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:49:50] ============ drm_test_pick_cmdline (2 subtests) ============
[05:49:50] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:49:50] =============== drm_test_pick_cmdline_named ===============
[05:49:50] [PASSED] NTSC
[05:49:50] [PASSED] NTSC-J
[05:49:50] [PASSED] PAL
[05:49:50] [PASSED] PAL-M
[05:49:50] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:49:50] ============== [PASSED] drm_test_pick_cmdline ==============
[05:49:50] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:49:50] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:49:50] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:49:50] =========== drm_validate_clone_mode (2 subtests) ===========
[05:49:50] ============== drm_test_check_in_clone_mode ===============
[05:49:50] [PASSED] in_clone_mode
[05:49:50] [PASSED] not_in_clone_mode
[05:49:50] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:49:50] =============== drm_test_check_valid_clones ===============
[05:49:50] [PASSED] not_in_clone_mode
[05:49:50] [PASSED] valid_clone
[05:49:50] [PASSED] invalid_clone
[05:49:50] =========== [PASSED] drm_test_check_valid_clones ===========
[05:49:50] ============= [PASSED] drm_validate_clone_mode =============
[05:49:50] ============= drm_validate_modeset (1 subtest) =============
[05:49:50] [PASSED] drm_test_check_connector_changed_modeset
[05:49:50] ============== [PASSED] drm_validate_modeset ===============
[05:49:50] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:49:50] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:49:50] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:49:50] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:49:50] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[05:49:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:49:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:49:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:49:50] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[05:49:50] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:49:50] ============== drm_bridge_alloc (2 subtests) ===============
[05:49:50] [PASSED] drm_test_drm_bridge_alloc_basic
[05:49:50] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:49:50] ================ [PASSED] drm_bridge_alloc =================
[05:49:50] ============= drm_bridge_bus_fmt (5 subtests) ==============
[05:49:50] [PASSED] drm_test_bridge_rgb_yuv_rgb
[05:49:50] [PASSED] drm_test_bridge_must_convert_to_yuv444
[05:49:50] [PASSED] drm_test_bridge_hdmi_auto_rgb
[05:49:50] [PASSED] drm_test_bridge_auto_first
[05:49:50] [PASSED] drm_test_bridge_rgb_yuv_no_path
[05:49:50] =============== [PASSED] drm_bridge_bus_fmt ================
[05:49:50] ============= drm_cmdline_parser (40 subtests) =============
[05:49:50] [PASSED] drm_test_cmdline_force_d_only
[05:49:50] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:49:50] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:49:50] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:49:50] [PASSED] drm_test_cmdline_force_e_only
[05:49:50] [PASSED] drm_test_cmdline_res
[05:49:50] [PASSED] drm_test_cmdline_res_vesa
[05:49:50] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:49:50] [PASSED] drm_test_cmdline_res_rblank
[05:49:50] [PASSED] drm_test_cmdline_res_bpp
[05:49:50] [PASSED] drm_test_cmdline_res_refresh
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:49:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:49:50] [PASSED] drm_test_cmdline_res_margins_force_on
[05:49:50] [PASSED] drm_test_cmdline_res_vesa_margins
[05:49:50] [PASSED] drm_test_cmdline_name
[05:49:50] [PASSED] drm_test_cmdline_name_bpp
[05:49:50] [PASSED] drm_test_cmdline_name_option
[05:49:50] [PASSED] drm_test_cmdline_name_bpp_option
[05:49:50] [PASSED] drm_test_cmdline_rotate_0
[05:49:50] [PASSED] drm_test_cmdline_rotate_90
[05:49:50] [PASSED] drm_test_cmdline_rotate_180
[05:49:50] [PASSED] drm_test_cmdline_rotate_270
[05:49:50] [PASSED] drm_test_cmdline_hmirror
[05:49:50] [PASSED] drm_test_cmdline_vmirror
[05:49:50] [PASSED] drm_test_cmdline_margin_options
[05:49:50] [PASSED] drm_test_cmdline_multiple_options
[05:49:50] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:49:50] [PASSED] drm_test_cmdline_extra_and_option
[05:49:50] [PASSED] drm_test_cmdline_freestanding_options
[05:49:50] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:49:50] [PASSED] drm_test_cmdline_panel_orientation
[05:49:50] ================ drm_test_cmdline_invalid =================
[05:49:50] [PASSED] margin_only
[05:49:50] [PASSED] interlace_only
[05:49:50] [PASSED] res_missing_x
[05:49:50] [PASSED] res_missing_y
[05:49:50] [PASSED] res_bad_y
[05:49:50] [PASSED] res_missing_y_bpp
[05:49:50] [PASSED] res_bad_bpp
[05:49:50] [PASSED] res_bad_refresh
[05:49:50] [PASSED] res_bpp_refresh_force_on_off
[05:49:50] [PASSED] res_invalid_mode
[05:49:50] [PASSED] res_bpp_wrong_place_mode
[05:49:50] [PASSED] name_bpp_refresh
[05:49:50] [PASSED] name_refresh
[05:49:50] [PASSED] name_refresh_wrong_mode
[05:49:50] [PASSED] name_refresh_invalid_mode
[05:49:50] [PASSED] rotate_multiple
[05:49:50] [PASSED] rotate_invalid_val
[05:49:50] [PASSED] rotate_truncated
[05:49:50] [PASSED] invalid_option
[05:49:50] [PASSED] invalid_tv_option
[05:49:50] [PASSED] truncated_tv_option
[05:49:50] ============ [PASSED] drm_test_cmdline_invalid =============
[05:49:50] =============== drm_test_cmdline_tv_options ===============
[05:49:50] [PASSED] NTSC
[05:49:50] [PASSED] NTSC_443
[05:49:50] [PASSED] NTSC_J
[05:49:50] [PASSED] PAL
[05:49:50] [PASSED] PAL_M
[05:49:50] [PASSED] PAL_N
[05:49:50] [PASSED] SECAM
[05:49:50] [PASSED] MONO_525
[05:49:50] [PASSED] MONO_625
[05:49:50] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:49:50] =============== [PASSED] drm_cmdline_parser ================
[05:49:50] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:49:50] [PASSED] drm_test_connector_hdmi_init_valid
[05:49:50] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:49:50] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:49:50] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:49:50] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:49:50] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:49:50] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:49:50] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:49:50] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:49:50] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:49:50] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:49:50] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:49:50] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:49:50] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:49:50] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:49:50] [PASSED] drm_test_connector_hdmi_init_null_product
[05:49:50] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:49:50] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:49:50] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:49:50] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:49:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:49:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:49:50] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:49:50] ========= drm_test_connector_hdmi_init_type_valid =========
[05:49:50] [PASSED] HDMI-A
[05:49:50] [PASSED] HDMI-B
[05:49:50] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:49:50] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:49:50] [PASSED] Unknown
[05:49:50] [PASSED] VGA
[05:49:50] [PASSED] DVI-I
[05:49:50] [PASSED] DVI-D
[05:49:50] [PASSED] DVI-A
[05:49:50] [PASSED] Composite
[05:49:50] [PASSED] SVIDEO
[05:49:50] [PASSED] LVDS
[05:49:50] [PASSED] Component
[05:49:50] [PASSED] DIN
[05:49:50] [PASSED] DP
[05:49:50] [PASSED] TV
[05:49:50] [PASSED] eDP
[05:49:50] [PASSED] Virtual
[05:49:50] [PASSED] DSI
[05:49:50] [PASSED] DPI
[05:49:50] [PASSED] Writeback
[05:49:50] [PASSED] SPI
[05:49:50] [PASSED] USB
[05:49:50] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:49:50] ============ [PASSED] drmm_connector_hdmi_init =============
[05:49:50] ============= drmm_connector_init (3 subtests) =============
[05:49:50] [PASSED] drm_test_drmm_connector_init
[05:49:50] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:49:50] ========= drm_test_drmm_connector_init_type_valid =========
[05:49:50] [PASSED] Unknown
[05:49:50] [PASSED] VGA
[05:49:50] [PASSED] DVI-I
[05:49:50] [PASSED] DVI-D
[05:49:50] [PASSED] DVI-A
[05:49:50] [PASSED] Composite
[05:49:50] [PASSED] SVIDEO
[05:49:50] [PASSED] LVDS
[05:49:50] [PASSED] Component
[05:49:50] [PASSED] DIN
[05:49:50] [PASSED] DP
[05:49:50] [PASSED] HDMI-A
[05:49:50] [PASSED] HDMI-B
[05:49:50] [PASSED] TV
[05:49:50] [PASSED] eDP
[05:49:50] [PASSED] Virtual
[05:49:50] [PASSED] DSI
[05:49:50] [PASSED] DPI
[05:49:50] [PASSED] Writeback
[05:49:50] [PASSED] SPI
[05:49:50] [PASSED] USB
[05:49:50] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:49:50] =============== [PASSED] drmm_connector_init ===============
[05:49:50] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_init
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:49:50] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:49:50] [PASSED] Unknown
[05:49:50] [PASSED] VGA
[05:49:50] [PASSED] DVI-I
[05:49:50] [PASSED] DVI-D
[05:49:50] [PASSED] DVI-A
[05:49:50] [PASSED] Composite
[05:49:50] [PASSED] SVIDEO
[05:49:50] [PASSED] LVDS
[05:49:50] [PASSED] Component
[05:49:50] [PASSED] DIN
[05:49:50] [PASSED] DP
[05:49:50] [PASSED] HDMI-A
[05:49:50] [PASSED] HDMI-B
[05:49:50] [PASSED] TV
[05:49:50] [PASSED] eDP
[05:49:50] [PASSED] Virtual
[05:49:50] [PASSED] DSI
[05:49:50] [PASSED] DPI
[05:49:50] [PASSED] Writeback
[05:49:50] [PASSED] SPI
[05:49:50] [PASSED] USB
[05:49:50] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:49:50] ======== drm_test_drm_connector_dynamic_init_name =========
[05:49:50] [PASSED] Unknown
[05:49:50] [PASSED] VGA
[05:49:50] [PASSED] DVI-I
[05:49:50] [PASSED] DVI-D
[05:49:50] [PASSED] DVI-A
[05:49:50] [PASSED] Composite
[05:49:50] [PASSED] SVIDEO
[05:49:50] [PASSED] LVDS
[05:49:50] [PASSED] Component
[05:49:50] [PASSED] DIN
[05:49:50] [PASSED] DP
[05:49:50] [PASSED] HDMI-A
[05:49:50] [PASSED] HDMI-B
[05:49:50] [PASSED] TV
[05:49:50] [PASSED] eDP
[05:49:50] [PASSED] Virtual
[05:49:50] [PASSED] DSI
[05:49:50] [PASSED] DPI
[05:49:50] [PASSED] Writeback
[05:49:50] [PASSED] SPI
[05:49:50] [PASSED] USB
[05:49:50] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:49:50] =========== [PASSED] drm_connector_dynamic_init ============
[05:49:50] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:49:50] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:49:50] ======= drm_connector_dynamic_register (7 subtests) ========
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:49:50] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:49:50] ========= [PASSED] drm_connector_dynamic_register ==========
[05:49:50] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:49:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:49:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:49:50] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:49:50] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:49:50] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:49:50] [PASSED] NTSC
[05:49:50] [PASSED] NTSC-443
[05:49:50] [PASSED] NTSC-J
[05:49:50] [PASSED] PAL
[05:49:50] [PASSED] PAL-M
[05:49:50] [PASSED] PAL-N
[05:49:50] [PASSED] SECAM
[05:49:50] [PASSED] Mono
[05:49:50] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:49:50] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:49:50] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:49:50] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:49:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:49:50] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:49:50] [PASSED] VIC 96
[05:49:50] [PASSED] VIC 97
[05:49:50] [PASSED] VIC 101
[05:49:50] [PASSED] VIC 102
[05:49:50] [PASSED] VIC 106
[05:49:50] [PASSED] VIC 107
[05:49:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:49:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:49:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:49:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:49:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:49:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:49:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:49:50] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:49:50] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:49:50] [PASSED] Automatic
[05:49:50] [PASSED] Full
[05:49:50] [PASSED] Limited 16:235
[05:49:50] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:49:50] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:49:50] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:49:50] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:49:50] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:49:50] [PASSED] RGB
[05:49:50] [PASSED] YUV 4:2:0
[05:49:50] [PASSED] YUV 4:2:2
[05:49:50] [PASSED] YUV 4:4:4
[05:49:50] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:49:50] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:49:50] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:49:50] ============= drm_damage_helper (21 subtests) ==============
[05:49:50] [PASSED] drm_test_damage_iter_no_damage
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:49:50] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:49:50] [PASSED] drm_test_damage_iter_simple_damage
[05:49:50] [PASSED] drm_test_damage_iter_single_damage
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:49:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:49:50] [PASSED] drm_test_damage_iter_damage
[05:49:50] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:49:50] [PASSED] drm_test_damage_iter_damage_one_outside
[05:49:50] [PASSED] drm_test_damage_iter_damage_src_moved
[05:49:50] [PASSED] drm_test_damage_iter_damage_not_visible
[05:49:50] ================ [PASSED] drm_damage_helper ================
[05:49:50] ============== drm_dp_mst_helper (3 subtests) ==============
[05:49:50] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:49:50] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:49:50] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:49:50] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:49:50] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:49:50] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:49:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:49:50] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:49:50] [PASSED] Link rate 2000000 lane count 4
[05:49:50] [PASSED] Link rate 2000000 lane count 2
[05:49:50] [PASSED] Link rate 2000000 lane count 1
[05:49:50] [PASSED] Link rate 1350000 lane count 4
[05:49:50] [PASSED] Link rate 1350000 lane count 2
[05:49:50] [PASSED] Link rate 1350000 lane count 1
[05:49:50] [PASSED] Link rate 1000000 lane count 4
[05:49:50] [PASSED] Link rate 1000000 lane count 2
[05:49:50] [PASSED] Link rate 1000000 lane count 1
[05:49:50] [PASSED] Link rate 810000 lane count 4
[05:49:50] [PASSED] Link rate 810000 lane count 2
[05:49:50] [PASSED] Link rate 810000 lane count 1
[05:49:50] [PASSED] Link rate 540000 lane count 4
[05:49:50] [PASSED] Link rate 540000 lane count 2
[05:49:50] [PASSED] Link rate 540000 lane count 1
[05:49:50] [PASSED] Link rate 270000 lane count 4
[05:49:50] [PASSED] Link rate 270000 lane count 2
[05:49:50] [PASSED] Link rate 270000 lane count 1
[05:49:50] [PASSED] Link rate 162000 lane count 4
[05:49:50] [PASSED] Link rate 162000 lane count 2
[05:49:50] [PASSED] Link rate 162000 lane count 1
[05:49:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:49:50] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:49:50] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:49:50] [PASSED] DP_POWER_UP_PHY with port number
[05:49:50] [PASSED] DP_POWER_DOWN_PHY with port number
[05:49:50] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:49:50] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:49:50] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:49:50] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:49:50] [PASSED] DP_QUERY_PAYLOAD with port number
[05:49:50] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:49:50] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:49:50] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:49:50] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:49:50] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:49:50] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:49:50] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:49:50] [PASSED] DP_REMOTE_I2C_READ with port number
[05:49:50] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:49:50] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:49:50] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:49:50] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:49:50] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:49:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:49:50] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:49:50] ================ [PASSED] drm_dp_mst_helper ================
[05:49:50] ================== drm_exec (7 subtests) ===================
[05:49:50] [PASSED] sanitycheck
[05:49:50] [PASSED] test_lock
[05:49:50] [PASSED] test_lock_unlock
[05:49:50] [PASSED] test_duplicates
[05:49:50] [PASSED] test_prepare
[05:49:50] [PASSED] test_prepare_array
[05:49:50] [PASSED] test_multiple_loops
[05:49:50] ==================== [PASSED] drm_exec =====================
[05:49:50] =========== drm_format_helper_test (17 subtests) ===========
[05:49:50] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:49:50] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:49:50] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:49:50] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:49:50] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:49:50] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:49:50] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:49:50] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:49:50] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:49:50] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:49:50] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:49:50] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:49:50] ==================== drm_test_fb_swab =====================
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ================ [PASSED] drm_test_fb_swab =================
[05:49:50] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:49:50] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:49:50] [PASSED] single_pixel_source_buffer
[05:49:50] [PASSED] single_pixel_clip_rectangle
[05:49:50] [PASSED] well_known_colors
[05:49:50] [PASSED] destination_pitch
[05:49:50] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:49:50] ================= drm_test_fb_clip_offset =================
[05:49:50] [PASSED] pass through
[05:49:50] [PASSED] horizontal offset
[05:49:50] [PASSED] vertical offset
[05:49:50] [PASSED] horizontal and vertical offset
[05:49:50] [PASSED] horizontal offset (custom pitch)
[05:49:50] [PASSED] vertical offset (custom pitch)
[05:49:50] [PASSED] horizontal and vertical offset (custom pitch)
[05:49:50] ============= [PASSED] drm_test_fb_clip_offset =============
[05:49:50] =================== drm_test_fb_memcpy ====================
[05:49:50] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:49:50] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:49:50] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:49:50] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:49:50] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:49:50] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:49:50] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:49:50] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:49:50] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:49:50] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:49:50] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:49:50] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:49:50] =============== [PASSED] drm_test_fb_memcpy ================
[05:49:50] ============= [PASSED] drm_format_helper_test ==============
[05:49:50] ================= drm_format (18 subtests) =================
[05:49:50] [PASSED] drm_test_format_block_width_invalid
[05:49:50] [PASSED] drm_test_format_block_width_one_plane
[05:49:50] [PASSED] drm_test_format_block_width_two_plane
[05:49:50] [PASSED] drm_test_format_block_width_three_plane
[05:49:50] [PASSED] drm_test_format_block_width_tiled
[05:49:50] [PASSED] drm_test_format_block_height_invalid
[05:49:50] [PASSED] drm_test_format_block_height_one_plane
[05:49:50] [PASSED] drm_test_format_block_height_two_plane
[05:49:50] [PASSED] drm_test_format_block_height_three_plane
[05:49:50] [PASSED] drm_test_format_block_height_tiled
[05:49:50] [PASSED] drm_test_format_min_pitch_invalid
[05:49:50] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:49:50] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:49:50] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:49:50] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:49:50] [PASSED] drm_test_format_min_pitch_two_plane
[05:49:50] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:49:50] [PASSED] drm_test_format_min_pitch_tiled
[05:49:50] =================== [PASSED] drm_format ====================
[05:49:50] ============== drm_framebuffer (10 subtests) ===============
[05:49:50] ========== drm_test_framebuffer_check_src_coords ==========
[05:49:50] [PASSED] Success: source fits into fb
[05:49:50] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:49:50] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:49:50] [PASSED] Fail: overflowing fb with source width
[05:49:50] [PASSED] Fail: overflowing fb with source height
[05:49:50] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:49:50] [PASSED] drm_test_framebuffer_cleanup
[05:49:50] =============== drm_test_framebuffer_create ===============
[05:49:50] [PASSED] ABGR8888 normal sizes
[05:49:50] [PASSED] ABGR8888 max sizes
[05:49:50] [PASSED] ABGR8888 pitch greater than min required
[05:49:50] [PASSED] ABGR8888 pitch less than min required
[05:49:50] [PASSED] ABGR8888 Invalid width
[05:49:50] [PASSED] ABGR8888 Invalid buffer handle
[05:49:50] [PASSED] No pixel format
[05:49:50] [PASSED] ABGR8888 Width 0
[05:49:50] [PASSED] ABGR8888 Height 0
[05:49:50] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:49:50] [PASSED] ABGR8888 Large buffer offset
[05:49:50] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:49:50] [PASSED] ABGR8888 Invalid flag
[05:49:50] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:49:50] [PASSED] ABGR8888 Valid buffer modifier
[05:49:50] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:49:50] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] NV12 Normal sizes
[05:49:50] [PASSED] NV12 Max sizes
[05:49:50] [PASSED] NV12 Invalid pitch
[05:49:50] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:49:50] [PASSED] NV12 different modifier per-plane
[05:49:50] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:49:50] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] NV12 Modifier for inexistent plane
[05:49:50] [PASSED] NV12 Handle for inexistent plane
[05:49:50] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:49:50] [PASSED] YVU420 Normal sizes
[05:49:50] [PASSED] YVU420 Max sizes
[05:49:50] [PASSED] YVU420 Invalid pitch
[05:49:50] [PASSED] YVU420 Different pitches
[05:49:50] [PASSED] YVU420 Different buffer offsets/pitches
[05:49:50] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:49:50] [PASSED] YVU420 Valid modifier
[05:49:50] [PASSED] YVU420 Different modifiers per plane
[05:49:50] [PASSED] YVU420 Modifier for inexistent plane
[05:49:50] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:49:50] [PASSED] X0L2 Normal sizes
[05:49:50] [PASSED] X0L2 Max sizes
[05:49:50] [PASSED] X0L2 Invalid pitch
[05:49:50] [PASSED] X0L2 Pitch greater than minimum required
[05:49:50] [PASSED] X0L2 Handle for inexistent plane
[05:49:50] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:49:50] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:49:50] [PASSED] X0L2 Valid modifier
[05:49:50] [PASSED] X0L2 Modifier for inexistent plane
[05:49:50] =========== [PASSED] drm_test_framebuffer_create ===========
[05:49:50] [PASSED] drm_test_framebuffer_free
[05:49:50] [PASSED] drm_test_framebuffer_init
[05:49:50] [PASSED] drm_test_framebuffer_init_bad_format
[05:49:50] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:49:50] [PASSED] drm_test_framebuffer_lookup
[05:49:50] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:49:50] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:49:50] ================= [PASSED] drm_framebuffer =================
[05:49:50] ================ drm_gem_shmem (8 subtests) ================
[05:49:50] [PASSED] drm_gem_shmem_test_obj_create
[05:49:50] [PASSED] drm_gem_shmem_test_obj_create_private
[05:49:50] [PASSED] drm_gem_shmem_test_pin_pages
[05:49:50] [PASSED] drm_gem_shmem_test_vmap
[05:49:50] [PASSED] drm_gem_shmem_test_get_sg_table
[05:49:50] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:49:50] [PASSED] drm_gem_shmem_test_madvise
[05:49:50] [PASSED] drm_gem_shmem_test_purge
[05:49:50] ================== [PASSED] drm_gem_shmem ==================
[05:49:50] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:49:50] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:49:50] [PASSED] Automatic
[05:49:50] [PASSED] Full
[05:49:50] [PASSED] Limited 16:235
[05:49:50] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:49:50] [PASSED] drm_test_check_disable_connector
[05:49:50] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:49:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:49:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:49:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:49:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:49:50] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:49:50] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:49:50] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:49:50] [PASSED] drm_test_check_output_bpc_dvi
[05:49:50] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:49:50] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:49:50] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:49:50] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:49:50] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:49:50] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:49:50] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:49:50] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:49:50] ============ drm_test_check_hdmi_color_format =============
[05:49:50] [PASSED] AUTO -> RGB
[05:49:50] [PASSED] YCBCR422 -> YUV422
[05:49:50] [PASSED] YCBCR420 -> YUV420
[05:49:50] [PASSED] YCBCR444 -> YUV444
[05:49:50] [PASSED] RGB -> RGB
[05:49:50] ======== [PASSED] drm_test_check_hdmi_color_format =========
[05:49:50] ======== drm_test_check_hdmi_color_format_420_only ========
[05:49:50] [PASSED] RGB should fail
[05:49:50] [PASSED] YUV444 should fail
[05:49:50] [PASSED] YUV422 should fail
[05:49:50] [PASSED] YUV420 should work
[05:49:50] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[05:49:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:49:50] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:49:50] [PASSED] drm_test_check_broadcast_rgb_value
[05:49:50] [PASSED] drm_test_check_bpc_8_value
[05:49:50] [PASSED] drm_test_check_bpc_10_value
[05:49:50] [PASSED] drm_test_check_bpc_12_value
[05:49:50] [PASSED] drm_test_check_format_value
[05:49:50] [PASSED] drm_test_check_tmds_char_value
[05:49:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:49:50] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[05:49:50] [PASSED] drm_test_check_mode_valid
[05:49:50] [PASSED] drm_test_check_mode_valid_reject
[05:49:50] [PASSED] drm_test_check_mode_valid_reject_rate
[05:49:50] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:49:50] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[05:49:50] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[05:49:50] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[05:49:50] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:49:50] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:49:50] [PASSED] drm_test_check_infoframes
[05:49:50] [PASSED] drm_test_check_reject_avi_infoframe
[05:49:50] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:49:50] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:49:50] [PASSED] drm_test_check_reject_audio_infoframe
[05:49:50] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:49:50] ================= drm_managed (2 subtests) =================
[05:49:50] [PASSED] drm_test_managed_release_action
[05:49:50] [PASSED] drm_test_managed_run_action
[05:49:50] =================== [PASSED] drm_managed ===================
[05:49:50] =================== drm_mm (6 subtests) ====================
[05:49:50] [PASSED] drm_test_mm_init
[05:49:50] [PASSED] drm_test_mm_debug
[05:49:50] [PASSED] drm_test_mm_align32
[05:49:50] [PASSED] drm_test_mm_align64
[05:49:50] [PASSED] drm_test_mm_lowest
[05:49:50] [PASSED] drm_test_mm_highest
[05:49:50] ===================== [PASSED] drm_mm ======================
[05:49:50] ============= drm_modes_analog_tv (5 subtests) =============
[05:49:50] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:49:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:49:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:49:50] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:49:50] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:49:50] =============== [PASSED] drm_modes_analog_tv ===============
[05:49:50] ============== drm_plane_helper (2 subtests) ===============
[05:49:50] =============== drm_test_check_plane_state ================
[05:49:50] [PASSED] clipping_simple
[05:49:50] [PASSED] clipping_rotate_reflect
[05:49:50] [PASSED] positioning_simple
[05:49:50] [PASSED] upscaling
[05:49:50] [PASSED] downscaling
[05:49:50] [PASSED] rounding1
[05:49:50] [PASSED] rounding2
[05:49:50] [PASSED] rounding3
[05:49:50] [PASSED] rounding4
[05:49:50] =========== [PASSED] drm_test_check_plane_state ============
[05:49:50] =========== drm_test_check_invalid_plane_state ============
[05:49:50] [PASSED] positioning_invalid
[05:49:50] [PASSED] upscaling_invalid
[05:49:50] [PASSED] downscaling_invalid
[05:49:50] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:49:50] ================ [PASSED] drm_plane_helper =================
[05:49:50] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:49:50] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:49:50] [PASSED] None
[05:49:50] [PASSED] PAL
[05:49:50] [PASSED] NTSC
[05:49:50] [PASSED] Both, NTSC Default
[05:49:50] [PASSED] Both, PAL Default
[05:49:50] [PASSED] Both, NTSC Default, with PAL on command-line
[05:49:50] [PASSED] Both, PAL Default, with NTSC on command-line
[05:49:50] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:49:50] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:49:50] ================== drm_rect (9 subtests) ===================
[05:49:50] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:49:50] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:49:50] [PASSED] drm_test_rect_clip_scaled_clipped
[05:49:50] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:49:50] ================= drm_test_rect_intersect =================
[05:49:50] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:49:50] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:49:50] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:49:50] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:49:50] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:49:50] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:49:50] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:49:50] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:49:50] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:49:50] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:49:50] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:49:50] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:49:50] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:49:50] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:49:50] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:49:50] ============= [PASSED] drm_test_rect_intersect =============
[05:49:50] ================ drm_test_rect_calc_hscale ================
[05:49:50] [PASSED] normal use
[05:49:50] [PASSED] out of max range
[05:49:50] [PASSED] out of min range
[05:49:50] [PASSED] zero dst
[05:49:50] [PASSED] negative src
[05:49:50] [PASSED] negative dst
[05:49:50] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:49:50] ================ drm_test_rect_calc_vscale ================
[05:49:50] [PASSED] normal use
[05:49:50] [PASSED] out of max range
[05:49:50] [PASSED] out of min range
[05:49:50] [PASSED] zero dst
[05:49:50] [PASSED] negative src
[05:49:50] [PASSED] negative dst
[05:49:50] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:49:50] ================== drm_test_rect_rotate ===================
[05:49:50] [PASSED] reflect-x
[05:49:50] [PASSED] reflect-y
[05:49:50] [PASSED] rotate-0
[05:49:50] [PASSED] rotate-90
[05:49:50] [PASSED] rotate-180
[05:49:50] [PASSED] rotate-270
[05:49:50] ============== [PASSED] drm_test_rect_rotate ===============
[05:49:50] ================ drm_test_rect_rotate_inv =================
[05:49:50] [PASSED] reflect-x
[05:49:50] [PASSED] reflect-y
[05:49:50] [PASSED] rotate-0
[05:49:50] [PASSED] rotate-90
[05:49:50] [PASSED] rotate-180
[05:49:50] [PASSED] rotate-270
[05:49:50] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:49:50] ==================== [PASSED] drm_rect =====================
[05:49:50] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:49:50] ============ drm_test_sysfb_build_fourcc_list =============
[05:49:50] [PASSED] no native formats
[05:49:50] [PASSED] XRGB8888 as native format
[05:49:50] [PASSED] remove duplicates
[05:49:50] [PASSED] convert alpha formats
[05:49:50] [PASSED] random formats
[05:49:50] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:49:50] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:49:50] ================== drm_fixp (2 subtests) ===================
[05:49:50] [PASSED] drm_test_int2fixp
[05:49:50] [PASSED] drm_test_sm2fixp
[05:49:50] ==================== [PASSED] drm_fixp =====================
[05:49:50] ============================================================
[05:49:50] Testing complete. Ran 639 tests: passed: 639
[05:49:50] Elapsed time: 26.685s total, 1.799s configuring, 24.717s building, 0.147s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:49:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:49:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:50:01] Starting KUnit Kernel (1/1)...
[05:50:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:50:01] ================= ttm_device (5 subtests) ==================
[05:50:01] [PASSED] ttm_device_init_basic
[05:50:01] [PASSED] ttm_device_init_multiple
[05:50:01] [PASSED] ttm_device_fini_basic
[05:50:01] [PASSED] ttm_device_init_no_vma_man
[05:50:01] ================== ttm_device_init_pools ==================
[05:50:01] [PASSED] No DMA allocations, no DMA32 required
[05:50:01] [PASSED] DMA allocations, DMA32 required
[05:50:01] [PASSED] No DMA allocations, DMA32 required
[05:50:01] [PASSED] DMA allocations, no DMA32 required
[05:50:01] ============== [PASSED] ttm_device_init_pools ==============
[05:50:01] =================== [PASSED] ttm_device ====================
[05:50:01] ================== ttm_pool (8 subtests) ===================
[05:50:01] ================== ttm_pool_alloc_basic ===================
[05:50:01] [PASSED] One page
[05:50:01] [PASSED] More than one page
[05:50:01] [PASSED] Above the allocation limit
[05:50:01] [PASSED] One page, with coherent DMA mappings enabled
[05:50:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:50:01] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:50:01] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:50:01] [PASSED] One page
[05:50:01] [PASSED] More than one page
[05:50:01] [PASSED] Above the allocation limit
[05:50:01] [PASSED] One page, with coherent DMA mappings enabled
[05:50:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:50:01] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:50:01] [PASSED] ttm_pool_alloc_order_caching_match
[05:50:01] [PASSED] ttm_pool_alloc_caching_mismatch
[05:50:01] [PASSED] ttm_pool_alloc_order_mismatch
[05:50:01] [PASSED] ttm_pool_free_dma_alloc
[05:50:01] [PASSED] ttm_pool_free_no_dma_alloc
[05:50:01] [PASSED] ttm_pool_fini_basic
[05:50:01] ==================== [PASSED] ttm_pool =====================
[05:50:01] ================ ttm_resource (8 subtests) =================
[05:50:01] ================= ttm_resource_init_basic =================
[05:50:01] [PASSED] Init resource in TTM_PL_SYSTEM
[05:50:01] [PASSED] Init resource in TTM_PL_VRAM
[05:50:01] [PASSED] Init resource in a private placement
[05:50:01] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:50:01] ============= [PASSED] ttm_resource_init_basic =============
[05:50:01] [PASSED] ttm_resource_init_pinned
[05:50:01] [PASSED] ttm_resource_fini_basic
[05:50:01] [PASSED] ttm_resource_manager_init_basic
[05:50:01] [PASSED] ttm_resource_manager_usage_basic
[05:50:01] [PASSED] ttm_resource_manager_set_used_basic
[05:50:01] [PASSED] ttm_sys_man_alloc_basic
[05:50:01] [PASSED] ttm_sys_man_free_basic
[05:50:01] ================== [PASSED] ttm_resource ===================
[05:50:01] =================== ttm_tt (15 subtests) ===================
[05:50:01] ==================== ttm_tt_init_basic ====================
[05:50:01] [PASSED] Page-aligned size
[05:50:01] [PASSED] Extra pages requested
[05:50:01] ================ [PASSED] ttm_tt_init_basic ================
[05:50:01] [PASSED] ttm_tt_init_misaligned
[05:50:01] [PASSED] ttm_tt_fini_basic
[05:50:01] [PASSED] ttm_tt_fini_sg
[05:50:01] [PASSED] ttm_tt_fini_shmem
[05:50:01] [PASSED] ttm_tt_create_basic
[05:50:01] [PASSED] ttm_tt_create_invalid_bo_type
[05:50:01] [PASSED] ttm_tt_create_ttm_exists
[05:50:01] [PASSED] ttm_tt_create_failed
[05:50:01] [PASSED] ttm_tt_destroy_basic
[05:50:01] [PASSED] ttm_tt_populate_null_ttm
[05:50:01] [PASSED] ttm_tt_populate_populated_ttm
[05:50:01] [PASSED] ttm_tt_unpopulate_basic
[05:50:01] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:50:01] [PASSED] ttm_tt_swapin_basic
[05:50:01] ===================== [PASSED] ttm_tt ======================
[05:50:01] =================== ttm_bo (14 subtests) ===================
[05:50:01] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:50:01] [PASSED] Cannot be interrupted and sleeps
[05:50:01] [PASSED] Cannot be interrupted, locks straight away
[05:50:01] [PASSED] Can be interrupted, sleeps
[05:50:01] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:50:01] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:50:01] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:50:02] [PASSED] ttm_bo_reserve_double_resv
[05:50:02] [PASSED] ttm_bo_reserve_interrupted
[05:50:02] [PASSED] ttm_bo_reserve_deadlock
[05:50:02] [PASSED] ttm_bo_unreserve_basic
[05:50:02] [PASSED] ttm_bo_unreserve_pinned
[05:50:02] [PASSED] ttm_bo_unreserve_bulk
[05:50:02] [PASSED] ttm_bo_fini_basic
[05:50:02] [PASSED] ttm_bo_fini_shared_resv
[05:50:02] [PASSED] ttm_bo_pin_basic
[05:50:02] [PASSED] ttm_bo_pin_unpin_resource
[05:50:02] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:50:02] ===================== [PASSED] ttm_bo ======================
[05:50:02] ============== ttm_bo_validate (22 subtests) ===============
[05:50:02] ============== ttm_bo_init_reserved_sys_man ===============
[05:50:02] [PASSED] Buffer object for userspace
[05:50:02] [PASSED] Kernel buffer object
[05:50:02] [PASSED] Shared buffer object
[05:50:02] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:50:02] ============== ttm_bo_init_reserved_mock_man ==============
[05:50:02] [PASSED] Buffer object for userspace
[05:50:02] [PASSED] Kernel buffer object
[05:50:02] [PASSED] Shared buffer object
[05:50:02] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:50:02] [PASSED] ttm_bo_init_reserved_resv
[05:50:02] ================== ttm_bo_validate_basic ==================
[05:50:02] [PASSED] Buffer object for userspace
[05:50:02] [PASSED] Kernel buffer object
[05:50:02] [PASSED] Shared buffer object
[05:50:02] ============== [PASSED] ttm_bo_validate_basic ==============
[05:50:02] [PASSED] ttm_bo_validate_invalid_placement
[05:50:02] ============= ttm_bo_validate_same_placement ==============
[05:50:02] [PASSED] System manager
[05:50:02] [PASSED] VRAM manager
[05:50:02] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:50:02] [PASSED] ttm_bo_validate_failed_alloc
[05:50:02] [PASSED] ttm_bo_validate_pinned
[05:50:02] [PASSED] ttm_bo_validate_busy_placement
[05:50:02] ================ ttm_bo_validate_multihop =================
[05:50:02] [PASSED] Buffer object for userspace
[05:50:02] [PASSED] Kernel buffer object
[05:50:02] [PASSED] Shared buffer object
[05:50:02] ============ [PASSED] ttm_bo_validate_multihop =============
[05:50:02] ========== ttm_bo_validate_no_placement_signaled ==========
[05:50:02] [PASSED] Buffer object in system domain, no page vector
[05:50:02] [PASSED] Buffer object in system domain with an existing page vector
[05:50:02] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:50:02] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:50:02] [PASSED] Buffer object for userspace
[05:50:02] [PASSED] Kernel buffer object
[05:50:02] [PASSED] Shared buffer object
[05:50:02] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:50:02] [PASSED] ttm_bo_validate_move_fence_signaled
[05:50:02] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:50:02] [PASSED] Waits for GPU
[05:50:02] [PASSED] Tries to lock straight away
[05:50:02] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:50:02] [PASSED] ttm_bo_validate_swapout
[05:50:02] [PASSED] ttm_bo_validate_happy_evict
[05:50:02] [PASSED] ttm_bo_validate_all_pinned_evict
[05:50:02] [PASSED] ttm_bo_validate_allowed_only_evict
[05:50:02] [PASSED] ttm_bo_validate_deleted_evict
[05:50:02] [PASSED] ttm_bo_validate_busy_domain_evict
[05:50:02] [PASSED] ttm_bo_validate_evict_gutting
[05:50:02] [PASSED] ttm_bo_validate_recrusive_evict
[05:50:02] ================= [PASSED] ttm_bo_validate =================
[05:50:02] ============================================================
[05:50:02] Testing complete. Ran 102 tests: passed: 102
[05:50:02] Elapsed time: 11.874s total, 1.801s configuring, 9.858s building, 0.181s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support
2026-07-13 5:15 ` [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
@ 2026-07-13 5:55 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:55 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
New issues:
- [Medium] Hardware state for YUV range correction is incorrectly restricted to SDR planes when a color pipeline is active, preventing HDR planes from bypassing range correction.
- [Low] The new YUV range correction color block (INTEL_PLANE_CB_YUV_RANGE_CORRECT) is never added to any plane's color pipeline, making the feature unreachable.
Pre-existing issues:
- [High] Error paths in colorop initialization lead to a kernel panic because they unconditionally clean up partially initialized colorop objects.
- [High] Missing `drm_mode_object_unregister()` in the colorop teardown sequence leaks modeset IDR identifiers, resulting in a Use-After-Free.
--
--- Patch [7]: [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support ---
commit 0f5fc4ef9d6c7498eb8e7e7dcd0a849594fe9377
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Subject: drm/i915/color: Add YCbCr limited-to-full range color block support
This patch adds support for a color block that performs YCbCr limited-to-full
range expansion in the plane color pipeline. It represents this new color
block using the DRM_COLOROP_FIXED_MATRIX colorop.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -108,6 +108,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
> intel_plane_supported_csc_ff,
> DRM_COLOROP_FLAG_ALLOW_BYPASS);
> break;
> + case INTEL_PLANE_CB_YUV_RANGE_CORRECT:
> + ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
> + &intel_colorop_funcs,
> + BIT(DRM_COLOROP_FM_YCBCR_LIMITED_FULL),
> + DRM_COLOROP_FLAG_ALLOW_BYPASS);
> + break;
[Severity: Low]
Is this new color block missing from the pipeline definition arrays?
It appears INTEL_PLANE_CB_YUV_RANGE_CORRECT is defined and its configuration
is implemented, but it is never added to the static pipeline definition arrays
like sdr_plane_pipeline.
Without being appended to the arrays that dictate pipeline construction, does
this feature remain uninstantiated and unreachable by userspace?
[Severity: High]
This isn't a bug introduced by this patch, but can the error path here lead to
a kernel panic?
If drm_plane_colorop_fixed_matrix_init() fails, colorop->dev remains
uninitialized. The error path jumps to the cleanup label and calls
intel_colorop_destroy(), which then calls drm_colorop_cleanup():
drm_colorop_cleanup()
struct drm_device *dev = colorop->dev;
struct drm_mode_config *config = &dev->mode_config;
list_del(&colorop->head);
Since dev is NULL, will this blindly dereference a zero-initialized structure
and oops on the driver probe error path?
[Severity: High]
This is a pre-existing issue, but does the colorop teardown sequence leak
modeset IDR identifiers and cause a Use-After-Free?
When drm_plane_colorop_init() is called, it generates an ID for the
colorop->base pointer via drm_mode_object_add().
During teardown, drm_colorop_cleanup() is called but it omits the
drm_mode_object_unregister() call. Then, intel_colorop_destroy() frees the
memory:
intel_colorop_destroy()
drm_colorop_cleanup(colorop);
kfree(to_intel_colorop(colorop));
Does this leave a dangling pointer in the modeset IDR, where a subsequent
userspace lookup of the object ID would fetch and use freed memory?
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1296,6 +1296,8 @@ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_s
> } else if (!icl_is_hdr_plane(display, plane->id)) {
> if (plane_state->hw.csc_ff_enable)
> ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
> + if (plane_state->hw.yuv_range_correction_disable)
> + ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> }
>
> return ctl;
[Severity: Medium]
Does this restrict the YUV range correction bypass to SDR planes only?
The new check for hw.yuv_range_correction_disable is placed strictly inside
the else if (!icl_is_hdr_plane()) block. This seems to force range correction
on for HDR planes when a color pipeline is active, bypassing the disable flag
completely.
Should this check be moved outside the SDR-only restriction to match the legacy
path which correctly applies the bypass to both?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=7
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline
2026-07-13 5:15 ` [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
@ 2026-07-13 5:55 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:55 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [High] Activating a color pipeline on an HDR plane silently disables the hardware Input CSC block, completely breaking YUV framebuffers.
Pre-existing issues:
- [High] NULL pointer dereference in the error cleanup path of `intel_color_pipeline_plane_add_colorop()` when colorop initialization fails.
--
--- Patch [8]: [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline ---
commit 596a494a01ab45eb529185d68401cfd391408e46
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/color: Add YUV range correction to SDR plane pipeline
This commit inserts the INTEL_PLANE_CB_YUV_RANGE_CORRECT color block into
the SDR plane color pipeline. This enables YCbCr limited-to-full range
expansion ahead of the CSC block that expects full range pixel data.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 7d25f4fbfa9b7..7457fa51cb97a 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -44,6 +44,7 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
> };
>
> static const enum intel_color_block sdr_plane_pipeline[] = {
> + INTEL_PLANE_CB_YUV_RANGE_CORRECT,
[Severity: High]
Does adding this color pipeline block expose a regression with HDR planes?
When activating a color pipeline on an HDR plane, the hardware Input CSC
block appears to be disabled, breaking YUV framebuffers.
Looking at glk_plane_color_ctl_input_csc() in skl_universal_plane.c:
} else if (!icl_is_hdr_plane(display, plane->id)) {
if (plane_state->hw.csc_ff_enable)
ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
if (plane_state->hw.yuv_range_correction_disable)
ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
}
return ctl;
If a color pipeline is active, it skips the legacy block. For HDR planes,
icl_is_hdr_plane() evaluates to true, so this else-if block is skipped and
it returns 0 without setting the PLANE_COLOR_INPUT_CSC_ENABLE bit.
Will this cause visual corruption for YUV framebuffers on HDR planes when a
color pipeline is active, as raw non-linear YUV data would be passed
directly to the PRE_CSC_LUT?
[Severity: High]
This is a pre-existing issue, but can this lead to a NULL pointer
dereference in the error cleanup path?
If intel_color_pipeline_plane_add_colorop() in intel_color_pipeline.c
fails:
cleanup:
intel_colorop_destroy(&colorop->base);
return ERR_PTR(ret);
The colorop is allocated zero-initialized in intel_colorop_alloc():
colorop = kzalloc_obj(*colorop);
If the initialization fails before colorop->dev is set or the list head is
initialized, intel_colorop_destroy() unconditionally calls
drm_colorop_cleanup():
struct drm_device *dev = colorop->dev;
struct drm_mode_config *config = &dev->mode_config;
list_del(&colorop->head);
Could this dereference the NULL dev pointer and call list_del() on an
invalid list head?
> INTEL_PLANE_CB_CSC_FF,
> };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=8
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes
2026-07-13 5:15 ` [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
@ 2026-07-13 5:56 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:56 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] NULL pointer dereference and list corruption when tearing down a partially initialized colorop.
- [High] Missing `drm_mode_object_unregister()` in `drm_colorop_cleanup()` leaks IDR entries and causes Use-After-Free.
--
--- Patch [9]: [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes ---
commit 774f8cae80cb667cc0804c605f7a0135e70d21fa
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/color: Add support for 1D LUT in SDR planes
Extend the SDR plane color pipeline to include pre- and post-CSC
1D LUT blocks.
SDR planes use a smaller LUT size than HDR planes and therefore
initialize the 1D LUT colorops with the appropriate hardware
capacity.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 7457fa51cb97a..136b9378ca484 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
[ ... ]
> @@ -81,7 +86,9 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
> ret = drm_plane_colorop_curve_1d_lut_init(dev,
> &colorop->base, plane,
> &intel_colorop_funcs,
> - PLANE_DEGAMMA_SIZE,
> + is_hdr ?
> + PLANE_DEGAMMA_SIZE :
> + PLANE_DEGAMMA_SIZE_SDR,
> DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
> DRM_COLOROP_FLAG_ALLOW_BYPASS);
> break;
[Severity: High]
This is a pre-existing issue, but can the error path for this initialization
lead to a null pointer dereference?
If drm_plane_colorop_curve_1d_lut_init() fails early (for example, if memory
allocation in drm_mode_object_add() fails), colorop->dev remains null and the
object is never added to the list.
The error path in this function unconditionally goes to cleanup and calls
intel_colorop_destroy(), which eventually calls drm_colorop_cleanup():
drivers/gpu/drm/drm_colorop.c:drm_colorop_cleanup() {
struct drm_device *dev = colorop->dev;
struct drm_mode_config *config = &dev->mode_config;
list_del(&colorop->head);
...
}
Will this dereference the null colorop->dev and corrupt the list by calling
list_del() on an uninitialized list head?
[Severity: High]
This is another pre-existing issue, but does the cleanup path leave a dangling
pointer in the DRM mode object IDR?
If drm_plane_colorop_curve_1d_lut_init() successfully adds the colorop to the
device's mode object IDR via drm_mode_object_add(), but a subsequent property
creation fails (like drm_property_create_enum()), the cleanup path is
triggered.
The error path calls drm_colorop_cleanup() and subsequently frees the colorop
object. However, drm_colorop_cleanup() does not seem to call
drm_mode_object_unregister():
drivers/gpu/drm/drm_colorop.c:drm_colorop_cleanup() {
struct drm_device *dev = colorop->dev;
struct drm_mode_config *config = &dev->mode_config;
list_del(&colorop->head);
config->num_colorop--;
if (colorop->state)
drm_colorop_atomic_destroy_state(colorop, colorop->state);
}
Could this result in a use-after-free if the IDR continues to hold a pointer
to the freed memory?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=9
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 14/14] drm/i915/color: Add color pipeline support for SDR planes
2026-07-13 5:15 ` [CI v4 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
@ 2026-07-13 5:59 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:59 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] Missing NULL check for kasprintf() return value in _intel_color_pipeline_plane_init() leads to a deterministic NULL pointer dereference.
- [High] If a color operation initialization fails early, the cleanup path unconditionally calls drm_colorop_cleanup on a partially initialized object, triggering a NULL pointer dereference.
--
--- Patch [14]: [CI v4 14/14] drm/i915/color: Add color pipeline support for SDR planes ---
commit 6fb2b458fe3e54b8772eb125265bd378c4f8ec9e
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/color: Add color pipeline support for SDR planes
This commit exposes the SDR plane color pipeline to user-space by
removing the HDR plane restriction during initialization.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 136b9378ca484..a99b6eb204488 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -188,17 +188,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
>
> int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
> {
> - struct drm_device *dev = plane->dev;
> - struct intel_display *display = to_intel_display(dev);
> struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
> int len = 0;
> int ret = 0;
> int i;
>
> - /* Currently expose pipeline only for HDR planes */
> - if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
> - return 0;
> -
> /* Add pipeline consisting of transfer functions */
> ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
[Severity: High]
This is a pre-existing issue, but does _intel_color_pipeline_plane_init()
lack a check for kasprintf() allocation failures?
If memory allocation fails during plane initialization, kasprintf()
returns a NULL pointer:
_intel_color_pipeline_plane_init()
list->name = kasprintf(GFP_KERNEL, ...);
return 0;
The function then returns success (0) even though list->name is NULL.
This NULL pointer is propagated up through
drm_plane_create_color_pipeline_property(), and eventually passed to
drm_property_add_enum(), which does an unconditional strlen():
drm_property_add_enum()
if (WARN_ON(strlen(name) >= DRM_PROP_NAME_LEN))
Would it be safer to check for a NULL return from kasprintf() and return
an error code like -ENOMEM?
[Severity: High]
This is also a pre-existing issue, but if a colorop fails to initialize
during the pipeline plane setup, can it cause a NULL pointer dereference
during cleanup?
If an error occurs early in intel_color_pipeline_plane_add_colorop()
(for example, if drm_mode_object_add() fails to allocate an ID), the
cleanup path unconditionally invokes intel_colorop_destroy():
intel_color_pipeline_plane_add_colorop()
...
cleanup:
intel_colorop_destroy(&colorop->base);
This calls into drm_colorop_cleanup() with a partially initialized object
where colorop->dev is still NULL, leading to a dereference:
drm_colorop_cleanup()
struct drm_device *dev = colorop->dev;
struct drm_mode_config *config = &dev->mode_config;
...
list_del(&colorop->head);
Since colorop->dev is NULL, &dev->mode_config will trigger a dereference,
and list_del() will be called on a zeroed list_head. Could this error path
be reached if there is resource exhaustion during plane initialization?
> if (ret)
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=14
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state
2026-07-13 5:15 ` [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
@ 2026-07-13 5:59 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 5:59 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] The fixed-function CSC configuration (csc_ff_enable and csc_ff_type) and other color pipeline states (LUTs, CTMs) are lost on atomic commits that do not explicitly modify the colorop (e.g., page flips).
--
--- Patch [5]: [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state ---
commit d2e5633249bd5c0c74c6412da61ad42bd832980e
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/display: Track CSC mode in intel plane state
This commit adds CSC mode to hw plane state to enable programming the
fixed-function CSC block for SDR planes. It also tracks the bypass state
explicitly as a boolean since it is managed separately from the FIXED_MATRIX
enum value.
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
> index a440f92ff00cd..217c7a84bbfa5 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -430,11 +430,19 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
> while (iter_colorop) {
> for_each_new_colorop_in_state(&state->base, colorop, new_colorop_state, i) {
> if (new_colorop_state->colorop == iter_colorop) {
> intel_colorop = to_intel_colorop(colorop);
> + if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
> + plane_state->hw.csc_ff_enable =
> + !new_colorop_state->bypass;
[Severity: High]
This is a pre-existing issue, but does this loop fail to restore the hardware
state of colorops that are active but not modified in the current atomic
commit?
Since intel_plane_clear_hw_state() zeroes plane_state->hw before
intel_plane_color_copy_uapi_to_hw_state() is called, what happens on a simple
page flip that doesn't modify the color pipeline?
It looks like for_each_new_colorop_in_state() will only yield colorops that
were explicitly added to the atomic commit. Since a simple page flip does not
modify the color pipeline, the colorops wouldn't be in the atomic state and
the inner loop body wouldn't execute.
Could this cause the hardware state for unmodified colorops (including the newly
added csc_ff_enable and csc_ff_type) to remain zeroed out, resulting in the
loss of color correction or incorrect gamma during video playback or normal
desktop use?
> + plane_state->hw.csc_ff_type =
> + new_colorop_state->fixed_matrix_type;
> + } else {
> + blob = new_colorop_state->bypass ?
> + NULL : new_colorop_state->data;
> + changed |= intel_plane_colorop_replace_blob(plane_state,
> intel_colorop,
> blob);
> + }
> }
> }
> iter_colorop = iter_colorop->next;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=5
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline
2026-07-13 5:15 ` [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
@ 2026-07-13 6:01 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 6:01 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
New issues:
- [Medium] The newly added SDR plane color pipeline logic is completely unreachable due to an early return for non-HDR planes in the caller function.
- [Medium] The driver exposes the `CSC_FF` colorop but fails to extract and apply its atomic state, violating the DRM API contract.
Pre-existing issues:
- [Critical] `drm_colorop_cleanup()` fails to unregister the DRM mode object, leading to a Use-After-Free via stale object IDs.
- [High] `drm_colorop_cleanup` assumes `colorop->dev` and `colorop->head` are fully initialized, causing a NULL pointer dereference and crash on early initialization failures.
- [High] Unchecked return value from `kasprintf()` leads to a NULL pointer dereference during DRM property creation.
--
--- Patch [2]: [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline ---
commit ed94f2ef5daa2b6a1fe43a799710d164ac1323d4
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/color: Add CSC on SDR plane color pipeline
Add the fixed-function CSC block to color pipeline in SDR planes
as a DRM_COLOROP_FIXED_MATRIX colorop.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 6cf8080ee8000..2ef42a133a987 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
[ ... ]
> @@ -92,6 +102,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
> DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
> DRM_COLOROP_FLAG_ALLOW_BYPASS);
> break;
> + case INTEL_PLANE_CB_CSC_FF:
> + ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
> + &intel_colorop_funcs,
> + intel_plane_supported_csc_ff,
> + DRM_COLOROP_FLAG_ALLOW_BYPASS);
> + break;
[Severity: Medium]
Will intel_plane_color_copy_uapi_to_hw_state() successfully extract the
state for INTEL_PLANE_CB_CSC_FF?
Looking at intel_plane_colorop_replace_blob() in
drivers/gpu/drm/i915/display/intel_plane.c, it handles blob-based colorops
like INTEL_PLANE_CB_CSC, but lacks a case for INTEL_PLANE_CB_CSC_FF.
Could this cause userspace settings for fixed_matrix_type and bypass on this
colorop to be silently ignored when applying the pipeline?
[Severity: High]
This is a pre-existing issue, but if drm_plane_colorop_fixed_matrix_init()
or other initialization functions fail early (e.g. due to OOM), the code
jumps to the cleanup label in this function and calls intel_colorop_destroy().
This calls drm_colorop_cleanup(), which unconditionally dereferences
colorop->dev and colorop->head via list_del().
Since these fields might not be initialized on early failure, is it possible
for this to cause a NULL pointer dereference?
[Severity: Critical]
This is another pre-existing issue on the cleanup path. When
drm_colorop_cleanup() runs, it never calls drm_mode_object_unregister().
Because the object was registered in drm_mode_object_add() during init,
does omitting drm_mode_object_unregister() leave a dangling pointer in the
device's IDR, allowing userspace to trigger a use-after-free by querying
the freed object ID?
> default:
> drm_err(plane->dev, "Invalid colorop id [%d]", id);
> ret = -EINVAL;
[ ... ]
> @@ -126,9 +142,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
> if (plane_has_3dlut(display, pipe, plane)) {
> pipeline = xe3plpd_primary_plane_pipeline;
> pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
> - } else {
> + } else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
> pipeline = hdr_plane_pipeline;
> pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
> + } else {
> + pipeline = sdr_plane_pipeline;
> + pipeline_len = ARRAY_SIZE(sdr_plane_pipeline);
> }
[Severity: Medium]
Will this newly added sdr_plane_pipeline ever execute?
The caller of this function, intel_color_pipeline_plane_init(), has an early
return:
intel_color_pipeline_plane_init()
if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
return 0;
ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
Because it skips all non-HDR planes before calling this function, doesn't
that make this else branch for SDR planes completely unreachable?
[Severity: High]
This isn't a bug introduced by this patch, but immediately below this block
in _intel_color_pipeline_plane_init(), kasprintf() is called:
list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ...);
The return value is not checked for NULL.
If kasprintf() fails, it passes the NULL pointer to
drm_plane_create_color_pipeline_property(), which passes it to
drm_property_create_enum().
Will this cause a panic when strlen(name) is called on the NULL pointer
inside drm_property_add_enum()?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=2
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes
2026-07-13 5:15 ` [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
@ 2026-07-13 6:01 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 6:01 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Hardware YUV-to-RGB conversion (Input CSC) is incorrectly disabled for HDR planes when a color pipeline is active.
- [Medium] For SDR planes, when a color pipeline is active, the driver fails to set the PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE bit for full-range YCbCr-to-RGB matrix conversions.
--
--- Patch [6]: [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes ---
commit 840c01156b413fde2fac882f08e842c50840876f
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Subject: drm/i915/display: Program input CSC on SDR planes
This commit programs the SDR plane fixed-function CSC when a color pipeline
is active. It also ensures the legacy color_encoding/color_range properties
remain mutually exclusive with the color pipeline uAPI.
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index da2df5be9848d..0e951b36cccad 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
[ ... ]
> @@ -1240,33 +1240,63 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
[ ... ]
> static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
> {
> struct intel_display *display = to_intel_display(plane_state);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + bool color_pipeline = plane_state->uapi.state &&
> + plane_state->uapi.state->plane_color_pipeline;
> u32 ctl = 0;
>
> - if (!fb->format->is_yuv)
> - return 0;
> + if (!color_pipeline) {
> + if (!fb->format->is_yuv)
> + return 0;
>
> - if (!icl_is_hdr_plane(display, plane->id)) {
> - switch (plane_state->hw.color_encoding) {
> - case DRM_COLOR_YCBCR_BT709:
> - ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> - break;
> - case DRM_COLOR_YCBCR_BT2020:
> - ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> - break;
> - default:
> - ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + if (!icl_is_hdr_plane(display, plane->id)) {
> + switch (plane_state->hw.color_encoding) {
[ ... ]
> + default:
> + ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + }
> + } else {
> + ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> }
> - } else {
> - ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> - }
>
> - if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
> - ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> + if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
> + ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
[Severity: High]
Does this logic inadvertently disable hardware YUV-to-RGB conversion for HDR
planes when a color pipeline is active?
When color_pipeline is true for an HDR plane, the logic in
glk_plane_color_ctl_input_csc() skips the (!color_pipeline) branch entirely.
However, the else-if block below only handles SDR planes, which causes the
function to return 0 and fail to set the PLANE_COLOR_INPUT_CSC_ENABLE bit
for HDR planes.
Since the hardware coefficients might still be programmed in
icl_plane_update_noarm():
if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
icl_program_input_csc(dsb, plane, plane_state);
Could this allow raw YUV data to flow directly into the RGB pipeline without
conversion, causing visual corruption when a YUV framebuffer is assigned to
an HDR plane?
> + } else if (!icl_is_hdr_plane(display, plane->id)) {
> + if (plane_state->hw.csc_ff_enable)
> + ctl |= intel_csc_ff_type_to_csc_mode(plane_state->hw.csc_ff_type);
[Severity: Medium]
For SDR planes with an active color pipeline, does this miss setting the
PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE bit for full-range YCbCr-to-RGB
conversions?
If full-range YCbCr input is processed without this bit, would the hardware's
default limited-to-full range correction be applied before the full-range
matrix, causing color distortion?
Even if this path is currently unreachable in practice because the color
pipeline property isn't exposed on SDR planes, should the disable bit still
be explicitly set when appropriate to prevent future issues?
> + }
>
> return ctl;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=6
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes
2026-07-13 5:15 ` [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
@ 2026-07-13 6:05 ` sashiko-bot
0 siblings, 0 replies; 29+ messages in thread
From: sashiko-bot @ 2026-07-13 6:05 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: dri-devel
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The newly added SDR plane color pipeline functionality is inaccessible to userspace due to an early return in the pipeline initialization function, rendering the feature incomplete and the newly added programming functions as dead code.
--
--- Patch [13]: [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes ---
commit 2ccaf3515c1ab87e0ae3d1f70b7f38f7f0aa3375
Author: Pranay Samala <pranay.samala@intel.com>
drm/i915/color: Program Plane Post CSC registers for SDR planes
This commit implements plane post-CSC LUT support for SDR planes in the
Intel display driver.
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 3600469795565..be2e1d8ce0e6f 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
[ ... ]
> @@ -4082,6 +4082,45 @@ xelpd_load_hdr_post_csc_lut(struct intel_display *display,
> intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
> }
>
> +static void
> +xelpd_load_sdr_post_csc_lut(struct intel_display *display,
> + struct intel_dsb *dsb,
> + enum pipe pipe,
> + enum plane_id plane,
> + const struct drm_color_lut32 *post_csc_lut)
> +{
[Severity: Medium]
Will this newly added function ever be executed?
Looking at intel_color_pipeline_plane_init() in
drivers/gpu/drm/i915/display/intel_color_pipeline.c, there is an early return
that prevents initialization for non-HDR planes:
/* Currently expose pipeline only for HDR planes */
if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
return 0;
Because this check remains, the color pipeline properties are never attached
to SDR planes. This means plane_state->hw.gamma_lut will always be NULL for
these planes, making this new hardware programming function effectively dead
code.
Does the check in intel_color_pipeline_plane_init() need to be updated to
expose this new functionality to userspace?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713051516.4087420-1-chaitanya.kumar.borah@intel.com?part=13
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/color: Enable SDR plane color pipeline (rev5)
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (14 preceding siblings ...)
2026-07-13 5:50 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev5) Patchwork
@ 2026-07-13 6:34 ` Patchwork
2026-07-13 6:51 ` ✓ i915.CI.BAT: " Patchwork
` (2 subsequent siblings)
18 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2026-07-13 6:34 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 924 bytes --]
== Series Details ==
Series: drm/i915/color: Enable SDR plane color pipeline (rev5)
URL : https://patchwork.freedesktop.org/series/162786/
State : success
== Summary ==
CI Bug Log - changes from xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88_BAT -> xe-pw-162786v5_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_9002 -> IGT_9003
* Linux: xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88 -> xe-pw-162786v5
IGT_9002: 9002
IGT_9003: 9003
xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88: f8ed2f7559466d59169b7a840c2403a0d4614f88
xe-pw-162786v5: 162786v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/index.html
[-- Attachment #2: Type: text/html, Size: 1486 bytes --]
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/color: Enable SDR plane color pipeline (rev5)
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (15 preceding siblings ...)
2026-07-13 6:34 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-07-13 6:51 ` Patchwork
2026-07-13 8:29 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-07-13 10:24 ` ✗ i915.CI.Full: " Patchwork
18 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2026-07-13 6:51 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1000 bytes --]
== Series Details ==
Series: drm/i915/color: Enable SDR plane color pipeline (rev5)
URL : https://patchwork.freedesktop.org/series/162788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_18809 -> Patchwork_162788v5
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/index.html
Participating hosts (41 -> 40)
------------------------------
Missing (1): bat-dg2-13
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_18809 -> Patchwork_162788v5
CI-20190529: 20190529
CI_DRM_18809: f8ed2f7559466d59169b7a840c2403a0d4614f88 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9002: 9002
Patchwork_162788v5: f8ed2f7559466d59169b7a840c2403a0d4614f88 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/index.html
[-- Attachment #2: Type: text/html, Size: 1565 bytes --]
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/color: Enable SDR plane color pipeline (rev5)
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (16 preceding siblings ...)
2026-07-13 6:51 ` ✓ i915.CI.BAT: " Patchwork
@ 2026-07-13 8:29 ` Patchwork
2026-07-13 10:24 ` ✗ i915.CI.Full: " Patchwork
18 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2026-07-13 8:29 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 49111 bytes --]
== Series Details ==
Series: drm/i915/color: Enable SDR plane color pipeline (rev5)
URL : https://patchwork.freedesktop.org/series/162786/
State : failure
== Summary ==
CI Bug Log - changes from xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88_FULL -> xe-pw-162786v5_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-162786v5_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-162786v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-162786v5_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode:
- shard-lnl: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-1/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-3/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode.html
* igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
- shard-bmg: [PASS][3] -> [ABORT][4] +1 other test abort
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-7/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
* igt@xe_exec_system_allocator@process-many-stride-malloc-fork-read:
- shard-lnl: [PASS][5] -> [DMESG-WARN][6] +9 other tests dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-6/igt@xe_exec_system_allocator@process-many-stride-malloc-fork-read.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-3/igt@xe_exec_system_allocator@process-many-stride-malloc-fork-read.html
* igt@xe_exec_system_allocator@threads-many-execqueues-malloc-prefetch-race:
- shard-lnl: NOTRUN -> [DMESG-WARN][7] +2 other tests dmesg-warn
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-3/igt@xe_exec_system_allocator@threads-many-execqueues-malloc-prefetch-race.html
New tests
---------
New tests have been introduced between xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88_FULL and xe-pw-162786v5_FULL:
### New IGT tests (70) ###
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.20, 0.21] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.24] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.22, 0.24] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.22] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.22] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.22, 0.23] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-3:
- Statuses : 1 pass(s)
- Exec time: [0.21] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-4:
- Statuses : 1 pass(s)
- Exec time: [0.25] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.22, 0.25] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.20, 0.25] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.20, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.20, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.22, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-3:
- Statuses : 1 pass(s)
- Exec time: [0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-4:
- Statuses : 1 pass(s)
- Exec time: [0.24] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-160:
- Statuses : 2 pass(s)
- Exec time: [2.90, 7.99] s
* igt@kms_pm_rpm@legacy-planes@plane-160:
- Statuses : 2 pass(s)
- Exec time: [2.94, 7.97] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-160:
- Statuses : 1 pass(s)
- Exec time: [2.83] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-195:
- Statuses : 1 pass(s)
- Exec time: [2.88] s
* igt@kms_pm_rpm@universal-planes@plane-160:
- Statuses : 2 pass(s)
- Exec time: [2.71, 8.04] s
* igt@kms_pm_rpm@universal-planes@plane-195:
- Statuses : 2 pass(s)
- Exec time: [2.81, 7.97] s
Known issues
------------
Here are the changes found in xe-pw-162786v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1407])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2327]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-2/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#1124]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#610] / [Intel XE#7387])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1124]) +7 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#7679]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#367]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2887]) +11 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2:
- shard-bmg: [PASS][16] -> [FAIL][17] ([Intel XE#7659]) +8 other tests fail
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#3432]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2652]) +8 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#2887]) +2 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2325] / [Intel XE#7358])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_color@ctm-max:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#306] / [Intel XE#7358])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2252]) +3 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#373]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate.html
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4 (NEW):
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#6969]) +28 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-5/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4 (NEW):
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#6969]) +46 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4 (NEW):
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#6969] / [Intel XE#7006])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4 (NEW):
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#6969] / [Intel XE#7006])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2390] / [Intel XE#6974])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-6/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@legacy:
- shard-bmg: NOTRUN -> [FAIL][30] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-4/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#2321] / [Intel XE#7355])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-4/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1424])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-7/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-32x32:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2320])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-4/igt@kms_cursor_crc@cursor-sliding-32x32.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#4354] / [Intel XE#5882])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dsc@dsc-with-output-formats-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#8265]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-6/igt@kms_dsc@dsc-with-output-formats-bigjoiner.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#4422] / [Intel XE#7442])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#1421])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#7179])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#4141]) +6 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2352] / [Intel XE#7399])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#6312]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2311]) +41 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-move:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#7865]) +4 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#7061] / [Intel XE#7356]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#7905]) +11 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#7061]) +7 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-2/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#656] / [Intel XE#7905]) +5 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2313]) +39 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#7283]) +4 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2393])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@kms_plane_lowres@tiling-y.html
* igt@kms_pm_dc@dc3co-framedrop-check:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#8395]) +1 other test skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-10/igt@kms_pm_dc@dc3co-framedrop-check.html
* igt@kms_pm_dc@dc3co-framedrop-check@psr2:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#8396])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-10/igt@kms_pm_dc@dc3co-framedrop-check@psr2.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2499])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#1489]) +3 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-4/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#1406] / [Intel XE#7345])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_psr@fbc-psr2-sprite-plane-move@edp-1:
- shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#1406] / [Intel XE#4609])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_psr@fbc-psr2-sprite-plane-move@edp-1.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#1406]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_psr@pr-cursor-plane-move.html
* igt@kms_psr@psr-basic:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2234] / [Intel XE#2850]) +11 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@kms_psr@psr-basic.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_sharpness_filter@filter-scaler-upscale:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#6503])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@kms_sharpness_filter@filter-scaler-upscale.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2450] / [Intel XE#5857])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#1499])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@xe_compute@eu-busy-10s:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#6599])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@xe_compute@eu-busy-10s.html
* igt@xe_evict@evict-beng-large-multi-vm-cm:
- shard-lnl: NOTRUN -> [SKIP][68] ([Intel XE#6540] / [Intel XE#688])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@xe_evict@evict-beng-large-multi-vm-cm.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: [PASS][69] -> [INCOMPLETE][70] ([Intel XE#6321] / [Intel XE#8355])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_evict@evict-small-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#8370]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-4/igt@xe_evict@evict-small-multi-queue-cm.html
* igt@xe_exec_balancer@many-cm-virtual-basic:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#7482]) +2 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@xe_exec_balancer@many-cm-virtual-basic.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#2322] / [Intel XE#7372]) +5 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-fault:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#8374]) +13 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-fault.html
* igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#8374])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-5/igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#8364]) +27 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#8364]) +5 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-5/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr-invalidate.html
* igt@xe_exec_reset@cm-multi-queue-cat-error:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#8369])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-4/igt@xe_exec_reset@cm-multi-queue-cat-error.html
* igt@xe_exec_reset@multi-queue-cancel-on-secondary:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#8369])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@xe_exec_reset@multi-queue-cancel-on-secondary.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-race-nomemset:
- shard-lnl: [PASS][80] -> [ABORT][81] ([Intel XE#8007])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-race-nomemset.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-race-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-cm-basic:
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#8378]) +2 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-basic.html
* igt@xe_exec_threads@threads-multi-queue-rebind-err:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#8378]) +5 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-rebind-err.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_log_init:
- shard-bmg: [PASS][84] -> [ABORT][85] ([Intel XE#8007]) +1 other test abort
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_log_init.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_log_init.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#2833])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_multigpu_svm@mgpu-pagefault-basic:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#6964]) +2 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@xe_multigpu_svm@mgpu-pagefault-basic.html
* igt@xe_non_msix@walker-interrupt-notification-non-msix:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#7622])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-6/igt@xe_non_msix@walker-interrupt-notification-non-msix.html
* igt@xe_page_reclaim@prl-invalidate-full:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#7793]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-3/igt@xe_page_reclaim@prl-invalidate-full.html
* igt@xe_pat@pat-sw-hw-suspend:
- shard-lnl: NOTRUN -> [FAIL][90] ([Intel XE#7695])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@xe_pat@pat-sw-hw-suspend.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-5/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-mmap-system:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@xe_pm@d3cold-mmap-system.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#4733] / [Intel XE#7417]) +3 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-6/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_query@multigpu-query-config:
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#944])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@xe_query@multigpu-query-config.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#944]) +1 other test skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: [PASS][96] -> [FAIL][97] ([Intel XE#6569])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-7/igt@xe_sriov_flr@flr-twice.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@xe_sriov_flr@flr-twice.html
* igt@xe_sriov_vram@vf-access-beyond:
- shard-lnl: NOTRUN -> [SKIP][98] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-5/igt@xe_sriov_vram@vf-access-beyond.html
#### Possible fixes ####
* igt@core_hotunplug@hotrebind:
- shard-bmg: [ABORT][99] ([Intel XE#8007]) -> [PASS][100] +3 other tests pass
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-1/igt@core_hotunplug@hotrebind.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@core_hotunplug@hotrebind.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [FAIL][101] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2:
- shard-bmg: [FAIL][103] ([Intel XE#6078]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][105] ([Intel XE#7809]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][107] ([Intel XE#301]) -> [PASS][108] +1 other test pass
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][109] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-6/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_wedged@basic-wedged:
- shard-lnl: [ABORT][111] ([Intel XE#3119]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-5/igt@xe_wedged@basic-wedged.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@xe_wedged@basic-wedged.html
#### Warnings ####
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2:
- shard-lnl: [SKIP][113] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][114] ([Intel XE#6969])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-5/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-8/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
- shard-bmg: [SKIP][115] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][116] ([Intel XE#6969])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-bmg-9/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-lnl: [ABORT][117] ([Intel XE#8007]) -> [SKIP][118] ([Intel XE#2321] / [Intel XE#7355])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][119] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][120] ([Intel XE#309] / [Intel XE#7343])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/shard-lnl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3119]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3119
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
[Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
[Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7622]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7622
[Intel XE#7659]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7659
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_9002 -> IGT_9003
* Linux: xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88 -> xe-pw-162786v5
IGT_9002: 9002
IGT_9003: 9003
xe-5390-f8ed2f7559466d59169b7a840c2403a0d4614f88: f8ed2f7559466d59169b7a840c2403a0d4614f88
xe-pw-162786v5: 162786v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162786v5/index.html
[-- Attachment #2: Type: text/html, Size: 56373 bytes --]
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✗ i915.CI.Full: failure for drm/i915/color: Enable SDR plane color pipeline (rev5)
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
` (17 preceding siblings ...)
2026-07-13 8:29 ` ✗ Xe.CI.FULL: failure " Patchwork
@ 2026-07-13 10:24 ` Patchwork
18 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2026-07-13 10:24 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 130740 bytes --]
== Series Details ==
Series: drm/i915/color: Enable SDR plane color pipeline (rev5)
URL : https://patchwork.freedesktop.org/series/162788/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_18809_full -> Patchwork_162788v5_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_162788v5_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_162788v5_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_162788v5_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-dg2: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [FAIL][3] +3 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-3.html
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4 (NEW):
- shard-dg2: NOTRUN -> [SKIP][4] +47 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-10/igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4.html
- shard-tglu-1: NOTRUN -> [SKIP][5] +15 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3 (NEW):
- shard-mtlp: NOTRUN -> [SKIP][6] +47 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-4/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3.html
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3 (NEW):
- shard-tglu: NOTRUN -> [SKIP][7] +79 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-8/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3.html
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4 (NEW):
- shard-rkl: NOTRUN -> [SKIP][8] +35 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-5 (NEW):
- shard-dg1: NOTRUN -> [SKIP][9] +95 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-18/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-5.html
New tests
---------
New tests have been introduced between CI_DRM_18809_full and Patchwork_162788v5_full:
### New IGT tests (128) ###
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.05] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.05] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-3:
- Statuses : 5 pass(s)
- Exec time: [0.12, 0.26] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-4:
- Statuses : 5 pass(s)
- Exec time: [0.12, 0.23] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.12, 0.23] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.12, 0.21] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
- Statuses : 5 pass(s)
- Exec time: [0.13, 0.27] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
- Statuses : 5 pass(s)
- Exec time: [0.14, 0.27] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.22] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-3:
- Statuses : 5 pass(s)
- Exec time: [0.13, 0.20] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-4:
- Statuses : 5 pass(s)
- Exec time: [0.14, 0.22] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.22] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-3:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.25] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-4:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.24] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.26] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.25] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.05] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-3:
- Statuses : 5 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-4:
- Statuses : 5 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-3:
- Statuses : 4 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-4:
- Statuses : 4 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-5:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-d-plane-6:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-3:
- Statuses : 4 pass(s)
- Exec time: [0.12, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-4:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.12, 0.24] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.24] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-3:
- Statuses : 4 pass(s)
- Exec time: [0.12, 0.27] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.24] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.20] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.12, 0.21] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-3:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.26] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-4:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-3:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-4:
- Statuses : 4 pass(s)
- Exec time: [0.13, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-5:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-6:
- Statuses : 2 pass(s)
- Exec time: [0.13, 0.22] s
Known issues
------------
Here are the changes found in Patchwork_162788v5_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-rkl: NOTRUN -> [SKIP][10] ([i915#8411])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-rkl: NOTRUN -> [SKIP][11] ([i915#11078])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_buddy@drm_buddy:
- shard-tglu: NOTRUN -> [SKIP][12] ([i915#15678])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@drm_buddy@drm_buddy.html
* igt@gem_ccs@block-multicopy-inplace:
- shard-tglu: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@gem_ccs@block-multicopy-inplace.html
* igt@gem_ccs@suspend-resume:
- shard-dg2: [PASS][14] -> [INCOMPLETE][15] ([i915#13356] / [i915#16348]) +1 other test incomplete
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-8/igt@gem_ccs@suspend-resume.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-4/igt@gem_ccs@suspend-resume.html
- shard-rkl: NOTRUN -> [SKIP][16] ([i915#9323])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@gem_ccs@suspend-resume.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-glk: NOTRUN -> [INCOMPLETE][17] ([i915#13356] / [i915#16466]) +1 other test incomplete
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_ctx_sseu@invalid-args:
- shard-rkl: NOTRUN -> [SKIP][18] ([i915#280]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_ctx_sseu@mmap-args:
- shard-tglu: NOTRUN -> [SKIP][19] ([i915#280])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#4525])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-rkl: NOTRUN -> [SKIP][21] ([i915#4525])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_balancer@parallel-out-fence:
- shard-tglu-1: NOTRUN -> [SKIP][22] ([i915#4525]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-glk: NOTRUN -> [SKIP][23] ([i915#6334]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_capture@capture-recoverable:
- shard-tglu-1: NOTRUN -> [SKIP][24] ([i915#6344])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_reloc@basic-gtt-read:
- shard-dg2: NOTRUN -> [SKIP][25] ([i915#3281]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@gem_exec_reloc@basic-gtt-read.html
* igt@gem_exec_reloc@basic-write-read:
- shard-rkl: NOTRUN -> [SKIP][26] ([i915#3281]) +10 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@gem_exec_reloc@basic-write-read.html
* igt@gem_exec_schedule@semaphore-power:
- shard-rkl: NOTRUN -> [SKIP][27] ([i915#7276])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_exec_suspend@basic-s3:
- shard-glk: NOTRUN -> [INCOMPLETE][28] ([i915#13196] / [i915#13356]) +1 other test incomplete
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk4/igt@gem_exec_suspend@basic-s3.html
* igt@gem_linear_blits@interruptible:
- shard-dg1: [PASS][29] -> [FAIL][30] ([i915#15391] / [i915#16503])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-16/igt@gem_linear_blits@interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-14/igt@gem_linear_blits@interruptible.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-tglu: NOTRUN -> [SKIP][31] ([i915#4613] / [i915#7582])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-rkl: NOTRUN -> [SKIP][32] ([i915#4613]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][33] ([i915#4613]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@verify:
- shard-tglu: NOTRUN -> [SKIP][34] ([i915#4613]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@gem_lmem_swapping@verify.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-glk: NOTRUN -> [SKIP][35] ([i915#4613]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_pwrite@basic-random:
- shard-rkl: NOTRUN -> [SKIP][36] ([i915#3282]) +4 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_pwrite@basic-random.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-tglu-1: NOTRUN -> [SKIP][37] ([i915#3297])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#3297]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-rkl: NOTRUN -> [SKIP][39] ([i915#3282] / [i915#3297])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_workarounds@suspend-resume:
- shard-glk11: NOTRUN -> [INCOMPLETE][40] ([i915#13356] / [i915#14586])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk11/igt@gem_workarounds@suspend-resume.html
* igt@gen9_exec_parse@bb-chained:
- shard-tglu: NOTRUN -> [SKIP][41] ([i915#2527] / [i915#2856]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@gen9_exec_parse@bb-chained.html
* igt@gen9_exec_parse@shadow-peek:
- shard-rkl: NOTRUN -> [SKIP][42] ([i915#2527]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@gen9_exec_parse@shadow-peek.html
* igt@gen9_exec_parse@valid-registers:
- shard-tglu-1: NOTRUN -> [SKIP][43] ([i915#2527] / [i915#2856]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-rkl: NOTRUN -> [SKIP][44] ([i915#8399])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][45] ([i915#8399])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [PASS][46] -> [INCOMPLETE][47] ([i915#13356] / [i915#13820]) +1 other test incomplete
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-5/igt@i915_pm_freq_api@freq-suspend@gt0.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-10/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_power@sanity:
- shard-rkl: NOTRUN -> [SKIP][48] ([i915#7984])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@i915_power@sanity.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-tglu-1: NOTRUN -> [INCOMPLETE][49] ([i915#4817] / [i915#7443])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@i915_suspend@forcewake:
- shard-glk: NOTRUN -> [INCOMPLETE][50] ([i915#16182] / [i915#4817])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@i915_suspend@forcewake.html
* igt@intel_hwmon@hwmon-write:
- shard-tglu: NOTRUN -> [SKIP][51] ([i915#7707])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-rkl: NOTRUN -> [SKIP][52] ([i915#12454] / [i915#12712])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-tglu: NOTRUN -> [SKIP][53] ([i915#9531])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-glk: NOTRUN -> [SKIP][54] ([i915#1769])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-tglu: NOTRUN -> [SKIP][55] ([i915#5286]) +3 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-tglu-1: NOTRUN -> [SKIP][56] ([i915#5286])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][57] ([i915#5286]) +2 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][58] ([i915#3638]) +3 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][59] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-4/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#10307] / [i915#6095]) +104 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][61] ([i915#14098] / [i915#6095]) +47 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs:
- shard-tglu: NOTRUN -> [SKIP][62] ([i915#6095]) +39 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][63] ([i915#14544] / [i915#6095]) +6 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][64] ([i915#12313])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][65] ([i915#6095]) +19 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][66] ([i915#6095]) +72 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][67] ([i915#12805])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][68] ([i915#6095]) +11 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][69] ([i915#6095]) +159 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-15/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-tglu: NOTRUN -> [SKIP][70] ([i915#12313]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][71] ([i915#14098] / [i915#14544] / [i915#6095]) +3 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-tglu-1: NOTRUN -> [SKIP][72] ([i915#3742])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_audio@dp-audio-after-suspend:
- shard-tglu: NOTRUN -> [SKIP][73] ([i915#11151])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_chamelium_audio@dp-audio-after-suspend.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-dg2: NOTRUN -> [SKIP][74]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4:
- shard-rkl: NOTRUN -> [SKIP][75] ([i915#16471]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html
* igt@kms_chamelium_frames@dp-frame-dump:
- shard-rkl: NOTRUN -> [SKIP][76] ([i915#11151] / [i915#7828]) +5 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_chamelium_frames@dp-frame-dump.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#11151] / [i915#7828])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-tglu-1: NOTRUN -> [SKIP][78] ([i915#11151] / [i915#7828]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-without-ddc:
- shard-tglu: NOTRUN -> [SKIP][79] ([i915#11151] / [i915#7828]) +5 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
* igt@kms_color@deep-color:
- shard-rkl: [PASS][80] -> [SKIP][81] ([i915#12655] / [i915#3555])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_color@deep-color.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_color@deep-color.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#15330])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@lic-type-0:
- shard-tglu: NOTRUN -> [SKIP][83] ([i915#15865]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-rkl: NOTRUN -> [SKIP][84] ([i915#15865]) +3 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][85] ([i915#13049])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#13049])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#13049]) +1 other test skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: NOTRUN -> [SKIP][88] ([i915#3555]) +2 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-64x21@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][89] ([i915#13566])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_cursor_crc@cursor-random-64x21@pipe-a-hdmi-a-2.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-tglu: NOTRUN -> [SKIP][90] ([i915#3555]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-rkl: [PASS][91] -> [INCOMPLETE][92] ([i915#12358] / [i915#14152])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_cursor_crc@cursor-suspend.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [INCOMPLETE][93] ([i915#12358] / [i915#14152])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-2.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-rkl: NOTRUN -> [SKIP][94] +84 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-tglu-1: NOTRUN -> [SKIP][95] ([i915#4103])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: NOTRUN -> [SKIP][96] ([i915#4103])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-tglu-1: NOTRUN -> [SKIP][97] ([i915#9723])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-glk11: NOTRUN -> [SKIP][98] +104 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk11/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][99] ([i915#3804])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dp_aux_dev@basic:
- shard-tglu: NOTRUN -> [SKIP][100] ([i915#1257])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_dp_aux_dev@basic.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-rkl: NOTRUN -> [SKIP][101] ([i915#13707])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-tglu-1: NOTRUN -> [SKIP][102] ([i915#16361])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-output-formats-bigjoiner:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#16361]) +5 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_dsc@dsc-with-output-formats-bigjoiner.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-tglu: NOTRUN -> [SKIP][104] ([i915#16361])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-glk10: NOTRUN -> [INCOMPLETE][105] ([i915#9878])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk10/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr:
- shard-rkl: NOTRUN -> [SKIP][106] ([i915#3955])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@chamelium:
- shard-tglu: NOTRUN -> [SKIP][107] ([i915#2065])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@psr1:
- shard-rkl: NOTRUN -> [SKIP][108] ([i915#658])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-rkl: NOTRUN -> [SKIP][109] ([i915#9934]) +6 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-glk: NOTRUN -> [INCOMPLETE][110] ([i915#12745] / [i915#4839])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk3/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: NOTRUN -> [INCOMPLETE][111] ([i915#12745])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk3/igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-tglu-1: NOTRUN -> [SKIP][112] ([i915#3637] / [i915#9934]) +3 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-tglu: NOTRUN -> [SKIP][113] ([i915#3637] / [i915#9934]) +2 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@flip-vs-suspend:
- shard-rkl: [PASS][114] -> [ABORT][115] ([i915#15132])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-2/igt@kms_flip@flip-vs-suspend.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-1/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a2:
- shard-rkl: NOTRUN -> [ABORT][116] ([i915#15132])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-1/igt@kms_flip@flip-vs-suspend@a-hdmi-a2.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#15643]) +2 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-rkl: NOTRUN -> [SKIP][118] ([i915#15643]) +4 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-tglu: NOTRUN -> [SKIP][119] ([i915#15643]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode:
- shard-mtlp: [PASS][120] -> [FAIL][121] ([i915#15733]) +1 other test fail
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-p010-4tile-to-p016-4tile@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-glk: [PASS][122] -> [SKIP][123] +8 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][124] ([i915#15989]) +21 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-render:
- shard-tglu-1: NOTRUN -> [SKIP][125] ([i915#15989]) +7 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-tglu: NOTRUN -> [SKIP][126] +67 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-suspend:
- shard-tglu: NOTRUN -> [SKIP][127] ([i915#15989]) +14 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_frontbuffer_tracking@fbchdr-suspend.html
- shard-glk10: NOTRUN -> [INCOMPLETE][128] ([i915#16056] / [i915#16593])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk10/igt@kms_frontbuffer_tracking@fbchdr-suspend.html
* igt@kms_frontbuffer_tracking@fbchdr-tiling-4:
- shard-dg2: NOTRUN -> [SKIP][129] ([i915#15989])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
- shard-rkl: NOTRUN -> [SKIP][130] ([i915#5439])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-glk10: NOTRUN -> [SKIP][131] +116 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
- shard-tglu: NOTRUN -> [SKIP][132] ([i915#15102]) +26 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][133] ([i915#1825]) +4 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][134] ([i915#15991] / [i915#5354]) +1 other test skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][135] ([i915#15990] / [i915#8708])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][136] ([i915#15102] / [i915#3023]) +14 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-tglu-1: NOTRUN -> [SKIP][137] ([i915#5439])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#15990]) +2 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt:
- shard-tglu-1: NOTRUN -> [SKIP][139] ([i915#15102]) +18 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-wc:
- shard-rkl: [PASS][140] -> [SKIP][141] ([i915#15989]) +9 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-wc.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#15104] / [i915#15990])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-shrfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][143] ([i915#15102])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move:
- shard-rkl: NOTRUN -> [SKIP][144] ([i915#15102]) +26 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][145] +36 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: NOTRUN -> [SKIP][146] ([i915#3555] / [i915#8228]) +1 other test skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@invalid-hdr:
- shard-tglu-1: NOTRUN -> [SKIP][147] ([i915#3555] / [i915#8228])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-tglu: NOTRUN -> [SKIP][148] ([i915#3555] / [i915#8228])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][149] ([i915#15458])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-rkl: NOTRUN -> [SKIP][150] ([i915#13688])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-rkl: NOTRUN -> [SKIP][151] ([i915#15458])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][152] ([i915#15638] / [i915#15722])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-glk: NOTRUN -> [DMESG-FAIL][153] ([i915#118])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk9/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
- shard-tglu: NOTRUN -> [SKIP][154] ([i915#15709]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
- shard-tglu-1: NOTRUN -> [SKIP][155] ([i915#15709])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
- shard-rkl: NOTRUN -> [SKIP][156] ([i915#16386]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#15709]) +4 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7:
- shard-tglu: NOTRUN -> [SKIP][158] ([i915#16386]) +1 other test skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7.html
* igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
- shard-tglu-1: NOTRUN -> [SKIP][159] ([i915#16112])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html
* igt@kms_plane_alpha_blend@constant-alpha-max:
- shard-glk: NOTRUN -> [FAIL][160] ([i915#10647] / [i915#12169])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk3/igt@kms_plane_alpha_blend@constant-alpha-max.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][161] ([i915#10647]) +1 other test fail
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk3/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][162] ([i915#13958])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
- shard-rkl: NOTRUN -> [SKIP][163] ([i915#15329]) +3 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats:
- shard-dg1: [PASS][164] -> [DMESG-WARN][165] ([i915#4423]) +3 other tests dmesg-warn
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-17/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-19/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
- shard-tglu-1: NOTRUN -> [SKIP][166] ([i915#15329]) +4 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
* igt@kms_pm_backlight@basic-brightness:
- shard-tglu-1: NOTRUN -> [SKIP][167] ([i915#12343] / [i915#9812])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@fade:
- shard-rkl: NOTRUN -> [SKIP][168] ([i915#12343] / [i915#5354])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_pm_backlight@fade.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-rkl: NOTRUN -> [SKIP][169] ([i915#3828]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: NOTRUN -> [FAIL][170] ([i915#16479])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-rkl: NOTRUN -> [SKIP][171] ([i915#15948])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: [PASS][172] -> [SKIP][173] ([i915#9340])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-4/igt@kms_pm_lpsp@kms-lpsp.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-1/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-tglu: NOTRUN -> [SKIP][174] ([i915#8430])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: [PASS][175] -> [SKIP][176] ([i915#15073]) +1 other test skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-8/igt@kms_pm_rpm@dpms-lpsp.html
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-dg2: [PASS][177] -> [SKIP][178] ([i915#15073]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp-stress.html
- shard-dg1: [PASS][179] -> [SKIP][180] ([i915#15073])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp-stress.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-17/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#15073])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-tglu: NOTRUN -> [SKIP][182] ([i915#15073])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-glk11: NOTRUN -> [INCOMPLETE][183] ([i915#10553])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk11/igt@kms_pm_rpm@system-suspend-modeset.html
- shard-rkl: [PASS][184] -> [INCOMPLETE][185] ([i915#14419])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_pm_rpm@system-suspend-modeset.html
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-tglu: NOTRUN -> [SKIP][186] ([i915#6524]) +1 other test skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][187] ([i915#11520]) +3 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
- shard-glk11: NOTRUN -> [SKIP][188] ([i915#11520]) +3 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk11/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][189] ([i915#11520]) +7 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
- shard-rkl: NOTRUN -> [SKIP][190] ([i915#11520]) +5 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-tglu-1: NOTRUN -> [SKIP][191] ([i915#11520]) +1 other test skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf:
- shard-glk10: NOTRUN -> [SKIP][192] ([i915#11520]) +1 other test skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk10/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr@fbc-pr-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][193] ([i915#9732]) +6 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_psr@fbc-pr-suspend.html
* igt@kms_psr@fbc-psr-no-drrs:
- shard-tglu: NOTRUN -> [SKIP][194] ([i915#9732]) +12 other tests skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_psr@fbc-psr-no-drrs.html
* igt@kms_psr@fbc-psr-sprite-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][195] ([i915#1072] / [i915#9732])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html
* igt@kms_psr@fbc-psr2-cursor-mmap-gtt:
- shard-glk: NOTRUN -> [SKIP][196] +311 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk6/igt@kms_psr@fbc-psr2-cursor-mmap-gtt.html
* igt@kms_psr@fbc-psr2-sprite-render:
- shard-rkl: NOTRUN -> [SKIP][197] ([i915#1072] / [i915#9732]) +23 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_psr@fbc-psr2-sprite-render.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-rkl: NOTRUN -> [SKIP][198] ([i915#5289])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_selftest@drm_framebuffer:
- shard-rkl: NOTRUN -> [ABORT][199] ([i915#13179]) +1 other test abort
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_selftest@drm_framebuffer.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-glk: NOTRUN -> [FAIL][200] ([i915#10959])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk9/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglu: NOTRUN -> [SKIP][201] ([i915#8623])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flip-basic:
- shard-tglu-1: NOTRUN -> [SKIP][202] ([i915#3555])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@lobf:
- shard-tglu: NOTRUN -> [SKIP][203] ([i915#11920])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@kms_vrr@lobf.html
* igt@kms_vrr@max-min:
- shard-tglu: NOTRUN -> [SKIP][204] ([i915#9906]) +1 other test skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@kms_vrr@max-min.html
* igt@perf_pmu@module-unload:
- shard-dg2: NOTRUN -> [ABORT][205] ([i915#13029] / [i915#15778])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@perf_pmu@module-unload.html
- shard-rkl: NOTRUN -> [ABORT][206] ([i915#15778])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-dg2: NOTRUN -> [SKIP][207] ([i915#8516])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@perf_pmu@rc6@other-idle-gt0.html
- shard-rkl: NOTRUN -> [SKIP][208] ([i915#8516])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_udl@share-import-addfb:
- shard-tglu: NOTRUN -> [SKIP][209] ([i915#16420])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-4/igt@prime_udl@share-import-addfb.html
* igt@sriov_basic@bind-unbind-vf@vf-1:
- shard-tglu-1: NOTRUN -> [SKIP][210] ([i915#16066]) +18 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-1/igt@sriov_basic@bind-unbind-vf@vf-1.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- shard-rkl: NOTRUN -> [SKIP][211] ([i915#9917])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@sriov_basic@enable-vfs-autoprobe-on.html
#### Possible fixes ####
* igt@drm_read@short-buffer-nonblock:
- shard-dg1: [DMESG-WARN][212] ([i915#4423]) -> [PASS][213] +3 other tests pass
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-15/igt@drm_read@short-buffer-nonblock.html
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-18/igt@drm_read@short-buffer-nonblock.html
* igt@gem_eio@suspend:
- shard-rkl: [ABORT][214] ([i915#15131]) -> [PASS][215]
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@gem_eio@suspend.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@gem_eio@suspend.html
* igt@gem_exec_big@single:
- shard-rkl: [FAIL][216] ([i915#16604]) -> [PASS][217]
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@gem_exec_big@single.html
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@gem_exec_big@single.html
- shard-tglu: [FAIL][218] ([i915#15944]) -> [PASS][219]
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-tglu-5/igt@gem_exec_big@single.html
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-8/igt@gem_exec_big@single.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [ABORT][220] ([i915#5566]) -> [PASS][221]
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk5/igt@gen9_exec_parse@allowed-single.html
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk4/igt@gen9_exec_parse@allowed-single.html
* igt@i915_suspend@forcewake:
- shard-rkl: [INCOMPLETE][222] ([i915#4817]) -> [PASS][223] +1 other test pass
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@i915_suspend@forcewake.html
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@i915_suspend@forcewake.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: [FAIL][224] ([i915#15733] / [i915#5138]) -> [PASS][225] +1 other test pass
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-dg2: [ABORT][226] ([i915#15132]) -> [PASS][227]
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-10/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-7/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-rkl: [INCOMPLETE][228] ([i915#14694] / [i915#15582]) -> [PASS][229]
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
- shard-rkl: [FAIL][230] ([i915#15967]) -> [PASS][231]
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-1/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-rkl: [INCOMPLETE][232] ([i915#9878]) -> [PASS][233]
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-4/igt@kms_fbcon_fbt@fbc-suspend.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_force_connector_basic@prune-stale-modes:
- shard-mtlp: [SKIP][234] ([i915#15672]) -> [PASS][235] +1 other test pass
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-1/igt@kms_force_connector_basic@prune-stale-modes.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-3/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-rkl: [INCOMPLETE][236] ([i915#10056]) -> [PASS][237]
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-suspend.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-blt:
- shard-rkl: [SKIP][238] ([i915#15989]) -> [PASS][239] +14 other tests pass
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-blt.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen:
- shard-glk: [SKIP][240] -> [PASS][241] +9 other tests pass
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk3/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk8/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-cpu:
- shard-dg2: [SKIP][242] ([i915#15989]) -> [PASS][243] +2 other tests pass
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-5/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-cpu.html
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-10/igt@kms_frontbuffer_tracking@hdr-rgb101010-draw-mmap-cpu.html
* igt@kms_hdr@static-toggle:
- shard-rkl: [SKIP][244] ([i915#3555] / [i915#8228]) -> [PASS][245]
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_hdr@static-toggle.html
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_hdr@static-toggle.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg2: [SKIP][246] ([i915#15073]) -> [PASS][247]
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-1/igt@kms_pm_rpm@dpms-lpsp.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-4/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg1: [SKIP][248] ([i915#15073]) -> [PASS][249] +1 other test pass
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-15/igt@kms_pm_rpm@modeset-non-lpsp.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-18/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [SKIP][250] ([i915#15073]) -> [PASS][251] +2 other tests pass
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@perf@polling@0-rcs0:
- shard-tglu: [FAIL][252] ([i915#10538]) -> [PASS][253] +1 other test pass
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-tglu-9/igt@perf@polling@0-rcs0.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-7/igt@perf@polling@0-rcs0.html
* igt@perf_pmu@busy-double-start:
- shard-mtlp: [FAIL][254] ([i915#4349]) -> [PASS][255] +2 other tests pass
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-8/igt@perf_pmu@busy-double-start.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-3/igt@perf_pmu@busy-double-start.html
#### Warnings ####
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-rkl: [SKIP][256] ([i915#8411]) -> [SKIP][257] ([i915#14544] / [i915#8411])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@api_intel_bb@blit-reloc-purge-cache.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@dmabuf@all-tests:
- shard-rkl: [SKIP][258] ([i915#15931]) -> [SKIP][259] ([i915#14544] / [i915#15931])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@dmabuf@all-tests.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@dmabuf@all-tests.html
* igt@gem_bad_reloc@negative-reloc-lut:
- shard-rkl: [SKIP][260] ([i915#3281]) -> [SKIP][261] ([i915#14544] / [i915#3281]) +10 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_bad_reloc@negative-reloc-lut.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-rkl: [SKIP][262] ([i915#14544] / [i915#9323]) -> [SKIP][263] ([i915#9323])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_ccs@block-multicopy-compressed.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_close_race@multigpu-basic-process:
- shard-rkl: [SKIP][264] ([i915#14544] / [i915#7697]) -> [SKIP][265] ([i915#7697])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_close_race@multigpu-basic-process.html
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: [SKIP][266] ([i915#7697]) -> [SKIP][267] ([i915#14544] / [i915#7697])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@gem_close_race@multigpu-basic-threads.html
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-rkl: [SKIP][268] ([i915#6335]) -> [SKIP][269] ([i915#14544] / [i915#6335])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@gem_create@create-ext-cpu-access-sanity-check.html
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-rkl: [SKIP][270] ([i915#280]) -> [SKIP][271] ([i915#14544] / [i915#280])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@gem_ctx_sseu@invalid-sseu.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_eio@kms:
- shard-tglu: [ABORT][272] ([i915#13363]) -> [DMESG-WARN][273] ([i915#13363])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-tglu-2/igt@gem_eio@kms.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-tglu-3/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: [SKIP][274] ([i915#4525]) -> [SKIP][275] ([i915#14544] / [i915#4525]) +1 other test skip
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@gem_exec_balancer@parallel-balancer.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-rkl: [SKIP][276] ([i915#14544] / [i915#6334]) -> [SKIP][277] ([i915#6334]) +1 other test skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_exec_capture@capture-invisible@smem0.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_reloc@basic-write-cpu:
- shard-rkl: [SKIP][278] ([i915#14544] / [i915#3281]) -> [SKIP][279] ([i915#3281]) +2 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_exec_reloc@basic-write-cpu.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_exec_reloc@basic-write-cpu.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-rkl: [SKIP][280] ([i915#4613]) -> [SKIP][281] ([i915#14544] / [i915#4613]) +2 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@gem_lmem_swapping@parallel-multi.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_lmem_swapping@verify-ccs:
- shard-rkl: [SKIP][282] ([i915#14544] / [i915#4613]) -> [SKIP][283] ([i915#4613]) +1 other test skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_lmem_swapping@verify-ccs.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@gem_lmem_swapping@verify-ccs.html
* igt@gem_media_vme:
- shard-rkl: [SKIP][284] ([i915#284]) -> [SKIP][285] ([i915#14544] / [i915#284])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@gem_media_vme.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_media_vme.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-rkl: [SKIP][286] ([i915#13717]) -> [SKIP][287] ([i915#13717] / [i915#14544])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@gem_pxp@hw-rejects-pxp-buffer.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_readwrite@beyond-eob:
- shard-rkl: [SKIP][288] ([i915#14544] / [i915#3282]) -> [SKIP][289] ([i915#3282]) +1 other test skip
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gem_readwrite@beyond-eob.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@gem_readwrite@beyond-eob.html
* igt@gem_set_tiling_vs_pwrite:
- shard-rkl: [SKIP][290] ([i915#3282]) -> [SKIP][291] ([i915#14544] / [i915#3282]) +3 other tests skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@gem_set_tiling_vs_pwrite.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html
* igt@gem_softpin@noreloc-s3:
- shard-rkl: [ABORT][292] ([i915#15131]) -> [INCOMPLETE][293] ([i915#13809] / [i915#16226])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@gem_softpin@noreloc-s3.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gem_softpin@noreloc-s3.html
* igt@gen9_exec_parse@allowed-single:
- shard-rkl: [SKIP][294] ([i915#14544] / [i915#2527]) -> [SKIP][295] ([i915#2527]) +1 other test skip
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@gen9_exec_parse@allowed-single.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@batch-without-end:
- shard-rkl: [SKIP][296] ([i915#2527]) -> [SKIP][297] ([i915#14544] / [i915#2527]) +1 other test skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@gen9_exec_parse@batch-without-end.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@gen9_exec_parse@batch-without-end.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-rkl: [SKIP][298] ([i915#1769] / [i915#3555]) -> [SKIP][299] ([i915#14544] / [i915#1769] / [i915#3555]) +1 other test skip
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-rkl: [SKIP][300] ([i915#14544] / [i915#5286]) -> [SKIP][301] ([i915#5286]) +2 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-rkl: [SKIP][302] ([i915#5286]) -> [SKIP][303] ([i915#14544] / [i915#5286]) +3 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_big_fb@4-tiled-addfb.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-rkl: [SKIP][304] ([i915#14544] / [i915#3638]) -> [SKIP][305] ([i915#3638])
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-rkl: [SKIP][306] ([i915#12313] / [i915#14544]) -> [SKIP][307] ([i915#12313]) +1 other test skip
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][308] ([i915#6095]) -> [SKIP][309] ([i915#14544] / [i915#6095]) +11 other tests skip
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][310] ([i915#14544] / [i915#6095]) -> [SKIP][311] ([i915#6095]) +3 other tests skip
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2:
- shard-rkl: [SKIP][312] ([i915#14098] / [i915#6095]) -> [SKIP][313] ([i915#14098] / [i915#14544] / [i915#6095]) +15 other tests skip
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-rkl: [SKIP][314] ([i915#12313]) -> [SKIP][315] ([i915#12313] / [i915#14544]) +1 other test skip
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: [INCOMPLETE][316] ([i915#14694] / [i915#15582]) -> [INCOMPLETE][317] ([i915#15582]) +1 other test incomplete
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk3/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
- shard-rkl: [SKIP][318] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][319] ([i915#14098] / [i915#6095]) +3 other tests skip
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-rkl: [SKIP][320] ([i915#11151] / [i915#7828]) -> [SKIP][321] ([i915#11151] / [i915#14544] / [i915#7828]) +4 other tests skip
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-rkl: [SKIP][322] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][323] ([i915#11151] / [i915#7828]) +3 other tests skip
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-storm.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-rkl: [SKIP][324] ([i915#15330]) -> [SKIP][325] ([i915#14544] / [i915#15330]) +1 other test skip
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@srm:
- shard-rkl: [SKIP][326] ([i915#15865]) -> [SKIP][327] ([i915#14544] / [i915#15865]) +2 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_content_protection@srm.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent-hdcp14:
- shard-rkl: [SKIP][328] ([i915#14544] / [i915#15865]) -> [SKIP][329] ([i915#15865])
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_content_protection@uevent-hdcp14.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_content_protection@uevent-hdcp14.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-rkl: [SKIP][330] ([i915#13049] / [i915#14544]) -> [SKIP][331] ([i915#13049])
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-rkl: [SKIP][332] ([i915#3555]) -> [SKIP][333] ([i915#14544] / [i915#3555]) +1 other test skip
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_cursor_crc@cursor-sliding-max-size.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-dg1: [SKIP][334] -> [SKIP][335] ([i915#4423])
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-17/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-19/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-rkl: [SKIP][336] ([i915#4103]) -> [SKIP][337] ([i915#14544] / [i915#4103])
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-rkl: [SKIP][338] ([i915#9067]) -> [SKIP][339] ([i915#14544] / [i915#9067])
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_dsc@dsc-basic-ultrajoiner:
- shard-rkl: [SKIP][340] ([i915#16361]) -> [SKIP][341] ([i915#14544] / [i915#16361]) +2 other tests skip
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_dsc@dsc-basic-ultrajoiner.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_dsc@dsc-basic-ultrajoiner.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner:
- shard-rkl: [SKIP][342] ([i915#14544] / [i915#16361]) -> [SKIP][343] ([i915#16361]) +1 other test skip
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_dsc@dsc-fractional-bpp-with-bpc-ultrajoiner.html
* igt@kms_feature_discovery@display-4x:
- shard-rkl: [SKIP][344] ([i915#16081]) -> [SKIP][345] ([i915#14544] / [i915#16081])
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_feature_discovery@display-4x.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][346] ([i915#12314] / [i915#12745] / [i915#4839]) -> [INCOMPLETE][347] ([i915#12314] / [i915#12745] / [i915#4839] / [i915#6113])
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk8/igt@kms_flip@2x-flip-vs-suspend.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk5/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-rkl: [SKIP][348] ([i915#14544] / [i915#9934]) -> [SKIP][349] ([i915#9934]) +6 other tests skip
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_flip@2x-plain-flip-interruptible.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-rkl: [SKIP][350] ([i915#9934]) -> [SKIP][351] ([i915#14544] / [i915#9934]) +1 other test skip
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-glk: [INCOMPLETE][352] ([i915#12745] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][353] ([i915#12314] / [i915#12745] / [i915#4839])
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk3/igt@kms_flip@flip-vs-suspend.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk8/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
- shard-glk: [INCOMPLETE][354] ([i915#12745] / [i915#6113]) -> [INCOMPLETE][355] ([i915#12314] / [i915#12745])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-glk3/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-glk8/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-rkl: [SKIP][356] ([i915#15643]) -> [SKIP][357] ([i915#14544] / [i915#15643]) +2 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
- shard-dg1: [SKIP][358] ([i915#15643] / [i915#4423]) -> [SKIP][359] ([i915#15643])
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-mtlp: [SKIP][360] -> [SKIP][361] ([i915#15672])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-3/igt@kms_force_connector_basic@force-load-detect.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-1/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-msflip-blt:
- shard-dg1: [SKIP][362] ([i915#15989]) -> [SKIP][363] ([i915#15989] / [i915#4423])
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-17/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-msflip-blt.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-19/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][364] ([i915#14544] / [i915#1825]) -> [SKIP][365] ([i915#1825])
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-render:
- shard-dg1: [SKIP][366] ([i915#15102]) -> [SKIP][367] ([i915#15102] / [i915#4423])
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-render.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@hdr-suspend:
- shard-rkl: [INCOMPLETE][368] ([i915#16056]) -> [SKIP][369] ([i915#15989])
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_frontbuffer_tracking@hdr-suspend.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-2/igt@kms_frontbuffer_tracking@hdr-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][370] ([i915#14544] / [i915#15102]) -> [SKIP][371] ([i915#15102]) +8 other tests skip
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2: [SKIP][372] ([i915#15102]) -> [SKIP][373] ([i915#10433] / [i915#15102]) +1 other test skip
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-rkl: [SKIP][374] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][375] ([i915#15102] / [i915#3023]) +4 other tests skip
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
- shard-rkl: [SKIP][376] ([i915#15102] / [i915#3023]) -> [SKIP][377] ([i915#14544] / [i915#15102] / [i915#3023]) +11 other tests skip
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][378] ([i915#1825]) -> [SKIP][379] ([i915#14544] / [i915#1825]) +3 other tests skip
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
- shard-dg2: [SKIP][380] ([i915#10433] / [i915#15102]) -> [SKIP][381] ([i915#15102]) +5 other tests skip
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-rkl: [SKIP][382] -> [SKIP][383] ([i915#14544]) +54 other tests skip
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move:
- shard-rkl: [SKIP][384] ([i915#14544]) -> [SKIP][385] +34 other tests skip
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psrhdr-rgb101010-draw-blt:
- shard-rkl: [SKIP][386] ([i915#15102]) -> [SKIP][387] ([i915#14544] / [i915#15102]) +18 other tests skip
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_frontbuffer_tracking@psrhdr-rgb101010-draw-blt.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_frontbuffer_tracking@psrhdr-rgb101010-draw-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-mtlp: [SKIP][388] ([i915#12713] / [i915#16490]) -> [SKIP][389] ([i915#1187] / [i915#12713] / [i915#16490])
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-mtlp-3/igt@kms_hdr@brightness-with-hdr.html
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-mtlp-1/igt@kms_hdr@brightness-with-hdr.html
- shard-dg1: [SKIP][390] ([i915#12713]) -> [SKIP][391] ([i915#1187] / [i915#12713])
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-12/igt@kms_hdr@brightness-with-hdr.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-rkl: [SKIP][392] ([i915#15460]) -> [SKIP][393] ([i915#14544] / [i915#15460])
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_joiner@invalid-modeset-big-joiner.html
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-rkl: [SKIP][394] ([i915#14544] / [i915#16451]) -> [SKIP][395] ([i915#16451])
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_mst@mst-suspend-read-crc.html
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-rkl: [SKIP][396] ([i915#14544] / [i915#6301]) -> [SKIP][397] ([i915#6301])
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_panel_fitting@atomic-fastset.html
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pipe_stress@stress-xrgb8888-yftiled:
- shard-rkl: [SKIP][398] ([i915#14712]) -> [SKIP][399] ([i915#14544] / [i915#14712])
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
- shard-rkl: [SKIP][400] ([i915#14544] / [i915#15709]) -> [SKIP][401] ([i915#15709]) +1 other test skip
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
- shard-rkl: [SKIP][402] ([i915#15709]) -> [SKIP][403] ([i915#14544] / [i915#15709]) +1 other test skip
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
* igt@kms_plane_lowres@tiling-yf:
- shard-rkl: [SKIP][404] ([i915#14544] / [i915#3555]) -> [SKIP][405] ([i915#3555]) +3 other tests skip
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_plane_lowres@tiling-yf.html
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-rkl: [SKIP][406] ([i915#13958]) -> [SKIP][407] ([i915#13958] / [i915#14544])
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_plane_multiple@2x-tiling-none.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
- shard-rkl: [SKIP][408] ([i915#15329]) -> [SKIP][409] ([i915#14544] / [i915#15329]) +3 other tests skip
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
* igt@kms_pm_dc@dc5-psr:
- shard-rkl: [SKIP][410] ([i915#15948]) -> [SKIP][411] ([i915#14544] / [i915#15948])
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-3/igt@kms_pm_dc@dc5-psr.html
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][412] ([i915#3828]) -> [SKIP][413] ([i915#9340])
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-2/igt@kms_pm_lpsp@kms-lpsp.html
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
- shard-dg1: [SKIP][414] ([i915#3828]) -> [SKIP][415] ([i915#9340])
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-14/igt@kms_pm_lpsp@kms-lpsp.html
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-17/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@package-g7:
- shard-rkl: [SKIP][416] ([i915#15403]) -> [SKIP][417] ([i915#14544] / [i915#15403])
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_pm_rpm@package-g7.html
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_pm_rpm@package-g7.html
* igt@kms_prime@basic-crc-hybrid:
- shard-rkl: [SKIP][418] ([i915#6524]) -> [SKIP][419] ([i915#14544] / [i915#6524])
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@kms_prime@basic-crc-hybrid.html
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
- shard-rkl: [SKIP][420] ([i915#11520]) -> [SKIP][421] ([i915#11520] / [i915#14544]) +7 other tests skip
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-rkl: [SKIP][422] ([i915#11520] / [i915#14544]) -> [SKIP][423] ([i915#11520]) +5 other tests skip
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-rkl: [SKIP][424] ([i915#9683]) -> [SKIP][425] ([i915#14544] / [i915#9683])
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_psr2_su@page_flip-nv12.html
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-pr-sprite-plane-onoff:
- shard-rkl: [SKIP][426] ([i915#1072] / [i915#9732]) -> [SKIP][427] ([i915#1072] / [i915#14544] / [i915#9732]) +12 other tests skip
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
* igt@kms_psr@pr-basic:
- shard-rkl: [SKIP][428] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][429] ([i915#1072] / [i915#9732]) +4 other tests skip
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_psr@pr-basic.html
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-4/igt@kms_psr@pr-basic.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-rkl: [SKIP][430] ([i915#14544] / [i915#5289]) -> [SKIP][431] ([i915#5289])
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-dg1: [SKIP][432] ([i915#5289]) -> [SKIP][433] ([i915#4423] / [i915#5289])
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg1-17/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg1-19/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2: [SKIP][434] ([i915#12755] / [i915#15867]) -> [SKIP][435] ([i915#15867])
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-dg2-5/igt@kms_rotation_crc@primary-rotation-90.html
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-dg2-10/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-rkl: [SKIP][436] ([i915#8623]) -> [SKIP][437] ([i915#14544] / [i915#8623])
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@kms_tiled_display@basic-test-pattern.html
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@flip-suspend:
- shard-rkl: [SKIP][438] ([i915#15243] / [i915#3555]) -> [SKIP][439] ([i915#14544] / [i915#15243] / [i915#3555])
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-1/igt@kms_vrr@flip-suspend.html
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@kms_vrr@flip-suspend.html
* igt@perf@per-context-mode-unprivileged:
- shard-rkl: [SKIP][440] ([i915#2435]) -> [SKIP][441] ([i915#14544] / [i915#2435])
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-5/igt@perf@per-context-mode-unprivileged.html
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@perf@per-context-mode-unprivileged.html
* igt@prime_udl@share-import:
- shard-rkl: [SKIP][442] ([i915#16420]) -> [SKIP][443] ([i915#14544] / [i915#16420])
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@prime_udl@share-import.html
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@prime_udl@share-import.html
* igt@prime_vgem@basic-fence-read:
- shard-rkl: [SKIP][444] ([i915#3291] / [i915#3708]) -> [SKIP][445] ([i915#14544] / [i915#3291] / [i915#3708])
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@prime_vgem@basic-fence-read.html
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@coherency-gtt:
- shard-rkl: [SKIP][446] ([i915#3708]) -> [SKIP][447] ([i915#14544] / [i915#3708])
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-7/igt@prime_vgem@coherency-gtt.html
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-6/igt@prime_vgem@coherency-gtt.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-rkl: [SKIP][448] ([i915#14544] / [i915#9917]) -> [SKIP][449] ([i915#9917]) +1 other test skip
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18809/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/shard-rkl-7/igt@sriov_basic@enable-vfs-autoprobe-off.html
[i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538
[i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
[i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#13029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
[i915#13196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13196
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13363]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13363
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
[i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
[i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
[i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14586]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14586
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
[i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
[i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15391
[i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
[i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
[i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15638
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15722]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15722
[i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
[i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
[i915#15931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15931
[i915#15944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15944
[i915#15948]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15948
[i915#15967]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15967
[i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
[i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
[i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
[i915#16056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16056
[i915#16066]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16066
[i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
[i915#16112]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16112
[i915#16182]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16182
[i915#16226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16226
[i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16386
[i915#16420]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16420
[i915#16451]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16451
[i915#16466]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16466
[i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
[i915#16479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16479
[i915#16490]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16490
[i915#16503]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16503
[i915#16593]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16593
[i915#16604]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16604
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
[i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5566
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
[i915#7443]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7443
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_18809 -> Patchwork_162788v5
CI-20190529: 20190529
CI_DRM_18809: f8ed2f7559466d59169b7a840c2403a0d4614f88 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9002: 9002
Patchwork_162788v5: f8ed2f7559466d59169b7a840c2403a0d4614f88 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162788v5/index.html
[-- Attachment #2: Type: text/html, Size: 171733 bytes --]
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end of thread, other threads:[~2026-07-13 10:24 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-13 5:15 [CI v4 00/14] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 01/14] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-07-13 5:48 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 02/14] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-07-13 6:01 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 03/14] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 04/14] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 05/14] drm/i915/display: Track CSC mode in intel plane state Chaitanya Kumar Borah
2026-07-13 5:59 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 06/14] drm/i915/display: Program input CSC on SDR planes Chaitanya Kumar Borah
2026-07-13 6:01 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 07/14] drm/i915/color: Add YCbCr limited-to-full range color block support Chaitanya Kumar Borah
2026-07-13 5:55 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 08/14] drm/i915/color: Add YUV range correction to SDR plane pipeline Chaitanya Kumar Borah
2026-07-13 5:55 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 09/14] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-07-13 5:56 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 10/14] drm/i915/color: Extract HDR pre-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 11/14] drm/i915/color: Program Pre-CSC registers for SDR Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 12/14] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-07-13 5:15 ` [CI v4 13/14] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-07-13 6:05 ` sashiko-bot
2026-07-13 5:15 ` [CI v4 14/14] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-07-13 5:59 ` sashiko-bot
2026-07-13 5:50 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev5) Patchwork
2026-07-13 6:34 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-13 6:51 ` ✓ i915.CI.BAT: " Patchwork
2026-07-13 8:29 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-07-13 10:24 ` ✗ i915.CI.Full: " Patchwork
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