From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, lee@kernel.org,
conor+dt@kernel.org, neil.armstrong@linaro.org,
linux-phy@lists.infradead.org, vkoul@kernel.org,
olteanv@gmail.com, mfd@lists.linux.dev
Subject: Re: [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure
Date: Mon, 27 Jul 2026 18:52:54 +0000 [thread overview]
Message-ID: <20260727185255.60FD51F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260727-zx29clk-v8-5-7a107b00f1dd@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The ID sanity check incorrectly triggers a WARN_ON and fails the probe if the driver does not export any clocks.
--
--- Patch [5]: [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure ---
commit a84018498091df350796aad9d7173588a10fa7ef
Author: Stefan Dösinger <stefandoesinger@gmail.com>
clk: zte: Add Clock registration infrastructure
This commit adds common clock registration infrastructure and helpers for
ZTE SoCs. It includes support for registering PLLs, muxes, dividers, and
gates, handling both exported and internal clocks.
> diff --git a/drivers/clk/zte/clk-zx.c b/drivers/clk/zte/clk-zx.c
> new file mode 100644
> index 0000000000000..c9e9048d3ade3
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.c
[ ... ]
> +int zx_clk_common_probe(struct device *dev, struct device_node *of_node,
> + const struct zx_clk_data *data)
> +{
> + unsigned int public_clk_count = 0, highest_id = 0;
> + struct clk_hw_onecell_data *clocks;
> + struct regmap *map;
> + struct clk *clk;
> + unsigned int i;
> + int res;
> +
> + map = device_node_to_regmap(of_node);
> + if (IS_ERR(map))
> + return PTR_ERR(map);
> +
> + for (i = 0; i < data->num_muxes; ++i) {
> + if (data->muxes[i].id != ZX297520V3_CLK_NO_EXPORT) {
> + if (data->muxes[i].id > highest_id)
> + highest_id = data->muxes[i].id;
> + public_clk_count++;
> + }
> + }
> + for (i = 0; i < data->num_gates; ++i) {
> + if (data->gates[i].id != ZX297520V3_CLK_NO_EXPORT) {
> + if (data->gates[i].id > highest_id)
> + highest_id = data->gates[i].id;
> + public_clk_count++;
> + }
> + }
> +
> + if (WARN_ON(public_clk_count != highest_id + 1))
> + return -EINVAL;
[Severity: Medium]
Does this check unintentionally fail the probe if a driver doesn't export
any clocks?
Since highest_id is initialized to 0, if there are no exported clocks
public_clk_count will be 0. The check (0 != 0 + 1) evaluates to true,
triggering the WARN_ON and returning -EINVAL.
Perhaps highest_id could be initialized to ~0U instead, or a check could be
added to bypass this when public_clk_count is 0?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260727-zx29clk-v8-0-7a107b00f1dd@gmail.com?part=5
--
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linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, lee@kernel.org,
conor+dt@kernel.org, neil.armstrong@linaro.org,
linux-phy@lists.infradead.org, vkoul@kernel.org,
olteanv@gmail.com, mfd@lists.linux.dev
Subject: Re: [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure
Date: Mon, 27 Jul 2026 18:52:54 +0000 [thread overview]
Message-ID: <20260727185255.60FD51F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260727-zx29clk-v8-5-7a107b00f1dd@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The ID sanity check incorrectly triggers a WARN_ON and fails the probe if the driver does not export any clocks.
--
--- Patch [5]: [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure ---
commit a84018498091df350796aad9d7173588a10fa7ef
Author: Stefan Dösinger <stefandoesinger@gmail.com>
clk: zte: Add Clock registration infrastructure
This commit adds common clock registration infrastructure and helpers for
ZTE SoCs. It includes support for registering PLLs, muxes, dividers, and
gates, handling both exported and internal clocks.
> diff --git a/drivers/clk/zte/clk-zx.c b/drivers/clk/zte/clk-zx.c
> new file mode 100644
> index 0000000000000..c9e9048d3ade3
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.c
[ ... ]
> +int zx_clk_common_probe(struct device *dev, struct device_node *of_node,
> + const struct zx_clk_data *data)
> +{
> + unsigned int public_clk_count = 0, highest_id = 0;
> + struct clk_hw_onecell_data *clocks;
> + struct regmap *map;
> + struct clk *clk;
> + unsigned int i;
> + int res;
> +
> + map = device_node_to_regmap(of_node);
> + if (IS_ERR(map))
> + return PTR_ERR(map);
> +
> + for (i = 0; i < data->num_muxes; ++i) {
> + if (data->muxes[i].id != ZX297520V3_CLK_NO_EXPORT) {
> + if (data->muxes[i].id > highest_id)
> + highest_id = data->muxes[i].id;
> + public_clk_count++;
> + }
> + }
> + for (i = 0; i < data->num_gates; ++i) {
> + if (data->gates[i].id != ZX297520V3_CLK_NO_EXPORT) {
> + if (data->gates[i].id > highest_id)
> + highest_id = data->gates[i].id;
> + public_clk_count++;
> + }
> + }
> +
> + if (WARN_ON(public_clk_count != highest_id + 1))
> + return -EINVAL;
[Severity: Medium]
Does this check unintentionally fail the probe if a driver doesn't export
any clocks?
Since highest_id is initialized to 0, if there are no exported clocks
public_clk_count will be 0. The check (0 != 0 + 1) evaluates to true,
triggering the WARN_ON and returning -EINVAL.
Perhaps highest_id could be initialized to ~0U instead, or a check could be
added to bypass this when public_clk_count is 0?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260727-zx29clk-v8-0-7a107b00f1dd@gmail.com?part=5
next prev parent reply other threads:[~2026-07-27 18:52 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 18:24 [PATCH v8 00/12] ZTE zx297520v3 clock bindings and driver Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:24 ` [PATCH v8 01/12] dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:32 ` sashiko-bot
2026-07-27 18:32 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 02/12] dt-bindings: clk: zte: Add zx297520v3 matrix " Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:34 ` sashiko-bot
2026-07-27 18:34 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP " Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:36 ` sashiko-bot
2026-07-27 18:36 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 04/12] mfd: zx297520v3: Add a clock and reset MFD driver Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:41 ` sashiko-bot
2026-07-27 18:41 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 05/12] clk: zte: Add Clock registration infrastructure Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 18:52 ` sashiko-bot [this message]
2026-07-27 18:52 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 06/12] clk: zte: Add regmap-based clocks Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:03 ` sashiko-bot
2026-07-27 19:03 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 07/12] clk: zte: Add zx PLL support infrastructure Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:15 ` sashiko-bot
2026-07-27 19:15 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 08/12] clk: zte: Introduce a driver for zx297520v3 top clocks Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:29 ` sashiko-bot
2026-07-27 19:29 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 09/12] clk: zte: Introduce a driver for zx297520v3 matrix clocks Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:41 ` sashiko-bot
2026-07-27 19:41 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 10/12] clk: zte: Introduce a driver for zx297520v3 LSP clocks Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:46 ` sashiko-bot
2026-07-27 19:46 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 11/12] reset: zte: Add a zx297520v3 reset driver Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 19:59 ` sashiko-bot
2026-07-27 19:59 ` sashiko-bot
2026-07-27 18:24 ` [PATCH v8 12/12] ARM: dts: zte: Declare zx297520v3 CRM device nodes Stefan Dösinger
2026-07-27 18:24 ` Stefan Dösinger
2026-07-27 20:13 ` sashiko-bot
2026-07-27 20:13 ` sashiko-bot
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