From: David Laight <david.laight.linux@gmail.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, ada.coupriediaz@arm.com,
ardb@kernel.org, catalin.marinas@arm.com, hca@linux.ibm.com,
linux-kernel@vger.kernel.org, maz@kernel.org,
peterz@infradead.org, ruanjinjie@huawei.com,
vladimir.murzin@arm.com, will@kernel.org,
yang@os.amperecomputing.com
Subject: Re: [RFC PATCH 07/13] arm64: percpu: Implement preemptible read/write ops
Date: Tue, 28 Jul 2026 22:47:55 +0100 [thread overview]
Message-ID: <20260728224755.59cfd22d@pumpkin> (raw)
In-Reply-To: <20260728123859.2911495-8-mark.rutland@arm.com>
On Tue, 28 Jul 2026 13:38:53 +0100
Mark Rutland <mark.rutland@arm.com> wrote:
> Use the PCPU GPR infrastructure to implement preemptible this_cpu_read()
> and this_cpu_write().
...
> #define this_cpu_write_1(pcp, val) \
> - _pcp_protect(__percpu_write_8, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_8, pcp, (unsigned long)val)
Not new, but does that end up sign extending 'val' which is likely
to be more expensive than zero extending it?
Using '(val) + 0u + 0ul' might generate better code in some cases.
Just noticed it should be (unsigned long)(val) as well.
Otherwise this_cpu_write_n(pcp, -7 / 4) isn't going to DTRT.
David
> #define this_cpu_write_2(pcp, val) \
> - _pcp_protect(__percpu_write_16, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_16, pcp, (unsigned long)val)
> #define this_cpu_write_4(pcp, val) \
> - _pcp_protect(__percpu_write_32, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_32, pcp, (unsigned long)val)
> #define this_cpu_write_8(pcp, val) \
> - _pcp_protect(__percpu_write_64, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_64, pcp, (unsigned long)val)
>
> #define this_cpu_add_1(pcp, val) \
> _pcp_protect(__percpu_add_case_8, pcp, val)
WARNING: multiple messages have this Message-ID (diff)
From: David Laight <david.laight.linux@gmail.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: vladimir.murzin@arm.com, peterz@infradead.org,
catalin.marinas@arm.com, hca@linux.ibm.com,
linux-kernel@vger.kernel.org, ruanjinjie@huawei.com,
yang@os.amperecomputing.com, maz@kernel.org, will@kernel.org,
ardb@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 07/13] arm64: percpu: Implement preemptible read/write ops
Date: Tue, 28 Jul 2026 22:47:55 +0100 [thread overview]
Message-ID: <20260728224755.59cfd22d@pumpkin> (raw)
In-Reply-To: <20260728123859.2911495-8-mark.rutland@arm.com>
On Tue, 28 Jul 2026 13:38:53 +0100
Mark Rutland <mark.rutland@arm.com> wrote:
> Use the PCPU GPR infrastructure to implement preemptible this_cpu_read()
> and this_cpu_write().
...
> #define this_cpu_write_1(pcp, val) \
> - _pcp_protect(__percpu_write_8, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_8, pcp, (unsigned long)val)
Not new, but does that end up sign extending 'val' which is likely
to be more expensive than zero extending it?
Using '(val) + 0u + 0ul' might generate better code in some cases.
Just noticed it should be (unsigned long)(val) as well.
Otherwise this_cpu_write_n(pcp, -7 / 4) isn't going to DTRT.
David
> #define this_cpu_write_2(pcp, val) \
> - _pcp_protect(__percpu_write_16, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_16, pcp, (unsigned long)val)
> #define this_cpu_write_4(pcp, val) \
> - _pcp_protect(__percpu_write_32, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_32, pcp, (unsigned long)val)
> #define this_cpu_write_8(pcp, val) \
> - _pcp_protect(__percpu_write_64, pcp, (unsigned long)val)
> + _pcp_wrap(__percpu_write_64, pcp, (unsigned long)val)
>
> #define this_cpu_add_1(pcp, val) \
> _pcp_protect(__percpu_add_case_8, pcp, val)
next prev parent reply other threads:[~2026-07-28 21:47 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 12:38 [RFC PATCH 00/13] arm64: Preemptible this_cpu_*() operations Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 01/13] arm64: preempt: Simplify and optimize __preempt_count_dec_and_test() Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 02/13] arm64: preempt: Treat should_resched() as unlikely Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 03/13] arm64: ptrace: Always inline pt_regs_[read,write}_reg() Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 04/13] arm64: percpu: Factor out percpu offset asm Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 05/13] arm64: gpr-num: Add wxN aliases for wN registers Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 06/13] arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 14:19 ` Peter Zijlstra
2026-07-28 14:19 ` Peter Zijlstra
2026-07-28 14:30 ` Peter Zijlstra
2026-07-28 14:30 ` Peter Zijlstra
2026-07-28 16:03 ` Mark Rutland
2026-07-28 16:03 ` Mark Rutland
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 15:53 ` Mark Rutland
2026-07-28 15:53 ` Mark Rutland
2026-07-28 16:46 ` Peter Zijlstra
2026-07-28 16:46 ` Peter Zijlstra
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 16:51 ` Heiko Carstens
2026-07-28 16:51 ` Heiko Carstens
2026-07-28 12:38 ` [RFC PATCH 07/13] arm64: percpu: Implement preemptible read/write ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 21:47 ` David Laight [this message]
2026-07-28 21:47 ` David Laight
2026-07-28 22:05 ` David Laight
2026-07-28 22:05 ` David Laight
2026-07-28 12:38 ` [RFC PATCH 08/13] arm64: percpu: Implement preemptible void RMW ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 09/13] arm64: percpu: Implement preemptible return " Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 10/13] arm64: percpu: Implement preemptible XCHG ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 11/13] arm64: percpu: Implement preemptible CMPXCHG ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 12/13] arm64: percpu: Implement preemptible CMPXCHG128 ops Mark Rutland
2026-07-28 12:38 ` Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 13/13] arm64: percpu: Remove _pcp_protect*() wrappers Mark Rutland
2026-07-28 12:38 ` Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260728224755.59cfd22d@pumpkin \
--to=david.laight.linux@gmail.com \
--cc=ada.coupriediaz@arm.com \
--cc=ardb@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=hca@linux.ibm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=peterz@infradead.org \
--cc=ruanjinjie@huawei.com \
--cc=vladimir.murzin@arm.com \
--cc=will@kernel.org \
--cc=yang@os.amperecomputing.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.