All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: conor+dt@kernel.org, mfd@lists.linux.dev, olteanv@gmail.com,
	lee@kernel.org, linux-phy@lists.infradead.org, vkoul@kernel.org,
	devicetree@vger.kernel.org, neil.armstrong@linaro.org,
	robh@kernel.org
Subject: Re: [PATCH v10 05/12] clk: zte: Add Clock registration infrastructure
Date: Mon, 10 Aug 2026 07:17:31 +0000	[thread overview]
Message-ID: <20260810071731.97B851F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260810-zx29clk-v10-5-63846490712c@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The clock driver fails to pass the explicit `of_node` down to the clock registration functions, causing the Common Clock Framework (CCF) to fall back to the child device's `dev->of_node` and breaking parent clock resolution.
--

--- Patch [5]: [PATCH v10 05/12] clk: zte: Add Clock registration infrastructure ---
commit 796448cb70bee510176b9b976cf13443c5e9c07b
Author: Stefan Dösinger <stefandoesinger@gmail.com>

clk: zte: Add Clock registration infrastructure
    
This patch adds the common clock registration infrastructure for ZTE SoCs.
It prepares for regmap clocks and PLL drivers to be implemented in subsequent
patches. The implementation allows the clock driver to act as an MFD child.

> diff --git a/drivers/clk/zte/clk-zx.c b/drivers/clk/zte/clk-zx.c
> index 0000000000000..aef0f7c753e64 100644
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.c
> @@ -0,0 +1,192 @@

[ ... ]

> +static struct clk_hw *zx_clk_register_fixed_div(struct device *dev,
> +						const struct zx_fixed_divider_desc *desc,
> +						struct clk_hw * const *clocks)
> +{
> +	const struct zx_parent_desc *p = &desc->parent;
> +
> +	switch (p->type) {
> +	case ZX_PARENT_FW:
> +		return devm_clk_hw_register_fixed_factor_fwname(dev, NULL, desc->name, p->fw_name,
                                                                     ^^^^

[Severity: High]
Does passing NULL for the fw_node parameter here force the Common Clock
Framework to fall back to dev->of_node?

Since this driver probes as an MFD child, dev->of_node is typically NULL or a
child node without the clock-names property. If CCF looks for the clock-names
property in the wrong device node, it could cause parent clock dependencies
defined via fw_name to fail to resolve, leaving the clocks orphaned.

> +								CLK_SET_RATE_PARENT, 1, desc->div);
> +
> +	case ZX_PARENT_ID:

[ ... ]

> +int zx_clk_common_probe(struct device *dev, struct device_node *of_node,
> +			const struct zx_clk_data *data)
> +{

[ ... ]

> +	for (i = 0; i < data->num_clocks; ++i) {
> +		struct clk_hw *hw;
> +
> +		switch (data->clocks[i].type) {
> +		case ZX_CLOCK_PLL:
> +			hw = zx_clk_register_pll(dev, map, &data->clocks[i].pll, clocks);

[Severity: High]
Should the explicit of_node parameter be passed down to the clock registration
functions inside this loop?

The of_node is correctly accepted by zx_clk_common_probe() and used for
validation, but it is dropped when dispatching to the registration functions.

> +			break;
> +
> +		case ZX_CLOCK_FIXED_DIV:
> +			hw = zx_clk_register_fixed_div(dev, &data->clocks[i].fixed_div, clocks);
> +			break;
> +
> +		case ZX_CLOCK_MUX:

[ ... ]

> diff --git a/drivers/clk/zte/clk-zx.h b/drivers/clk/zte/clk-zx.h
> index 0000000000000..8137185f497f7 100644
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.h
> @@ -0,0 +1,137 @@

[ ... ]

> +struct zx_clock {
> +	enum zx_clock_type type;
> +	union {
> +		struct zx_pll_desc pll;
> +		struct zx_fixed_divider_desc fixed_div;
> +		struct zx_mux_desc mux;
> +		struct zx_div_desc div;
> +		struct zx_gate_desc gate;
> +	};
> +};
> +
> +struct clk_hw *zx_clk_register_pll(struct device *dev, struct regmap *regmap,
> +				   const struct zx_pll_desc *desc,
> +				   struct clk_hw * const *clocks);

[Severity: High]
Does this function signature need to include the of_node parameter?

Currently, the of_node parameter is completely omitted here. This guarantees
that future implementations, such as PLL and Mux registration functions, will
also fail to pass the correct node to the Common Clock Framework.

> +struct clk_hw *zx_clk_register_mux(struct device *dev, struct regmap *regmap,
> +				   const struct zx_mux_desc *desc,
> +				   struct clk_hw * const *clocks);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260810-zx29clk-v10-0-63846490712c@gmail.com?part=5

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Stefan Dösinger" <stefandoesinger@gmail.com>
Cc: conor+dt@kernel.org, mfd@lists.linux.dev, olteanv@gmail.com,
	lee@kernel.org, linux-phy@lists.infradead.org, vkoul@kernel.org,
	devicetree@vger.kernel.org, neil.armstrong@linaro.org,
	robh@kernel.org
Subject: Re: [PATCH v10 05/12] clk: zte: Add Clock registration infrastructure
Date: Mon, 10 Aug 2026 07:17:31 +0000	[thread overview]
Message-ID: <20260810071731.97B851F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260810-zx29clk-v10-5-63846490712c@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The clock driver fails to pass the explicit `of_node` down to the clock registration functions, causing the Common Clock Framework (CCF) to fall back to the child device's `dev->of_node` and breaking parent clock resolution.
--

--- Patch [5]: [PATCH v10 05/12] clk: zte: Add Clock registration infrastructure ---
commit 796448cb70bee510176b9b976cf13443c5e9c07b
Author: Stefan Dösinger <stefandoesinger@gmail.com>

clk: zte: Add Clock registration infrastructure
    
This patch adds the common clock registration infrastructure for ZTE SoCs.
It prepares for regmap clocks and PLL drivers to be implemented in subsequent
patches. The implementation allows the clock driver to act as an MFD child.

> diff --git a/drivers/clk/zte/clk-zx.c b/drivers/clk/zte/clk-zx.c
> index 0000000000000..aef0f7c753e64 100644
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.c
> @@ -0,0 +1,192 @@

[ ... ]

> +static struct clk_hw *zx_clk_register_fixed_div(struct device *dev,
> +						const struct zx_fixed_divider_desc *desc,
> +						struct clk_hw * const *clocks)
> +{
> +	const struct zx_parent_desc *p = &desc->parent;
> +
> +	switch (p->type) {
> +	case ZX_PARENT_FW:
> +		return devm_clk_hw_register_fixed_factor_fwname(dev, NULL, desc->name, p->fw_name,
                                                                     ^^^^

[Severity: High]
Does passing NULL for the fw_node parameter here force the Common Clock
Framework to fall back to dev->of_node?

Since this driver probes as an MFD child, dev->of_node is typically NULL or a
child node without the clock-names property. If CCF looks for the clock-names
property in the wrong device node, it could cause parent clock dependencies
defined via fw_name to fail to resolve, leaving the clocks orphaned.

> +								CLK_SET_RATE_PARENT, 1, desc->div);
> +
> +	case ZX_PARENT_ID:

[ ... ]

> +int zx_clk_common_probe(struct device *dev, struct device_node *of_node,
> +			const struct zx_clk_data *data)
> +{

[ ... ]

> +	for (i = 0; i < data->num_clocks; ++i) {
> +		struct clk_hw *hw;
> +
> +		switch (data->clocks[i].type) {
> +		case ZX_CLOCK_PLL:
> +			hw = zx_clk_register_pll(dev, map, &data->clocks[i].pll, clocks);

[Severity: High]
Should the explicit of_node parameter be passed down to the clock registration
functions inside this loop?

The of_node is correctly accepted by zx_clk_common_probe() and used for
validation, but it is dropped when dispatching to the registration functions.

> +			break;
> +
> +		case ZX_CLOCK_FIXED_DIV:
> +			hw = zx_clk_register_fixed_div(dev, &data->clocks[i].fixed_div, clocks);
> +			break;
> +
> +		case ZX_CLOCK_MUX:

[ ... ]

> diff --git a/drivers/clk/zte/clk-zx.h b/drivers/clk/zte/clk-zx.h
> index 0000000000000..8137185f497f7 100644
> --- /dev/null
> +++ b/drivers/clk/zte/clk-zx.h
> @@ -0,0 +1,137 @@

[ ... ]

> +struct zx_clock {
> +	enum zx_clock_type type;
> +	union {
> +		struct zx_pll_desc pll;
> +		struct zx_fixed_divider_desc fixed_div;
> +		struct zx_mux_desc mux;
> +		struct zx_div_desc div;
> +		struct zx_gate_desc gate;
> +	};
> +};
> +
> +struct clk_hw *zx_clk_register_pll(struct device *dev, struct regmap *regmap,
> +				   const struct zx_pll_desc *desc,
> +				   struct clk_hw * const *clocks);

[Severity: High]
Does this function signature need to include the of_node parameter?

Currently, the of_node parameter is completely omitted here. This guarantees
that future implementations, such as PLL and Mux registration functions, will
also fail to pass the correct node to the Common Clock Framework.

> +struct clk_hw *zx_clk_register_mux(struct device *dev, struct regmap *regmap,
> +				   const struct zx_mux_desc *desc,
> +				   struct clk_hw * const *clocks);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260810-zx29clk-v10-0-63846490712c@gmail.com?part=5

  reply	other threads:[~2026-08-10  7:17 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-09 21:28 [PATCH v10 00/12] ZTE zx297520v3 clock bindings and driver Stefan Dösinger
2026-08-09 21:28 ` Stefan Dösinger
2026-08-09 21:28 ` [PATCH v10 01/12] dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:12   ` sashiko-bot
2026-08-10  7:12     ` sashiko-bot
2026-08-10 15:38     ` Rob Herring
2026-08-10 15:38       ` Rob Herring
2026-08-10 18:49       ` Stefan Dösinger
2026-08-10 18:49         ` Stefan Dösinger
2026-08-09 21:28 ` [PATCH v10 02/12] dt-bindings: clk: zte: Add zx297520v3 matrix " Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:07   ` sashiko-bot
2026-08-10  7:07     ` sashiko-bot
2026-08-09 21:28 ` [PATCH v10 03/12] dt-bindings: clk: zte: Add zx297520v3 LSP " Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:05   ` sashiko-bot
2026-08-10  7:05     ` sashiko-bot
2026-08-09 21:28 ` [PATCH v10 04/12] mfd: zx297520v3: Add a clock and reset MFD driver Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:10   ` sashiko-bot
2026-08-10  7:10     ` sashiko-bot
2026-08-09 21:28 ` [PATCH v10 05/12] clk: zte: Add Clock registration infrastructure Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:17   ` sashiko-bot [this message]
2026-08-10  7:17     ` sashiko-bot
2026-08-10 21:47   ` Brian Masney
2026-08-10 21:47     ` Brian Masney
2026-08-09 21:28 ` [PATCH v10 06/12] clk: zte: Add regmap-based clocks Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:10   ` sashiko-bot
2026-08-10  7:10     ` sashiko-bot
2026-08-09 21:28 ` [PATCH v10 07/12] clk: zte: Add zx PLL support infrastructure Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:13   ` sashiko-bot
2026-08-10  7:13     ` sashiko-bot
2026-08-10 21:56   ` Brian Masney
2026-08-10 21:56     ` Brian Masney
2026-08-09 21:28 ` [PATCH v10 08/12] clk: zte: Introduce a driver for zx297520v3 top clocks Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:15   ` sashiko-bot
2026-08-10  7:15     ` sashiko-bot
2026-08-10 21:58   ` Brian Masney
2026-08-10 21:58     ` Brian Masney
2026-08-09 21:28 ` [PATCH v10 09/12] clk: zte: Introduce a driver for zx297520v3 matrix clocks Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:14   ` sashiko-bot
2026-08-10  7:14     ` sashiko-bot
2026-08-10 21:59   ` Brian Masney
2026-08-10 21:59     ` Brian Masney
2026-08-09 21:28 ` [PATCH v10 10/12] clk: zte: Introduce a driver for zx297520v3 LSP clocks Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:10   ` sashiko-bot
2026-08-10  7:10     ` sashiko-bot
2026-08-10 21:59   ` Brian Masney
2026-08-10 21:59     ` Brian Masney
2026-08-09 21:28 ` [PATCH v10 11/12] reset: zte: Add a zx297520v3 reset driver Stefan Dösinger
2026-08-09 21:28   ` Stefan Dösinger
2026-08-10  7:15   ` sashiko-bot
2026-08-10  7:15     ` sashiko-bot
2026-08-10  7:03 ` [PATCH v10 12/12] ARM: dts: zte: Declare zx297520v3 CRM device nodes Stefan Dösinger
2026-08-10  7:03   ` Stefan Dösinger
2026-08-10  7:11   ` sashiko-bot
2026-08-10  7:11     ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260810071731.97B851F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=lee@kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=mfd@lists.linux.dev \
    --cc=neil.armstrong@linaro.org \
    --cc=olteanv@gmail.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    --cc=stefandoesinger@gmail.com \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.