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From: Jason Gunthorpe <jgg@nvidia.com>
To: Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
	Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com>,
	Mostafa Saleh <smostafa@google.com>,
	iommu@lists.linux.dev, "Joerg Roedel (AMD)" <joro@8bytes.org>,
	Jean-Philippe Brucker <jpb@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	David Matlack <dmatlack@google.com>,
	Pasha Tatashin <pasha.tatashin@soleen.com>,
	patches@lists.linux.dev, Pranjal Shrivastava <praan@google.com>,
	Samiullah Khawaja <skhawaja@google.com>
Subject: Re: [PATCH v2 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency
Date: Tue, 18 Aug 2026 15:43:38 -0300	[thread overview]
Message-ID: <20260818184338.GF5432@nvidia.com> (raw)
In-Reply-To: <20260814123417.GB510472@nvidia.com>

On Fri, Aug 14, 2026 at 09:34:17AM -0300, Jason Gunthorpe wrote:

> I'm also wondering if we are even OK with this errata today? The
> current RIL algorithm also does not guarentee the split up RILs will
> cover every CONT. This will happen to be true if the input range has
> certain properties but I have no idea if the SVA path or even the
> proposed CONT iopgtable change guarentees that.

I've looked into this and it looks like the current RIL implementation
does not meet the requirement to solve the errata, and these days SVA
provides CONT entries from the mm.

The errata says the RIL command must cover the *entire* CONT group. I
read this text as meaning two contiguous RILs with a split that is
inside a CONT group is still vulnerable to this errata. Each CONT
group must be fully covered by at least one RIL.

So the algorithm we have today where we take the range and split it
into many RILs has nothing that prevents the RIL split from landing
inside a CONT. SVA is not guarenteed to produce ranges with an
alignment or size that make this algorithm happen to choose aligned
splits.

I've prepared an errata fix patch that detects the errata and triggers
a very simplified version of this single-RIL algorithm only for SVA
invalidations. That will fix today's kerenel, it is reasonably small
and can go to -stable.

I've adjusted this series on top of that to use the double-RIL version
with no over invalidation that Robin suggested for paging domains and
single-RIL with over invalidation for SVA domains. This also turned
out pretty good.

For the iommupt integration, and enabling CONT for the paging
domains.. Ugh.

It seems at least our Spark CPU has this errata and requires CONT
support to work in paging domains, or it runs into its own isochronous
HW problems. So the easy answer of disable CONT isn't desirable.

So.. what I've come up with is a little tweak that still allows the 4k
granule's 64K CONT to work without any over invalidation, so we can
turn it on by default. That is enough for spark to work. Everything
else stays with status quo of no CONT.

If someone has another smart idea now is the time..

Jason

  reply	other threads:[~2026-08-18 18:43 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06 16:26 [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 1/8] iommu/arm-smmu-v3: Pass the parameters for the invalidation in a struct Jason Gunthorpe
2026-07-07  3:04   ` Nicolin Chen
2026-07-07 11:18   ` Mostafa Saleh
2026-07-06 16:26 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Move pgsize out of arm_smmu_inv Jason Gunthorpe
2026-07-07  3:57   ` Nicolin Chen
2026-07-07 16:15     ` Jason Gunthorpe
2026-07-07 17:21       ` Nicolin Chen
2026-07-08 18:43         ` Jason Gunthorpe
2026-07-07 11:24   ` Mostafa Saleh
2026-07-07 18:08     ` Jason Gunthorpe
2026-07-11 17:38       ` Daniel Mentz
2026-07-14 18:41         ` Jason Gunthorpe
2026-07-10  4:06   ` Daniel Mentz
2026-07-10 14:28     ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 3/8] iommu/arm-smmu-v3: Optimize range invalidation for latency Jason Gunthorpe
2026-07-07  7:27   ` Nicolin Chen
2026-07-07 19:13     ` Jason Gunthorpe
2026-07-07 21:07       ` Nicolin Chen
2026-07-07 11:45   ` Mostafa Saleh
2026-07-08  0:10     ` Jason Gunthorpe
2026-08-13 13:53       ` Mostafa Saleh
2026-08-13 14:13         ` Jason Gunthorpe
2026-08-13 15:12           ` Mostafa Saleh
2026-08-13 17:05             ` Jason Gunthorpe
2026-08-13 17:25             ` Robin Murphy
2026-08-13 18:01               ` Jason Gunthorpe
2026-08-14  8:39                 ` Will Deacon
2026-08-14 12:34                   ` Jason Gunthorpe
2026-08-18 18:43                     ` Jason Gunthorpe [this message]
2026-07-06 16:26 ` [PATCH v2 4/8] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used Jason Gunthorpe
2026-07-07  7:27   ` Nicolin Chen
2026-07-07 11:46   ` Mostafa Saleh
2026-07-06 16:26 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Precompute the invalidation commands Jason Gunthorpe
2026-07-07 11:52   ` Mostafa Saleh
2026-07-07 14:58     ` Jason Gunthorpe
2026-07-08  9:00       ` Mostafa Saleh
2026-07-08 13:15         ` Jason Gunthorpe
2026-07-07 20:31   ` Nicolin Chen
2026-07-09 12:07     ` Jason Gunthorpe
2026-07-09 19:10       ` Nicolin Chen
2026-07-06 16:26 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain Jason Gunthorpe
2026-07-07 11:57   ` Mostafa Saleh
2026-07-08 18:09     ` Jason Gunthorpe
2026-07-07 21:51   ` Nicolin Chen
2026-07-08 18:40     ` Jason Gunthorpe
2026-07-06 16:26 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Jason Gunthorpe
2026-07-06 18:00   ` Robin Murphy
2026-07-06 19:45     ` Jason Gunthorpe
2026-07-08  1:41   ` Nicolin Chen
2026-07-08 18:27     ` Jason Gunthorpe
2026-07-08  5:29   ` Nicolin Chen
2026-07-09 18:25     ` Jason Gunthorpe
2026-07-09 21:32       ` Nicolin Chen
2026-07-06 16:26 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Support the DS expansion of RIL's SCALE Jason Gunthorpe
2026-07-07 23:20   ` Nicolin Chen
2026-07-08  0:02     ` Jason Gunthorpe
2026-07-08  2:10       ` Nicolin Chen
2026-07-08 13:05         ` Jason Gunthorpe
2026-07-07 12:25 ` [PATCH v2 0/8] Organize the SMMUv3 invalidation flow so iommupt can use it Mostafa Saleh
2026-07-07 15:00   ` Jason Gunthorpe

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