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From: Joel Stanley <joel@jms.id.au>
To: "Alistair Francis" <alistair.francis@wdc.com>,
	"Daniel Henrique Barboza" <daniel.barboza@oss.qualcomm.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Weiwei Li <liwei1518@gmail.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	Chao Liu <chao.liu@processmission.com>,
	Nicholas Piggin <npiggin@gmail.com>,
	Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>,
	Michael Ellerman <mpe@kernel.org>,
	Portia Stephens <portias@oss.tenstorrent.com>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
	qemu-arm@nongnu.org
Subject: [PATCH 05/12] tests/tcg/riscv64: Rework rules for semihost tests
Date: Thu, 27 Aug 2026 14:39:44 +0930	[thread overview]
Message-ID: <20260827050953.67184-6-joel@jms.id.au> (raw)
In-Reply-To: <20260827050953.67184-1-joel@jms.id.au>

Rework the makefile so the semihost tests can share run rules, with
individual tests overwriting QEMU_CPU or providing more options via
QEMU_EXTRA.

The program output now comes from the test framework's output chardev
instead of stdout, but there is no functional change as none of the
tests use semihosting putc.

Add quiet-command to the compile and link rules so builds print
CC/LD lines like the run rules.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 tests/tcg/riscv64/Makefile.softmmu-target | 94 +++++++++++------------
 1 file changed, 47 insertions(+), 47 deletions(-)

diff --git a/tests/tcg/riscv64/Makefile.softmmu-target b/tests/tcg/riscv64/Makefile.softmmu-target
index 562ac9b0e0fb..f2850a194084 100644
--- a/tests/tcg/riscv64/Makefile.softmmu-target
+++ b/tests/tcg/riscv64/Makefile.softmmu-target
@@ -9,67 +9,67 @@ LINK_SCRIPT = $(TEST_SRC)/semihost.ld
 LDFLAGS = -T $(LINK_SCRIPT)
 CFLAGS += -g -Og
 
+# Used by riscv64 tcg tests and shared 'multiarch' tests
+QEMU_CPU = rv64
+QEMU_BASE_MACHINE = -M virt -cpu $(QEMU_CPU) -display none -bios none
+QEMU_BASE_ARGS = -semihosting-config enable=on,chardev=output
+QEMU_OPTS += $(QEMU_BASE_MACHINE) $(QEMU_EXTRA) $(QEMU_BASE_ARGS) -kernel
+
+# These tests provide _start and use semihosting directly.
+# -kernel entry point is the lowest loaded address, not the ELF entry
+# point, so _start must remain first in .text.
+RISCV64_TESTS = issue1060 test-mepc-masking test-minstret-ecall \
+	doubletrap interruptedmemory test-crc32 \
+	test-zicclsm test-zicclsm-off test-misa-w
+
+# -Wl,--noexecstack to avoid linker warnings for .S files
 %.o: %.S
-	$(CC) $(CFLAGS) $< -Wa,--noexecstack -c -o $@
-%: %.o $(LINK_SCRIPT)
-	$(LD) $(LDFLAGS) $< -o $@
+	$(call quiet-command, \
+	  $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -Wa$(COMMA)--noexecstack -c -o $@, CC, $@)
 
-QEMU_OPTS += -M virt -display none -bios none -semihosting -kernel
+%.o: %.c
+	$(call quiet-command, \
+	  $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -c -o $@, CC, $@)
 
-EXTRA_RUNS += run-issue1060
-run-issue1060: issue1060
-	$(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<)
+$(RISCV64_TESTS): %: %.o $(LINK_SCRIPT)
+	$(call quiet-command, $(LD) -T $(LINK_SCRIPT) $< -o $@, LD, $@)
 
-EXTRA_RUNS += run-test-mepc-masking
-run-test-mepc-masking: test-mepc-masking
-	$(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<)
+TESTS += issue1060 test-mepc-masking test-minstret-ecall test-crc32 \
+	 test-misa-w test-zicclsm test-zicclsm-off
 
-EXTRA_RUNS += run-test-minstret-ecall
-run-test-minstret-ecall: test-minstret-ecall
-	$(call run-test, $<, $(QEMU) -icount shift=1 $(QEMU_OPTS) $<)
+# Tests can provide a custom kernel command line here
+run-test-minstret-ecall: QEMU_EXTRA = -icount shift=1
+run-test-crc32: QEMU_CPU = rv64,xlrbr=true
+run-test-misa-w: QEMU_CPU = rv64,x-misa-w=true,c=true,v=true
+run-test-zicclsm: QEMU_CPU = rv64,v=true,zfh=true,zicclsm=true
+run-test-zicclsm-off: QEMU_CPU = rv64,v=true,zfh=true,zicclsm=false
+
+# Zicclsm: misaligned load/store support. Assemble one source twice: the
+# default build expects every misaligned access to succeed (zicclsm=true),
+# the -DZICCLSM_DISABLED build expects every one to trap (zicclsm=false).
+test-zicclsm.o test-zicclsm-off.o: CFLAGS += -march=rv64gcv_zfh
+test-zicclsm-off.o: CFLAGS += -DZICCLSM_DISABLED
+test-zicclsm-off.o: test-zicclsm.S
+	$(call quiet-command, \
+	  $(CC) $(CFLAGS) $< -Wa$(COMMA)--noexecstack -c -o $@, CC, $@)
 
 EXTRA_RUNS += run-plugin-doubletrap
 run-plugin-doubletrap: doubletrap
 	$(call run-test, $<, \
-	  $(QEMU) -plugin ../plugins/libdiscons.so -d plugin -D $<.pout \
-	  $(QEMU_OPTS) $<)
+	  $(QEMU) -monitor none -display none \
+		  -chardev file$(COMMA)path=$<.out$(COMMA)id=output \
+		  -plugin ../plugins/libdiscons.so -d plugin -D $<.pout \
+		  $(QEMU_OPTS) $<)
 
 EXTRA_RUNS += run-plugin-interruptedmemory
 run-plugin-interruptedmemory: interruptedmemory
 	$(call run-test, $<, \
-	  $(QEMU) -plugin ../plugins/libdiscons.so -d plugin -D $<.pout \
-	  $(QEMU_OPTS) $<)
-
-EXTRA_RUNS += run-test-crc32
-comma:= ,
-run-test-crc32: test-crc32
-	$(call run-test, $<, $(QEMU) -cpu rv64$(comma)xlrbr=true $(QEMU_OPTS) $<)
-
-# Zicclsm: misaligned load/store support. Assemble one source twice: the
-# default build expects every misaligned access to succeed (zicclsm=true),
-# the -DZICCLSM_DISABLED build expects every one to trap (zicclsm=false).
-ZICCLSM_MARCH = -march=rv64gcv_zfh
-CLEANFILES += test-zicclsm test-zicclsm-off
-
-test-zicclsm: test-zicclsm.S $(LINK_SCRIPT)
-	$(CC) $(CFLAGS) $(ZICCLSM_MARCH) $< -Wa,--noexecstack -c -o test-zicclsm.o
-	$(LD) $(LDFLAGS) test-zicclsm.o -o $@
-
-test-zicclsm-off: test-zicclsm.S $(LINK_SCRIPT)
-	$(CC) $(CFLAGS) $(ZICCLSM_MARCH) -DZICCLSM_DISABLED $< -Wa,--noexecstack -c -o test-zicclsm-off.o
-	$(LD) $(LDFLAGS) test-zicclsm-off.o -o $@
-
-EXTRA_RUNS += run-test-zicclsm
-run-test-zicclsm: test-zicclsm
-	$(call run-test, $<, $(QEMU) -cpu rv64$(comma)v=true$(comma)zfh=true$(comma)zicclsm=true $(QEMU_OPTS) $<)
-
-EXTRA_RUNS += run-test-zicclsm-off
-run-test-zicclsm-off: test-zicclsm-off
-	$(call run-test, $<, $(QEMU) -cpu rv64$(comma)v=true$(comma)zfh=true$(comma)zicclsm=false $(QEMU_OPTS) $<)
+	  $(QEMU) -monitor none -display none \
+		  -chardev file$(COMMA)path=$<.out$(COMMA)id=output \
+		  -plugin ../plugins/libdiscons.so -d plugin -D $<.pout \
+		  $(QEMU_OPTS) $<)
 
-EXTRA_RUNS += run-test-misa-w
-run-test-misa-w: test-misa-w
-	$(call run-test, $<, $(QEMU) -cpu rv64$(comma)x-misa-w=true$(comma)c=true$(comma)v=true $(QEMU_OPTS)$<)
+CLEANFILES += interruptedmemory doubletrap
 
 # We don't currently support the multiarch system tests
 undefine MULTIARCH_TESTS
-- 
2.47.3



  parent reply	other threads:[~2026-08-27  5:11 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27  5:09 [PATCH 00/12] tests/tcg: Multiarch tests for riscv64 Joel Stanley
2026-08-27  5:09 ` [PATCH 01/12] tests/tcg/riscv64: Include stdint.h in semicall.h Joel Stanley
2026-08-31  1:07   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 02/12] tests/tcg/riscv64: Clean up semicall.h inline asm Joel Stanley
2026-08-31  1:09   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 03/12] tests/tcg/riscv64: Boot semihost tests with -bios none -kernel Joel Stanley
2026-08-31  1:10   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 04/12] tests/tcg/riscv64: Update semihosting linker script Joel Stanley
2026-08-31  1:14   ` Alistair Francis
2026-08-27  5:09 ` Joel Stanley [this message]
2026-08-31  1:17   ` [PATCH 05/12] tests/tcg/riscv64: Rework rules for semihost tests Alistair Francis
2026-08-27  5:09 ` [PATCH 06/12] tests/tcg/riscv64: Enable multiarch system tests Joel Stanley
2026-08-31  1:20   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 07/12] tests/tcg/riscv64: Enable memory record and replay test Joel Stanley
2026-08-31  1:21   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 08/12] tests/tcg/aarch64: Don't leak memory-sve CFLAGS Joel Stanley
2026-09-22  5:39   ` Alistair Francis
2026-09-22  7:17   ` Alex Bennée
2026-08-27  5:09 ` [PATCH 09/12] tests/tcg/multiarch: Fix vectorisation of memory test Joel Stanley
2026-08-31  1:24   ` Alistair Francis
2026-09-01 10:06   ` Alex Bennée
2026-08-27  5:09 ` [PATCH 10/12] tests/tcg/riscv64: Enable vectorised " Joel Stanley
2026-08-31  1:25   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 11/12] configure: Provide OBJDUMP to the tcg tests Joel Stanley
2026-08-31  1:25   ` Alistair Francis
2026-08-27  5:09 ` [PATCH 12/12] tests/tcg: Check vector memory tests contain vector ops Joel Stanley
2026-08-31  1:26   ` Alistair Francis
2026-09-22  9:50 ` [PATCH 00/12] tests/tcg: Multiarch tests for riscv64 Alistair Francis

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