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From: sashiko-bot@kernel.org
To: "Dave Jiang" <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org
Subject: Re: [PATCH v5 11/13] ACPI: APEI: GHES: Validate memory error section length before payload access
Date: Thu, 27 Aug 2026 21:05:03 +0000	[thread overview]
Message-ID: <20260827210504.673A81F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260827203726.3027541-12-dave.jiang@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The patch identifies but fails to fix an out-of-bounds read vulnerability in `cper_print_mem()` and `cper_mem_err_pack()` when handling malformed memory error sections.
--

commit af698921ff589a7f79e6f852052dbc3da7191b73
Author: Dave Jiang <dave.jiang@intel.com>

ACPI: APEI: GHES: Validate memory error section length before payload access

ghes_do_proc() hands the CPER_SEC_PLATFORM_MEM payload to the report chain,
arch_apei_report_mem_error() and ghes_handle_memory_failure() without
checking gdata->error_data_length. All three read validation_bits and
physical_addr, at offsets 0 and 16, so a shorter section reads past the
record.

Check the length once in ghes_do_proc(), before any consumer runs. Take the
73-byte struct cper_sec_mem_err_old as the floor: older firmware
legitimately emits that UEFI 2.1/2.2 layout, and it makes validation_bits
safe to read.

Closes: https://sashiko.dev/#/patchset/20260714231835.303081-1-dave.jiang@intel.com?part=7

> The fields from "extended" on are absent from that layout, so also require
> whatever length the validation bits claim. Derive it per field rather than
> demanding the full 80 bytes: rank needs only 76, and the BANK_GROUP and
> BANK_ADDRESS bits describe "bank" at offset 38, which every record carries.
> Testing the whole mask against one size, as cper_print_mem() does, gets it
> wrong both ways.

[Severity: High]
This is a pre-existing issue, but since the commit message notes the flaw in
cper_print_mem(), should this patch also fix the out-of-bounds read there?

A CPER memory error record containing a CPER_SEC_PLATFORM_MEM section with a
length between 74 and 79 bytes and CPER_MEM_VALID_MODULE_HANDLE set can trigger
an out-of-bounds read of up to 6 bytes.

When cper_estatus_print_section() in drivers/firmware/efi/cper.c processes such
a record:

drivers/firmware/efi/cper.c:cper_estatus_print_section() {
...
		if (gdata->error_data_length >=
		    sizeof(struct cper_sec_mem_err_old))
			cper_print_mem(newpfx, mem_err,
				       gdata->error_data_length);
...
}

It calls cper_print_mem(), which bypasses its invalid bits check because
len != 73:

drivers/firmware/efi/cper.c:cper_print_mem() {
...
	if (len == sizeof(struct cper_sec_mem_err_old) &&
	    (mem->validation_bits & ~(CPER_MEM_VALID_RANK_NUMBER - 1))) {
		pr_err(FW_WARN "valid bits set for fields beyond structure\n");
		return;
	}
...
	cper_mem_err_pack(mem, &cmem);
...
}

It then unconditionally calls cper_mem_err_pack(), which reads
mem->mem_dev_handle at offset 78 regardless of the record length:

drivers/firmware/efi/cper.c:cper_mem_err_pack() {
...
	if (mem->validation_bits & CPER_MEM_VALID_MODULE_HANDLE)
		cmem->mem_dev_handle = mem->mem_dev_handle;
...
}

Can this lead to a kernel oops if the struct is located exactly at the end of a
mapped page, or leak kernel heap memory into dmesg via DMI handle lookups?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260827203726.3027541-1-dave.jiang@intel.com?part=11

  reply	other threads:[~2026-08-27 21:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27 20:37 [PATCH v5 00/13] ACPI: APEI: GHES: Collection of fixes for issues reported by sashiko Dave Jiang
2026-08-27 20:37 ` [PATCH v5 01/13] efi/cper: Reject CPER records with an out-of-range error_data_length Dave Jiang
2026-08-27 20:52   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 02/13] efi/cper: Reject an error status block length that wraps a u32 Dave Jiang
2026-08-27 20:52   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 03/13] ACPI: extlog: Validate elog record length before walking sections Dave Jiang
2026-08-27 20:55   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 04/13] ACPI: extlog: Defer CXL protocol error handling to avoid lock inversion Dave Jiang
2026-08-27 20:55   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 05/13] ACPI: extlog: Avoid populating software AER metadata from raw hardware buffer Dave Jiang
2026-08-27 20:58   ` sashiko-bot
2026-08-27 23:06     ` Dave Jiang
2026-08-27 20:37 ` [PATCH v5 06/13] ACPI: extlog: Validate PCIe error section length before payload access Dave Jiang
2026-08-27 20:37 ` [PATCH v5 07/13] ACPI: extlog: Fix CONFIG_ACPI_APEI_PCIEAER guard typo Dave Jiang
2026-08-27 20:37 ` [PATCH v5 08/13] ACPI: APEI: GHES: Bound CXL event record copy to the firmware section length Dave Jiang
2026-08-27 20:55   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 09/13] ACPI: APEI: GHES: Validate CXL protocol error section length before RAS cap copy Dave Jiang
2026-08-27 20:53   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 10/13] efi/cper: Read only validated fields in cper_mem_err_pack() Dave Jiang
2026-08-27 20:55   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 11/13] ACPI: APEI: GHES: Validate memory error section length before payload access Dave Jiang
2026-08-27 21:05   ` sashiko-bot [this message]
2026-08-27 20:37 ` [PATCH v5 12/13] ACPI: APEI: GHES: Bound AER info copy and sanitize software metadata Dave Jiang
2026-08-27 21:01   ` sashiko-bot
2026-08-27 20:37 ` [PATCH v5 13/13] cxl/ras: Make cxl_cper_handle_prot_err() static Dave Jiang
2026-08-27 20:59   ` sashiko-bot

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