From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-arm@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>
Subject: [PATCH v5 09/21] target/i386: Constify CPU*State for cpu_*_interrupt() getters
Date: Tue, 1 Sep 2026 11:52:15 +0200 [thread overview]
Message-ID: <20260901095229.72018-10-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260901095229.72018-1-philmd@oss.qualcomm.com>
x86_cpu_pending_interrupt() and x86_cpu_interrupts_enabled()
only read CPU state without modification, add the const
qualifiers to CPUState and CPUX86State parameters.
Simplify directly using cpu_env() in x86_cpu_pending_interrupt.
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
target/i386/cpu.h | 4 ++--
target/i386/cpu.c | 5 ++---
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 641f3ee5c2f..b0436dbf665 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2596,7 +2596,7 @@ void x86_cpu_gdb_init(CPUState *cs);
int cpu_x86_support_mca_broadcast(CPUX86State *env);
#ifndef CONFIG_USER_ONLY
-int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request);
+int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request);
bool x86_cpu_translate_for_debug(CPUState *cpu, vaddr addr,
TranslateForDebugResult *result);
@@ -3104,7 +3104,7 @@ static inline bool ctl_has_irq(CPUX86State *env)
return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr);
}
-static inline bool x86_cpu_interrupts_enabled(CPUX86State *env)
+static inline bool x86_cpu_interrupts_enabled(const CPUX86State *env)
{
return ((env->eflags & IF_MASK) &&
!(env->hflags & HF_INHIBIT_IRQ_MASK)) ||
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index e5ffb10d156..1fc02cf94e6 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -10601,10 +10601,9 @@ static vaddr x86_cpu_get_pc(CPUState *cs)
}
#if !defined(CONFIG_USER_ONLY)
-int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request)
+int x86_cpu_pending_interrupt(const CPUState *cs, int interrupt_request)
{
- X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
+ const CPUX86State *env = cpu_env(cs);
if (interrupt_request & CPU_INTERRUPT_POLL) {
return CPU_INTERRUPT_POLL;
--
2.53.0
next prev parent reply other threads:[~2026-09-01 9:54 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 9:52 [PATCH v5 00/21] cpus: Constify @cpu in SysemuCPUOps::has_work() handler Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 01/21] target/i386: Remove const qualifier in ptw_setl*() Philippe Mathieu-Daudé
2026-09-01 11:15 ` marcandre.lureau
2026-09-03 9:50 ` Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 02/21] linux-user: Uncast void pointer argument as Object in target_cpu_free() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 03/21] cpus: Add const-qualified CPU environment accessors Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 04/21] linux-user: Replace env_cpu_const() by generic env_cpu() equivalent Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 05/21] system/cpus: Constify various CPUState arguments Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 06/21] target/arm: Constify CPUARMState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 11:08 ` marcandre.lureau
2026-09-10 19:44 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 07/21] target/avr: Constify CPUAVRState for some " Philippe Mathieu-Daudé
2026-09-10 19:44 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 08/21] target/hexagon: Constify CPUHexagonState in hexagon_thread_is_enabled() Philippe Mathieu-Daudé
2026-09-01 9:52 ` Philippe Mathieu-Daudé [this message]
2026-09-10 19:45 ` [PATCH v5 09/21] target/i386: Constify CPU*State for cpu_*_interrupt() getters Richard Henderson
2026-09-01 9:52 ` [PATCH v5 10/21] target/loongarch: Constify LoongArchTLB Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 11/21] target/loongarch: Constify CPULoongArchState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 12/21] target/loongarch: Constify CPULoongArchState for various tlb_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 13/21] target/mips: Constify CPUMIPSState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-10 19:45 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 14/21] target/s390x: Constify S390CPU for cpu_has_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 15/21] target/riscv: Constify @iprio argument in riscv_cpu_pending_to_irq() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 16/21] target/riscv: Constify CPURISCVState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 17/21] target/sparc: Constify CPUSPARCState " Philippe Mathieu-Daudé
2026-09-10 19:46 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 18/21] target/tricore: Document architectural interrupts as not implemented Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 19/21] target/xtensa: Constify CPUXtensaState in xtensa_replicate_windowstart() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 20/21] cpus: Constify @cpu in SysemuCPUOps::has_work() handler Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 21/21] accel/tcg: Constify @cpu in cpu_mmu_index() and TCGCPUOps handlers Philippe Mathieu-Daudé
2026-09-01 11:09 ` marcandre.lureau
2026-09-10 19:49 ` Richard Henderson
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