From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-arm@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Artyom Tarasenko" <atar4qemu@gmail.com>
Subject: [PATCH v5 17/21] target/sparc: Constify CPUSPARCState for various cpu_*() getters
Date: Tue, 1 Sep 2026 11:52:23 +0200 [thread overview]
Message-ID: <20260901095229.72018-18-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260901095229.72018-1-philmd@oss.qualcomm.com>
Add the const qualifier to CPUSPARCState when
the argument is accessed without modification.
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
target/sparc/cpu.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 5f583ed9de2..31a16c2af03 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -680,28 +680,28 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
#endif
#if defined (TARGET_SPARC64)
-static inline int cpu_has_hypervisor(CPUSPARCState *env1)
+static inline int cpu_has_hypervisor(const CPUSPARCState *env1)
{
return env1->def.features & CPU_FEATURE_HYPV;
}
-static inline int cpu_hypervisor_mode(CPUSPARCState *env1)
+static inline int cpu_hypervisor_mode(const CPUSPARCState *env1)
{
return cpu_has_hypervisor(env1) && (env1->hpstate & HS_PRIV);
}
-static inline int cpu_supervisor_mode(CPUSPARCState *env1)
+static inline int cpu_supervisor_mode(const CPUSPARCState *env1)
{
return env1->pstate & PS_PRIV;
}
#else
-static inline int cpu_supervisor_mode(CPUSPARCState *env1)
+static inline int cpu_supervisor_mode(const CPUSPARCState *env1)
{
return env1->psrs;
}
#endif
-static inline int cpu_interrupts_enabled(CPUSPARCState *env1)
+static inline int cpu_interrupts_enabled(const CPUSPARCState *env1)
{
#if !defined (TARGET_SPARC64)
if (env1->psret != 0)
@@ -715,7 +715,7 @@ static inline int cpu_interrupts_enabled(CPUSPARCState *env1)
return 0;
}
-static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil)
+static inline int cpu_pil_allowed(const CPUSPARCState *env1, int pil)
{
#if !defined(TARGET_SPARC64)
/* level 15 is non-maskable on sparc v8 */
--
2.53.0
next prev parent reply other threads:[~2026-09-01 9:57 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 9:52 [PATCH v5 00/21] cpus: Constify @cpu in SysemuCPUOps::has_work() handler Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 01/21] target/i386: Remove const qualifier in ptw_setl*() Philippe Mathieu-Daudé
2026-09-01 11:15 ` marcandre.lureau
2026-09-03 9:50 ` Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 02/21] linux-user: Uncast void pointer argument as Object in target_cpu_free() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 03/21] cpus: Add const-qualified CPU environment accessors Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 04/21] linux-user: Replace env_cpu_const() by generic env_cpu() equivalent Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 05/21] system/cpus: Constify various CPUState arguments Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 06/21] target/arm: Constify CPUARMState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 11:08 ` marcandre.lureau
2026-09-10 19:44 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 07/21] target/avr: Constify CPUAVRState for some " Philippe Mathieu-Daudé
2026-09-10 19:44 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 08/21] target/hexagon: Constify CPUHexagonState in hexagon_thread_is_enabled() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 09/21] target/i386: Constify CPU*State for cpu_*_interrupt() getters Philippe Mathieu-Daudé
2026-09-10 19:45 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 10/21] target/loongarch: Constify LoongArchTLB Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 11/21] target/loongarch: Constify CPULoongArchState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 12/21] target/loongarch: Constify CPULoongArchState for various tlb_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 13/21] target/mips: Constify CPUMIPSState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-10 19:45 ` Richard Henderson
2026-09-01 9:52 ` [PATCH v5 14/21] target/s390x: Constify S390CPU for cpu_has_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 15/21] target/riscv: Constify @iprio argument in riscv_cpu_pending_to_irq() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 16/21] target/riscv: Constify CPURISCVState for various cpu_*() getters Philippe Mathieu-Daudé
2026-09-01 9:52 ` Philippe Mathieu-Daudé [this message]
2026-09-10 19:46 ` [PATCH v5 17/21] target/sparc: Constify CPUSPARCState " Richard Henderson
2026-09-01 9:52 ` [PATCH v5 18/21] target/tricore: Document architectural interrupts as not implemented Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 19/21] target/xtensa: Constify CPUXtensaState in xtensa_replicate_windowstart() Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 20/21] cpus: Constify @cpu in SysemuCPUOps::has_work() handler Philippe Mathieu-Daudé
2026-09-01 9:52 ` [PATCH v5 21/21] accel/tcg: Constify @cpu in cpu_mmu_index() and TCGCPUOps handlers Philippe Mathieu-Daudé
2026-09-01 11:09 ` marcandre.lureau
2026-09-10 19:49 ` Richard Henderson
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