[PATCH i-g-t 0/2] Derive write-through availability from the PAT config

[Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>]

Not every platform has a write-through entry in its PAT table. Where
there is none the KMD reports the UC index for XE_CACHE_WT, so a test
which asks for write-through quietly gets uncached instead, re-running
coverage it already has under a misleading name. Spotting that currently
means enumerating IP versions in the test, which needs revisiting for
every new platform.

Patch 1 adds intel_pat_has_wt(), which answers the question from the PAT
config itself: a WT index which aliases UC means there is no distinct
write-through entry. Patch 2 uses it to skip the write-through checks in
xe_pat where there is nothing to exercise, so they report an honest skip
rather than a pass.

Following the library guidance in CONTRIBUTING.md, the helper is a plain
query: no igt_require()/igt_skip() in the library, the tests decide what
to do with the answer.

intel_get_pat_idx_wt() itself is deliberately left alone here. Having it
return XE_PAT_IDX_INVALID rather than the UC index is the stricter fix
and probably the right end state, but it changes behaviour for the
callers in kms_ccs and xe_exec_system_allocator as well, so it seems
better as a follow-up once the helper is in tree.

No functional change intended for platforms which do have a write-through
PAT index.

Sujaritha Sundaresan (2):
  lib/intel_pat: add intel_pat_has_wt()
  tests/intel/xe_pat: skip the write-through checks without a WT index

 lib/intel_pat.c      | 22 ++++++++++++++++++++++
 lib/intel_pat.h      |  2 ++
 tests/intel/xe_pat.c | 38 ++++++++++++++++++++++----------------
 3 files changed, 46 insertions(+), 16 deletions(-)

-- 
2.34.1