From: Bin Meng <bin.meng@processmission.com>
To: QEMU <qemu-devel@nongnu.org>
Cc: Chao Liu <chao.liu@processmission.com>,
Alistair Francis <alistair.francis@wdc.com>,
Conor Dooley <conor@kernel.org>,
Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Sebastian Huber <sebastian.huber@embedded-brains.de>,
Weiwei Li <liwei1518@gmail.com>,
qemu-riscv@nongnu.org
Subject: [PATCH v2 22/24] tests/functional/riscv64: Add Icicle Kit firmware boot test
Date: Fri, 4 Sep 2026 23:57:41 +0800 [thread overview]
Message-ID: <20260904155758.3833179-23-bin.meng@processmission.com> (raw)
In-Reply-To: <20260904155758.3833179-1-bin.meng@processmission.com>
Add functional coverage using prebuilt HSS and SD card images.
Boot HSS and U-Boot with five harts and 2 GiB of RAM. Connect
the test console to MMUART1 and let U-Boot start Linux.
The complete boot exercises the SDHCI controller in the DMA modes
used at each stage. HSS uses Version 4 64-bit SDMA to load U-Boot.
U-Boot uses ADMA2-64 to read the boot script and the large FIT
image. Linux then selects 64-bit ADMA for SD card and rootfs I/O.
Check the machine identity, kernel ADMA initialization, root
filesystem mount, and login prompt.
Signed-off-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Chao Liu <chao.liu@processmission.com>
---
(no changes since v1)
MAINTAINERS | 1 +
tests/functional/riscv64/meson.build | 2 +
.../riscv64/test_microchip_icicle_kit.py | 56 +++++++++++++++++++
3 files changed, 59 insertions(+)
create mode 100644 tests/functional/riscv64/test_microchip_icicle_kit.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 1856c67feb..319b436480 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1805,6 +1805,7 @@ F: include/hw/misc/mchp_pfsoc_ioscb.h
F: include/hw/misc/mchp_pfsoc_l2cc.h
F: include/hw/misc/mchp_pfsoc_sysreg.h
F: include/hw/rtc/mchp_pfsoc_rtc.h
+F: tests/functional/riscv64/test_microchip_icicle_kit.py
F: tests/qtest/mchp_pfsoc_l2cc_test.c
F: tests/qtest/mchp_pfsoc_rtc_test.c
diff --git a/tests/functional/riscv64/meson.build b/tests/functional/riscv64/meson.build
index d1a3e6c2bf..cbf61d9535 100644
--- a/tests/functional/riscv64/meson.build
+++ b/tests/functional/riscv64/meson.build
@@ -3,6 +3,7 @@
test_riscv64_timeouts = {
'boston' : 120,
'k230' : 120,
+ 'microchip_icicle_kit' : 180,
'tuxrun' : 120,
}
@@ -15,6 +16,7 @@ tests_riscv64_system_thorough = [
'endianness',
'boston',
'k230',
+ 'microchip_icicle_kit',
'sifive_u',
'tt_atlantis',
'tuxrun',
diff --git a/tests/functional/riscv64/test_microchip_icicle_kit.py b/tests/functional/riscv64/test_microchip_icicle_kit.py
new file mode 100644
index 0000000000..559ae1f651
--- /dev/null
+++ b/tests/functional/riscv64/test_microchip_icicle_kit.py
@@ -0,0 +1,56 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots HSS, U-Boot, and Linux on an Icicle Kit.
+#
+# Copyright (c) 2026 Process Mission
+#
+# Author:
+# Bin Meng <bin.meng@processmission.com>
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import Asset, LinuxKernelTest, skipIfMissingCommands
+
+
+class MicrochipIcicleKitMachine(LinuxKernelTest):
+
+ ASSET_IMAGES = Asset(
+ ('https://github.com/processmission/qemu-machine-images/releases/'
+ 'download/v1.0.0/'
+ 'riscv64-microchip-icicle-kit-v1.0.0.tar.zst'),
+ 'fe7eb3ee737fd15d6d5a8480822b070923ae4d611b19ed03983e11f35b6aac04')
+
+ @skipIfMissingCommands('zstd')
+ def test_microchip_icicle_kit_boot(self):
+ self.set_machine('microchip-icicle-kit')
+
+ archive_path = self.uncompress(
+ self.ASSET_IMAGES,
+ target='microchip_icicle_kit_images.tar',
+ format='zstd')
+ self.archive_extract(archive_path, format='tar')
+ firmware_path = self.scratch_file('images', 'hss.bin')
+ sdcard_path = self.scratch_file('images', 'sdcard.img')
+
+ self.vm.set_console(console_index=1)
+ self.vm.add_args(
+ '-smp', '5',
+ '-m', '2G',
+ '-display', 'none',
+ '-bios', firmware_path,
+ '-snapshot',
+ '-drive', f'file={sdcard_path},format=raw,if=sd,index=0',
+ '-no-reboot')
+ self.vm.launch()
+
+ self.wait_for_console_pattern('U-Boot ')
+ self.wait_for_console_pattern('Starting kernel ...')
+ self.wait_for_console_pattern(
+ 'Machine model: Microchip PolarFire-SoC Icicle Kit')
+ self.wait_for_console_pattern('using ADMA 64-bit')
+ self.wait_for_console_pattern('VFS: Mounted root')
+ self.wait_for_console_pattern('mpfs_icicle login:')
+
+
+if __name__ == '__main__':
+ LinuxKernelTest.main()
--
2.53.0
next prev parent reply other threads:[~2026-09-04 16:00 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-04 15:57 [PATCH v2 00/24] hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot Bin Meng
2026-09-04 15:57 ` [PATCH v2 01/24] hw/riscv: pfsoc: Correct the L2LIM maximum mapped size Bin Meng
2026-09-04 15:57 ` [PATCH v2 02/24] hw/riscv: pfsoc: Map the L2 zero device window Bin Meng
2026-09-04 15:57 ` [PATCH v2 03/24] hw/misc: pfsoc: Support DDR training with newer HSS Bin Meng
2026-09-04 15:57 ` [PATCH v2 04/24] hw/misc: pfsoc: Model L2 cache controller registers Bin Meng
2026-09-04 15:57 ` [PATCH v2 05/24] hw/riscv: pfsoc: Couple L2CC to L2-LIM Bin Meng
2026-09-04 15:57 ` [PATCH v2 06/24] tests/qtest: Add PolarFire SoC L2CC coverage Bin Meng
2026-09-04 15:57 ` [PATCH v2 07/24] hw/sd: sdhci: Run ADMA independently of MMIO Bin Meng
2026-09-04 15:57 ` [PATCH v2 08/24] tests/qtest: add Cadence SDHCI ADMA pacing/MMIO reproducer Bin Meng
2026-09-04 15:57 ` [PATCH v2 09/24] hw/sd: sd: Keep high-capacity memory blocks at 512 bytes Bin Meng
2026-09-04 15:57 ` [PATCH v2 10/24] hw/sd: cadence: Add 64-bit system bus property Bin Meng
2026-09-04 15:57 ` [PATCH v2 11/24] hw/riscv: pfsoc: Enable 64-bit SDHCI system bus support Bin Meng
2026-09-04 15:57 ` [PATCH v2 12/24] hw/misc: pfsoc: Model PolarFire SoC serial number service Bin Meng
2026-09-04 15:57 ` [PATCH v2 13/24] hw/rtc: Add PolarFire SoC RTC model Bin Meng
2026-09-04 15:57 ` [PATCH v2 14/24] hw/riscv: pfsoc: Add PolarFire SoC RTC to Icicle Kit Bin Meng
2026-09-04 15:57 ` [PATCH v2 15/24] tests/qtest: Add PolarFire SoC RTC coverage Bin Meng
2026-09-04 15:57 ` [PATCH v2 16/24] hw/misc: pfsoc: Honor PolarFire service notification requests Bin Meng
2026-09-04 15:57 ` [PATCH v2 17/24] hw/riscv: pfsoc: Correct PolarFire SoC DDR aliases Bin Meng
2026-09-04 15:57 ` [PATCH v2 18/24] hw/riscv: pfsoc: Fix Icicle Kit RAM size at 2 GiB Bin Meng
2026-09-04 15:57 ` [PATCH v2 19/24] hw/riscv: pfsoc: Fix Icicle Kit hart count at five Bin Meng
2026-09-04 15:57 ` [PATCH v2 20/24] docs/system/riscv: Document Icicle Kit HSS boot Bin Meng
2026-09-04 15:57 ` [PATCH v2 21/24] docs/system/riscv: pfsoc: Document CLINT topology for direct Linux boot Bin Meng
2026-09-04 15:57 ` Bin Meng [this message]
2026-09-04 15:57 ` [PATCH v2 23/24] MAINTAINERS: Add PolarFire SoC Icicle Kit maintainer Bin Meng
2026-09-04 15:57 ` [PATCH v2 24/24] MAINTAINERS: Move Conor Dooley to PolarFire SoC reviewer Bin Meng
2026-09-04 16:11 ` [PATCH v2 00/24] hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot Philippe Mathieu-Daudé
2026-09-07 13:29 ` Conor Dooley
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