From: sashiko-bot@kernel.org
To: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
Cc: vkoul@kernel.org, wsa+renesas@sang-engineering.com,
olteanv@gmail.com, neil.armstrong@linaro.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, Frank.Li@kernel.org,
imx@lists.linux.dev, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH RFC v3 10/12] arm64: dts: s32g: Add SerDes controller nodes
Date: Sun, 20 Sep 2026 06:55:00 +0000 [thread overview]
Message-ID: <20260920065501.447851F0089A@smtp.kernel.org> (raw)
In-Reply-To: <20260919-s32g_serdes-v3-10-9d68868c1e89@oss.nxp.com>
> From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
>
> Add the SerDes/PCIe combo-PHY controller nodes for S32G2 and S32G3 in
> the disabled state. Each SoC integrates two SerDes instances (SerDes_0
> and SerDes_1) with identical register layout; every instance exposes
> the PCIe PHY and the two XPCS instances used for SGMII. Board device
> trees enable the required instance and add the lane PHY child nodes
> matching the wanted SerDes subsystem mode.
>
> Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com?part=10
WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
Cc: vkoul@kernel.org, wsa+renesas@sang-engineering.com,
olteanv@gmail.com, neil.armstrong@linaro.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, Frank.Li@kernel.org,
imx@lists.linux.dev, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH RFC v3 10/12] arm64: dts: s32g: Add SerDes controller nodes
Date: Sun, 20 Sep 2026 06:55:00 +0000 [thread overview]
Message-ID: <20260920065501.447851F0089A@smtp.kernel.org> (raw)
In-Reply-To: <20260919-s32g_serdes-v3-10-9d68868c1e89@oss.nxp.com>
> From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com>
>
> Add the SerDes/PCIe combo-PHY controller nodes for S32G2 and S32G3 in
> the disabled state. Each SoC integrates two SerDes instances (SerDes_0
> and SerDes_1) with identical register layout; every instance exposes
> the PCIe PHY and the two XPCS instances used for SGMII. Board device
> trees enable the required instance and add the lane PHY child nodes
> matching the wanted SerDes subsystem mode.
>
> Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com?part=10
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2026-09-20 6:55 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-19 6:54 [PATCH RFC v3 00/12] Add support for the NXP S32G SerDes subsystem Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-19 6:54 ` [PATCH RFC v3 01/12] dt-bindings: phy: Add " Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-10-12 18:57 ` Frank Li
2026-10-12 18:57 ` Frank Li
2026-10-13 14:40 ` Jan Petrous
2026-10-13 14:40 ` Jan Petrous
2026-10-14 14:14 ` Frank Li
2026-10-14 14:14 ` Frank Li
2026-09-19 6:54 ` [PATCH RFC v3 02/12] dt-bindings: net: nxp,s32-dwmac: Document pcs-handle Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 03/12] dt-bindings: PCI: nxp,s32g-pcie: Fix SerDes PHY phandle in example Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-10-12 18:43 ` Frank Li
2026-10-12 18:43 ` Frank Li
2026-10-13 14:37 ` Jan Petrous
2026-10-13 14:37 ` Jan Petrous
2026-10-14 14:06 ` Frank Li
2026-10-14 14:06 ` Frank Li
2026-09-19 6:54 ` [PATCH RFC v3 04/12] net: pcs: add NXP SerDes XPCS shared core Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-19 15:31 ` Maxime Chevallier
2026-09-19 15:31 ` Maxime Chevallier
2026-09-19 16:31 ` Coia Prant
2026-09-19 16:31 ` Coia Prant
2026-10-11 6:01 ` Jan Petrous
2026-10-11 6:01 ` Jan Petrous
2026-10-12 19:47 ` Coia Prant
2026-10-12 19:47 ` Coia Prant
2026-10-13 14:47 ` Jan Petrous
2026-10-13 14:47 ` Jan Petrous
2026-10-14 12:44 ` Jan Petrous
2026-10-14 12:44 ` Jan Petrous
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-20 18:39 ` Andrew Lunn
2026-09-20 18:39 ` Andrew Lunn
2026-10-11 6:03 ` Jan Petrous
2026-10-11 6:03 ` Jan Petrous
2026-09-19 6:54 ` [PATCH RFC v3 05/12] net: pcs: Add NXP S32G XPCS driver Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-20 17:07 ` Andrew Lunn
2026-09-20 17:07 ` Andrew Lunn
2026-10-11 5:56 ` Jan Petrous
2026-10-11 5:56 ` Jan Petrous
2026-09-19 6:54 ` [PATCH RFC v3 06/12] phy: freescale: s32g: Add SerDes subsystem PHY Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 07/12] net: stmmac: dwmac-s32: Add SGMII support Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-19 12:04 ` Maxime Chevallier
2026-09-19 12:04 ` Maxime Chevallier
2026-10-11 5:53 ` Jan Petrous
2026-10-11 5:53 ` Jan Petrous
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 08/12] MAINTAINERS: Add NXP S32G SerDes and SerDes xPCS core entries Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-19 6:54 ` [PATCH RFC v3 09/12] arm64: dts: s32g: Add SCMI reset controller Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:54 ` sashiko-bot
2026-09-20 6:54 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 10/12] arm64: dts: s32g: Add SerDes controller nodes Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:55 ` sashiko-bot [this message]
2026-09-20 6:55 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 11/12] arm64: dts: s32g: Add PCIe " Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:55 ` sashiko-bot
2026-09-20 6:55 ` sashiko-bot
2026-09-19 6:54 ` [PATCH RFC v3 12/12] arm64: dts: s32g: Add S32G3-RDB3 SerDes routing variants Jan Petrous via B4 Relay
2026-09-19 6:54 ` Jan Petrous (OSS)
2026-09-19 6:54 ` Jan Petrous via B4 Relay
2026-09-20 6:55 ` sashiko-bot
2026-09-20 6:55 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260920065501.447851F0089A@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=Frank.Li@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=imx@lists.linux.dev \
--cc=jan.petrous@oss.nxp.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=neil.armstrong@linaro.org \
--cc=olteanv@gmail.com \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=vkoul@kernel.org \
--cc=wsa+renesas@sang-engineering.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.