* [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test
@ 2026-10-05 2:04 Jamin Lin
2026-10-05 2:04 ` [PATCH v2 1/2] hw/arm/aspeed: Sort device IDs alphabetically Jamin Lin
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Jamin Lin @ 2026-10-05 2:04 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: Jamin Lin, Troy Lee
This series is split out from "[PATCH v1 0/11] hw/arm/aspeed: Use
unimp array and table for unimplemented devices" to make the changes
easier to review.
v1
1. sorts the ASPEED device IDs alphabetically.
v2
1. Split the device ID sorting change out into a separate series.
2. Fix the IO expander device IDs in the correct order.
3. Add a functional test for IO Expander 1 I2C.
Jamin Lin (2):
hw/arm/aspeed: Sort device IDs alphabetically
tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO
expander 1
include/hw/arm/aspeed_soc.h | 176 +++++++++---------
.../aarch64/test_aspeed_ast2700a2.py | 3 +
2 files changed, 91 insertions(+), 88 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 1/2] hw/arm/aspeed: Sort device IDs alphabetically 2026-10-05 2:04 [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Jamin Lin @ 2026-10-05 2:04 ` Jamin Lin 2026-10-05 2:04 ` [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 Jamin Lin 2026-10-07 13:10 ` [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Cédric Le Goater 2 siblings, 0 replies; 7+ messages in thread From: Jamin Lin @ 2026-10-05 2:04 UTC (permalink / raw) To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Jamin Lin, Troy Lee, Cédric Le Goater The ASPEED device ID enum has grown over time without a consistent ordering rule. This makes it difficult to determine where new device IDs should be added and reduces readability and maintainability as more devices are introduced. Sort the device IDs alphabetically to provide a consistent ordering rule. Keep related numbered devices together, such as SPI0, SPI1 and SPI2. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> --- include/hw/arm/aspeed_soc.h | 176 ++++++++++++++++++------------------ 1 file changed, 88 insertions(+), 88 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 38226d9b80..a110385743 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -195,64 +195,56 @@ struct AspeedSoCClass { }; enum { - ASPEED_DEV_VBOOTROM, - ASPEED_DEV_SPI_BOOT, - ASPEED_DEV_IOMEM, - ASPEED_DEV_IOMEM0, - ASPEED_DEV_IOMEM1, - ASPEED_DEV_UART0, - ASPEED_DEV_UART1, - ASPEED_DEV_UART2, - ASPEED_DEV_UART3, - ASPEED_DEV_UART4, - ASPEED_DEV_UART5, - ASPEED_DEV_UART6, - ASPEED_DEV_UART7, - ASPEED_DEV_UART8, - ASPEED_DEV_UART9, - ASPEED_DEV_UART10, - ASPEED_DEV_UART11, - ASPEED_DEV_UART12, - ASPEED_DEV_UART13, - ASPEED_DEV_VUART, - ASPEED_DEV_FMC, - ASPEED_DEV_SPI0, - ASPEED_DEV_SPI1, - ASPEED_DEV_SPI2, + ASPEED_DEV_ACRY, + ASPEED_DEV_ADC, + ASPEED_DEV_DP, + ASPEED_DEV_DPMCU, ASPEED_DEV_EHCI1, ASPEED_DEV_EHCI2, ASPEED_DEV_EHCI3, ASPEED_DEV_EHCI4, - ASPEED_DEV_VIC, - ASPEED_DEV_INTC, - ASPEED_DEV_INTCIO, - ASPEED_DEV_SDMC, - ASPEED_DEV_SCU, - ASPEED_DEV_ADC, - ASPEED_DEV_SBC, + ASPEED_DEV_EMMC, ASPEED_DEV_EMMC_BC, - ASPEED_DEV_VIDEO, - ASPEED_DEV_SRAM0, - ASPEED_DEV_SRAM1, - ASPEED_DEV_SDHCI, + ASPEED_DEV_ESPI, + ASPEED_DEV_ETH1, + ASPEED_DEV_ETH2, + ASPEED_DEV_ETH3, + ASPEED_DEV_ETH4, + ASPEED_DEV_FMC, + ASPEED_DEV_FSI1, + ASPEED_DEV_FSI2, ASPEED_DEV_GPIO, ASPEED_DEV_GPIO_1_8V, - ASPEED_DEV_SGPIOM0, - ASPEED_DEV_SGPIOM1, - ASPEED_DEV_RTC, - ASPEED_DEV_TIMER1, - ASPEED_DEV_TIMER2, - ASPEED_DEV_TIMER3, - ASPEED_DEV_TIMER4, - ASPEED_DEV_TIMER5, - ASPEED_DEV_TIMER6, - ASPEED_DEV_TIMER7, - ASPEED_DEV_TIMER8, - ASPEED_DEV_WDT, - ASPEED_DEV_PWM, - ASPEED_DEV_LPC, - ASPEED_DEV_IBT, + ASPEED_DEV_HACE, ASPEED_DEV_I2C, + ASPEED_DEV_I3C, + ASPEED_DEV_IBT, + ASPEED_DEV_INTC, + ASPEED_DEV_INTCIO, + ASPEED_DEV_IOMEM, + ASPEED_DEV_IOMEM0, + ASPEED_DEV_IOMEM1, + ASPEED_DEV_IOEXP0_I2C, + ASPEED_DEV_IOEXP1_I2C, + ASPEED_DEV_IOEXP0_I3C, + ASPEED_DEV_IOEXP1_I3C, + ASPEED_DEV_IOEXP0_INTCIO, + ASPEED_DEV_IOEXP1_INTCIO, + ASPEED_DEV_IPC0, + ASPEED_DEV_IPC1, + ASPEED_DEV_JTAG0, + ASPEED_DEV_JTAG1, + ASPEED_DEV_KCS, + ASPEED_DEV_LPC, + ASPEED_DEV_LTPI_CTRL1, + ASPEED_DEV_LTPI_CTRL2, + ASPEED_DEV_LTPI_IO0, + ASPEED_DEV_LTPI_IO1, + ASPEED_DEV_MII1, + ASPEED_DEV_MII2, + ASPEED_DEV_MII3, + ASPEED_DEV_MII4, + ASPEED_DEV_OTP, ASPEED_DEV_PCIE0, ASPEED_DEV_PCIE1, ASPEED_DEV_PCIE2, @@ -263,49 +255,57 @@ enum { ASPEED_DEV_PCIE_MMIO1, ASPEED_DEV_PCIE_MMIO2, ASPEED_DEV_PECI, - ASPEED_DEV_ETH1, - ASPEED_DEV_ETH2, - ASPEED_DEV_ETH3, - ASPEED_DEV_ETH4, - ASPEED_DEV_MII1, - ASPEED_DEV_MII2, - ASPEED_DEV_MII3, - ASPEED_DEV_MII4, - ASPEED_DEV_SDRAM, - ASPEED_DEV_XDMA, - ASPEED_DEV_EMMC, - ASPEED_DEV_KCS, - ASPEED_DEV_HACE, - ASPEED_DEV_ACRY, - ASPEED_DEV_DPMCU, - ASPEED_DEV_DP, - ASPEED_DEV_I3C, - ASPEED_DEV_ESPI, - ASPEED_DEV_UDC, - ASPEED_DEV_JTAG0, - ASPEED_DEV_JTAG1, - ASPEED_DEV_FSI1, - ASPEED_DEV_FSI2, + ASPEED_DEV_PRIC0, + ASPEED_DEV_PRIC1, + ASPEED_DEV_PWM, + ASPEED_DEV_RTC, + ASPEED_DEV_SBC, + ASPEED_DEV_SCU, ASPEED_DEV_SCUIO, + ASPEED_DEV_SDHCI, + ASPEED_DEV_SDMC, + ASPEED_DEV_SDRAM, + ASPEED_DEV_SGPIOM0, + ASPEED_DEV_SGPIOM1, ASPEED_DEV_SLI, ASPEED_DEV_SLIIO, + ASPEED_DEV_SPI_BOOT, + ASPEED_DEV_SPI0, + ASPEED_DEV_SPI1, + ASPEED_DEV_SPI2, + ASPEED_DEV_SRAM0, + ASPEED_DEV_SRAM1, + ASPEED_DEV_TIMER1, + ASPEED_DEV_TIMER2, + ASPEED_DEV_TIMER3, + ASPEED_DEV_TIMER4, + ASPEED_DEV_TIMER5, + ASPEED_DEV_TIMER6, + ASPEED_DEV_TIMER7, + ASPEED_DEV_TIMER8, + ASPEED_DEV_UART0, + ASPEED_DEV_UART1, + ASPEED_DEV_UART2, + ASPEED_DEV_UART3, + ASPEED_DEV_UART4, + ASPEED_DEV_UART5, + ASPEED_DEV_UART6, + ASPEED_DEV_UART7, + ASPEED_DEV_UART8, + ASPEED_DEV_UART9, + ASPEED_DEV_UART10, + ASPEED_DEV_UART11, + ASPEED_DEV_UART12, + ASPEED_DEV_UART13, + ASPEED_DEV_UDC, + ASPEED_DEV_VBOOTROM, + ASPEED_DEV_VIC, + ASPEED_DEV_VIDEO, + ASPEED_DEV_VUART, + ASPEED_DEV_WDT, + ASPEED_DEV_XDMA, ASPEED_GIC_DIST, ASPEED_GIC_REDIST, - ASPEED_DEV_IPC0, - ASPEED_DEV_IPC1, - ASPEED_DEV_LTPI_CTRL1, - ASPEED_DEV_LTPI_CTRL2, - ASPEED_DEV_LTPI_IO0, - ASPEED_DEV_LTPI_IO1, - ASPEED_DEV_IOEXP0_I2C, - ASPEED_DEV_IOEXP1_I2C, - ASPEED_DEV_IOEXP0_INTCIO, - ASPEED_DEV_IOEXP1_INTCIO, - ASPEED_DEV_IOEXP0_I3C, - ASPEED_DEV_IOEXP1_I3C, - ASPEED_DEV_PRIC0, - ASPEED_DEV_PRIC1, - ASPEED_DEV_OTP, }; const char *aspeed_soc_cpu_type(const char * const *valid_cpu_types); -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 2026-10-05 2:04 [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Jamin Lin 2026-10-05 2:04 ` [PATCH v2 1/2] hw/arm/aspeed: Sort device IDs alphabetically Jamin Lin @ 2026-10-05 2:04 ` Jamin Lin 2026-10-07 13:08 ` Cédric Le Goater 2026-10-07 13:10 ` [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Cédric Le Goater 2 siblings, 1 reply; 7+ messages in thread From: Jamin Lin @ 2026-10-05 2:04 UTC (permalink / raw) To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Jamin Lin, Troy Lee The IO expander test only checks the I2C bus of IO expander 0. The I2C buses of IO expander 1 are not tested, so a wrong interrupt wiring for IO expander 1 can not be detected. Add a TMP105 device on the first I2C bus of IO expander 1 and check that it can be read from firmware. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- tests/functional/aarch64/test_aspeed_ast2700a2.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py b/tests/functional/aarch64/test_aspeed_ast2700a2.py index 01c7c4fdbe..74ef93fc0d 100755 --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py @@ -196,10 +196,13 @@ def test_aarch64_ast2700a2_evb_ioexp_v11_03(self): self.vm.set_machine('ast2700a2-evb,fmc-model=w25q512jv') self.vm.add_args('-device', 'tmp105,bus=ioexp0.0,address=0x4d,id=tmp-test-16') + self.vm.add_args('-device', + 'tmp105,bus=ioexp1.0,address=0x4d,id=tmp-test-32') self.start_ast2700_test('ast2700-dcscm-image', 8) self.verify_openbmc_boot_and_login('ast2700-dcscm', False) self.do_ast2700_i2c_test(8) self.do_ast2700_i2c_test(16) + self.do_ast2700_i2c_test(32) if __name__ == '__main__': QemuSystemTest.main() -- 2.43.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 2026-10-05 2:04 ` [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 Jamin Lin @ 2026-10-07 13:08 ` Cédric Le Goater 0 siblings, 0 replies; 7+ messages in thread From: Cédric Le Goater @ 2026-10-07 13:08 UTC (permalink / raw) To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Troy Lee On 10/5/26 04:04, Jamin Lin wrote: > The IO expander test only checks the I2C bus of IO expander 0. The I2C > buses of IO expander 1 are not tested, so a wrong interrupt wiring for > IO expander 1 can not be detected. > > Add a TMP105 device on the first I2C bus of IO expander 1 and check that > it can be read from firmware. > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> > --- > tests/functional/aarch64/test_aspeed_ast2700a2.py | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/tests/functional/aarch64/test_aspeed_ast2700a2.py b/tests/functional/aarch64/test_aspeed_ast2700a2.py > index 01c7c4fdbe..74ef93fc0d 100755 > --- a/tests/functional/aarch64/test_aspeed_ast2700a2.py > +++ b/tests/functional/aarch64/test_aspeed_ast2700a2.py > @@ -196,10 +196,13 @@ def test_aarch64_ast2700a2_evb_ioexp_v11_03(self): > self.vm.set_machine('ast2700a2-evb,fmc-model=w25q512jv') > self.vm.add_args('-device', > 'tmp105,bus=ioexp0.0,address=0x4d,id=tmp-test-16') > + self.vm.add_args('-device', > + 'tmp105,bus=ioexp1.0,address=0x4d,id=tmp-test-32') > self.start_ast2700_test('ast2700-dcscm-image', 8) > self.verify_openbmc_boot_and_login('ast2700-dcscm', False) > self.do_ast2700_i2c_test(8) > self.do_ast2700_i2c_test(16) > + self.do_ast2700_i2c_test(32) > > if __name__ == '__main__': > QemuSystemTest.main() Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C. ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test 2026-10-05 2:04 [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Jamin Lin 2026-10-05 2:04 ` [PATCH v2 1/2] hw/arm/aspeed: Sort device IDs alphabetically Jamin Lin 2026-10-05 2:04 ` [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 Jamin Lin @ 2026-10-07 13:10 ` Cédric Le Goater 2026-10-08 0:52 ` Jamin Lin 2 siblings, 1 reply; 7+ messages in thread From: Cédric Le Goater @ 2026-10-07 13:10 UTC (permalink / raw) To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Troy Lee On 10/5/26 04:04, Jamin Lin wrote: > This series is split out from "[PATCH v1 0/11] hw/arm/aspeed: Use > unimp array and table for unimplemented devices" to make the changes > easier to review. > > v1 > 1. sorts the ASPEED device IDs alphabetically. This is already applied to aspeed-next along with : https://lore.kernel.org/qemu-devel/20260930072501.2612119-1-jamin_lin@aspeedtech.com/ > v2 > 1. Split the device ID sorting change out into a separate series. > 2. Fix the IO expander device IDs in the correct order. > 3. Add a functional test for IO Expander 1 I2C. Applied patch 2 to : https://github.com/legoater/qemu aspeed-next Thanks, C. > Jamin Lin (2): > hw/arm/aspeed: Sort device IDs alphabetically > tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO > expander 1 > > include/hw/arm/aspeed_soc.h | 176 +++++++++--------- > .../aarch64/test_aspeed_ast2700a2.py | 3 + > 2 files changed, 91 insertions(+), 88 deletions(-) > ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test 2026-10-07 13:10 ` [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Cédric Le Goater @ 2026-10-08 0:52 ` Jamin Lin 2026-10-08 21:09 ` Cédric Le Goater 0 siblings, 1 reply; 7+ messages in thread From: Jamin Lin @ 2026-10-08 0:52 UTC (permalink / raw) To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Troy Lee Hi Cédric > Subject: Re: [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO > expander test > > On 10/5/26 04:04, Jamin Lin wrote: > > This series is split out from "[PATCH v1 0/11] hw/arm/aspeed: Use > > unimp array and table for unimplemented devices" to make the changes > > easier to review. > > > > v1 > > 1. sorts the ASPEED device IDs alphabetically. > > This is already applied to aspeed-next along with : > https://lore.kernel.org/qemu-devel/20260930072501.2612119-1-jamin_lin@as > peedtech.com/ > Please apply the v2 patch instead. The v1 version breaks the AST2700 IO Expander 1 functionality. This is also why I added a functional test in v2 to catch this issue. As a result, the functional test currently fails on aspeed-next with the v1 patch applied. The v1 change is: ASPEED_DEV_IOEXP0_I2C, ASPEED_DEV_IOEXP0_I3C, ASPEED_DEV_IOEXP0_INTCIO, ASPEED_DEV_IOEXP1_I2C, ASPEED_DEV_IOEXP1_I3C, ASPEED_DEV_IOEXP1_INTCIO, The correct ordering in v2 is: https://patchwork.kernel.org/project/qemu-devel/patch/20261005020428.3496039-2-jamin_lin@aspeedtech.com/ + ASPEED_DEV_IOEXP0_I2C, + ASPEED_DEV_IOEXP1_I2C, + ASPEED_DEV_IOEXP0_I3C, + ASPEED_DEV_IOEXP1_I3C, + ASPEED_DEV_IOEXP0_INTCIO, + ASPEED_DEV_IOEXP1_INTCIO, Thanks for your help and support. Jamin > > v2 > > 1. Split the device ID sorting change out into a separate series. > > 2. Fix the IO expander device IDs in the correct order. > > 3. Add a functional test for IO Expander 1 I2C. > > > > Applied patch 2 to : > > https://github.com/legoater/qemu aspeed-next > > Thanks, > > C. > > > > Jamin Lin (2): > > hw/arm/aspeed: Sort device IDs alphabetically > > tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO > > expander 1 > > > > include/hw/arm/aspeed_soc.h | 176 > +++++++++--------- > > .../aarch64/test_aspeed_ast2700a2.py | 3 + > > 2 files changed, 91 insertions(+), 88 deletions(-) > > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test 2026-10-08 0:52 ` Jamin Lin @ 2026-10-08 21:09 ` Cédric Le Goater 0 siblings, 0 replies; 7+ messages in thread From: Cédric Le Goater @ 2026-10-08 21:09 UTC (permalink / raw) To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Kane Chen, Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs, open list:All patches CC here Cc: Troy Lee On 10/8/26 02:52, Jamin Lin wrote: > Hi Cédric > >> Subject: Re: [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO >> expander test >> >> On 10/5/26 04:04, Jamin Lin wrote: >>> This series is split out from "[PATCH v1 0/11] hw/arm/aspeed: Use >>> unimp array and table for unimplemented devices" to make the changes >>> easier to review. >>> >>> v1 >>> 1. sorts the ASPEED device IDs alphabetically. >> >> This is already applied to aspeed-next along with : >> https://lore.kernel.org/qemu-devel/20260930072501.2612119-1-jamin_lin@as >> peedtech.com/ >> > Please apply the v2 patch instead. done. C. > > The v1 version breaks the AST2700 IO Expander 1 functionality. This is also why I added a functional test in v2 to catch this issue. > As a result, the functional test currently fails on aspeed-next with the v1 patch applied. > > The v1 change is: > > ASPEED_DEV_IOEXP0_I2C, > ASPEED_DEV_IOEXP0_I3C, > ASPEED_DEV_IOEXP0_INTCIO, > ASPEED_DEV_IOEXP1_I2C, > ASPEED_DEV_IOEXP1_I3C, > ASPEED_DEV_IOEXP1_INTCIO, > > The correct ordering in v2 is: > https://patchwork.kernel.org/project/qemu-devel/patch/20261005020428.3496039-2-jamin_lin@aspeedtech.com/ > > + ASPEED_DEV_IOEXP0_I2C, > + ASPEED_DEV_IOEXP1_I2C, > + ASPEED_DEV_IOEXP0_I3C, > + ASPEED_DEV_IOEXP1_I3C, > + ASPEED_DEV_IOEXP0_INTCIO, > + ASPEED_DEV_IOEXP1_INTCIO, > > Thanks for your help and support. > > Jamin > >>> v2 >>> 1. Split the device ID sorting change out into a separate series. >>> 2. Fix the IO expander device IDs in the correct order. >>> 3. Add a functional test for IO Expander 1 I2C. >> >> >> >> Applied patch 2 to : >> >> https://github.com/legoater/qemu aspeed-next >> >> Thanks, >> >> C. >> >> >>> Jamin Lin (2): >>> hw/arm/aspeed: Sort device IDs alphabetically >>> tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO >>> expander 1 >>> >>> include/hw/arm/aspeed_soc.h | 176 >> +++++++++--------- >>> .../aarch64/test_aspeed_ast2700a2.py | 3 + >>> 2 files changed, 91 insertions(+), 88 deletions(-) >>> > ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-10-08 21:09 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-10-05 2:04 [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Jamin Lin 2026-10-05 2:04 ` [PATCH v2 1/2] hw/arm/aspeed: Sort device IDs alphabetically Jamin Lin 2026-10-05 2:04 ` [PATCH v2 2/2] tests/functional/aarch64/test_aspeed_ast2700a2: Add I2C test for IO expander 1 Jamin Lin 2026-10-07 13:08 ` Cédric Le Goater 2026-10-07 13:10 ` [PATCH v2 0/2] hw/arm/aspeed: Sort device IDs and add IO expander test Cédric Le Goater 2026-10-08 0:52 ` Jamin Lin 2026-10-08 21:09 ` Cédric Le Goater
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.