* [PATCH 0/3] Add pinctrl support to Exynos5420
@ 2013-06-12 14:51 Leela Krishna Amudala
2013-06-12 14:51 ` [PATCH 1/3] ARM: dts: add " Leela Krishna Amudala
` (2 more replies)
0 siblings, 3 replies; 14+ messages in thread
From: Leela Krishna Amudala @ 2013-06-12 14:51 UTC (permalink / raw)
To: linux-samsung-soc; +Cc: kgene.kim, dianders, sjg, thomas.ab, t.figa
This patchset adds the pinctrl support to Exynos5420.
This series is rebased and tested on master branch of
linux-next tree over Chander Kashyap patchset.
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg18623.html
Leela Krishna Amudala (3):
ARM: dts: add pinctrl support to Exynos5420
pinctrl: exynos: add exynos5420 SoC specific data
gpio: samsung: skip gpiolib registration if pinctrl support is
enabled for exynos5420
.../bindings/pinctrl/samsung-pinctrl.txt | 1 +
arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 680 ++++++++++++++++++++
arch/arm/boot/dts/exynos5420.dtsi | 45 ++
drivers/gpio/gpio-samsung.c | 1 +
drivers/pinctrl/pinctrl-exynos.c | 115 ++++
drivers/pinctrl/pinctrl-samsung.c | 2 +
drivers/pinctrl/pinctrl-samsung.h | 1 +
7 files changed, 845 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-pinctrl.dtsi
--
1.7.10.4
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 14:51 [PATCH 0/3] Add pinctrl support to Exynos5420 Leela Krishna Amudala @ 2013-06-12 14:51 ` Leela Krishna Amudala 2013-06-12 20:58 ` Tomasz Figa 2013-06-12 14:51 ` [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 Leela Krishna Amudala 2 siblings, 1 reply; 14+ messages in thread From: Leela Krishna Amudala @ 2013-06-12 14:51 UTC (permalink / raw) To: linux-samsung-soc; +Cc: kgene.kim, dianders, sjg, thomas.ab, t.figa Add the required pin configuration support to Exynos5420 using pinctrl interface. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 680 +++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5420.dtsi | 45 ++ 2 files changed, 725 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5420-pinctrl.dtsi diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi new file mode 100644 index 0000000..23b7521 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -0,0 +1,680 @@ +/* + * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device + * tree nodes are listed in this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/ { + pinctrl@13400000 { + gpy7: gpy7 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <23 0>, <24 0>, <25 0>, <25 1>, + <26 0>, <26 1>, <27 0>, <27 1>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <28 0>, <28 1>, <29 0>, <29 1>, + <30 0>, <30 1>, <31 0>, <31 1>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pinctrl@13410000 { + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc4: gpc4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpc0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpc0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpc0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpc0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpc1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpc1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpc1-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_int: sd1-int { + samsung,pins = "gpd1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpc1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5", "gpc1-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd1_bus8: sd1-bus-width8 { + samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpc2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpc2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpc2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpc2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <3>; + }; + }; + + pinctrl@14000000 { + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj4: gpj4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + cam_gpio_a: cam-gpio-a { + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", + "gpe1-0", "gpe1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_gpio_b: cam-gpio-b { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_i2c2_bus: cam-i2c2-bus { + samsung,pins = "gpf0-4", "gpf0-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + cam_spi1_bus: cam-spi1-bus { + samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_i2c1_bus: cam-i2c1-bus { + samsung,pins = "gpf0-2", "gpf0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + cam_i2c0_bus: cam-i2c0-bus { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + cam_spi0_bus: cam-spi0-bus { + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_bayrgb_bus: cam-bayrgb-bus { + samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", + "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", + "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", + "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", + "gpg2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@14010000 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb4: gpb4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpa0-4", "gpa0-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2c3_bus: i2c3-bus { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + uart3_data: uart3-data { + samsung,pins = "gpa1-4", "gpa1-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c4_hs_bus: i2c4-hs-bus { + samsung,pins = "gpa2-0", "gpa2-1"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c5_hs_bus: i2c5-hs-bus { + samsung,pins = "gpa2-2", "gpa2-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pcm2_bus: pcm2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spdif_bus: spdif-bus { + samsung,pins = "gpb1-0", "gpb1-1"; + samsung,pin-function = <4>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; + samsung,pin-function = <5>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c6_hs_bus: i2c6-hs-bus { + samsung,pins = "gpb1-3", "gpb1-4"; + samsung,pin-function = <4>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c7_hs_bus: i2c7-hs-bus { + samsung,pins = "gpb2-2", "gpb2-3"; + samsung,pin-function = <3>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpb3-0", "gpb3-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpb3-2", "gpb3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c8_hs_bus: i2c8-hs-bus { + samsung,pins = "gpb3-4", "gpb3-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c9_hs_bus: i2c9-hs-bus { + samsung,pins = "gpb3-6", "gpb3-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + i2c10_hs_bus: i2c10-hs-bus { + samsung,pins = "gpb4-0", "gpb4-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@03860000 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + i2s0_bus: i2s0-bus { + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", + "gpz-4", "gpz-5", "gpz-6"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 577dfe5..e7bf7c7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -15,9 +15,18 @@ /include/ "skeleton.dtsi" /include/ "exynos5.dtsi" +/include/ "exynos5420-pinctrl.dtsi" / { compatible = "samsung,exynos5420"; + aliases { + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + pinctrl3 = &pinctrl_3; + pinctrl4 = &pinctrl_4; + }; + clock: clock-controller@0x10010000 { compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; @@ -83,6 +92,42 @@ }; }; + pinctrl_0: pinctrl@13400000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x13400000 0x1000>; + interrupts = <0 45 0>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <0 32 0>; + }; + }; + + pinctrl_1: pinctrl@13410000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x13410000 0x1000>; + interrupts = <0 78 0>; + }; + + pinctrl_2: pinctrl@14000000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x14000000 0x1000>; + interrupts = <0 46 0>; + }; + + pinctrl_3: pinctrl@14010000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x14010000 0x1000>; + interrupts = <0 50 0>; + }; + + pinctrl_4: pinctrl@03860000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x03860000 0x1000>; + interrupts = <0 47 0>; + }; + serial@12C00000 { clocks = <&clock 257>, <&clock 128>; }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 14:51 ` [PATCH 1/3] ARM: dts: add " Leela Krishna Amudala @ 2013-06-12 20:58 ` Tomasz Figa 2013-06-12 21:20 ` Doug Anderson 2013-06-14 4:49 ` Leela Krishna Amudala 0 siblings, 2 replies; 14+ messages in thread From: Tomasz Figa @ 2013-06-12 20:58 UTC (permalink / raw) To: Leela Krishna Amudala Cc: linux-samsung-soc, kgene.kim, dianders, sjg, thomas.ab, t.figa, linus.walleij, s.nawrocki Hi Leela Krishna, On Wednesday 12 of June 2013 20:21:26 Leela Krishna Amudala wrote: > Add the required pin configuration support to Exynos5420 using pinctrl > interface. > > Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> > --- > arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 680 > +++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5420.dtsi > | 45 ++ > 2 files changed, 725 insertions(+) > create mode 100644 arch/arm/boot/dts/exynos5420-pinctrl.dtsi > > diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi > b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi new file mode 100644 > index 0000000..23b7521 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi > @@ -0,0 +1,680 @@ > +/* > + * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed > as device + * tree nodes are listed in this file. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as + > * published by the Free Software Foundation. > +*/ > + > +/ { > + pinctrl@13400000 { > + gpy7: gpy7 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; According to patch 2/3, this bank doesn't support interrupts, as it's defined using EINTN macro. Which variant is correct? > + }; > + > + gpx0: gpx0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + interrupt-parent = <&combiner>; > + #interrupt-cells = <2>; > + interrupts = <23 0>, <24 0>, <25 0>, <25 1>, > + <26 0>, <26 1>, <27 0>, <27 1>; > + }; > + > + gpx1: gpx1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + interrupt-parent = <&combiner>; > + #interrupt-cells = <2>; > + interrupts = <28 0>, <28 1>, <29 0>, <29 1>, > + <30 0>, <30 1>, <31 0>, <31 1>; > + }; > + > + gpx2: gpx2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpx3: gpx3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > + > + pinctrl@13410000 { > + gpc0: gpc0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpc1: gpc1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpc2: gpc2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpc3: gpc3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpc4: gpc4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd1: gpd1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpy0: gpy0 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy1: gpy1 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy2: gpy2 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy3: gpy3 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy4: gpy4 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy5: gpy5 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpy6: gpy6 { > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + sd0_clk: sd0-clk { > + samsung,pins = "gpc0-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_cmd: sd0-cmd { > + samsung,pins = "gpc0-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_cd: sd0-cd { > + samsung,pins = "gpc0-2"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_bus1: sd0-bus-width1 { > + samsung,pins = "gpc0-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_bus4: sd0-bus-width4 { > + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd0_bus8: sd0-bus-width8 { > + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; It seems like there is some inconsequence here, because sd0_bus4 setting includes pins of sd0_bus1, while sd0_bus8 doesn't include pins of sd0_bus4. I think it should be defined either first or second way, not mixed, but I don't have any strong preference over any of them. CCing some people to hopefully get some more opinion on this. > + sd1_clk: sd1-clk { > + samsung,pins = "gpc1-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd1_cmd: sd1-cmd { > + samsung,pins = "gpc1-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd1_cd: sd1-cd { > + samsung,pins = "gpc1-2"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd1_int: sd1-int { > + samsung,pins = "gpd1-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + sd1_bus1: sd1-bus-width1 { > + samsung,pins = "gpc1-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd1_bus4: sd1-bus-width4 { > + samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5", "gpc1-6"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd1_bus8: sd1-bus-width8 { > + samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; Same here. Rest of the patch looks fine to me. Reviewed-by: Tomasz Figa <t.figa@samsung.com> Best regards, Tomasz > + sd2_clk: sd2-clk { > + samsung,pins = "gpc2-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd2_cmd: sd2-cmd { > + samsung,pins = "gpc2-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + sd2_cd: sd2-cd { > + samsung,pins = "gpc2-2"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd2_bus1: sd2-bus-width1 { > + samsung,pins = "gpc2-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + > + sd2_bus4: sd2-bus-width4 { > + samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <3>; > + }; > + }; > + > + pinctrl@14000000 { > + gpe0: gpe0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpe1: gpe1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf0: gpf0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf1: gpf1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg0: gpg0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg1: gpg1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg2: gpg2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpj4: gpj4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + cam_gpio_a: cam-gpio-a { > + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", > + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", > + "gpe1-0", "gpe1-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + cam_gpio_b: cam-gpio-b { > + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", > + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + cam_i2c2_bus: cam-i2c2-bus { > + samsung,pins = "gpf0-4", "gpf0-5"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + cam_spi1_bus: cam-spi1-bus { > + samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; > + samsung,pin-function = <4>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + cam_i2c1_bus: cam-i2c1-bus { > + samsung,pins = "gpf0-2", "gpf0-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + cam_i2c0_bus: cam-i2c0-bus { > + samsung,pins = "gpf0-0", "gpf0-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + cam_spi0_bus: cam-spi0-bus { > + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + cam_bayrgb_bus: cam-bayrgb-bus { > + samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", > + "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", > + "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", > + "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", > + "gpg2-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + pinctrl@14010000 { > + gpa0: gpa0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpa1: gpa1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpa2: gpa2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb0: gpb0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb1: gpb1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb2: gpb2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb3: gpb3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb4: gpb4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gph0: gph0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + uart0_data: uart0-data { > + samsung,pins = "gpa0-0", "gpa0-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + uart0_fctl: uart0-fctl { > + samsung,pins = "gpa0-2", "gpa0-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + uart1_data: uart1-data { > + samsung,pins = "gpa0-4", "gpa0-5"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + uart1_fctl: uart1-fctl { > + samsung,pins = "gpa0-6", "gpa0-7"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + i2c2_bus: i2c2-bus { > + samsung,pins = "gpa0-6", "gpa0-7"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + uart2_data: uart2-data { > + samsung,pins = "gpa1-0", "gpa1-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + uart2_fctl: uart2-fctl { > + samsung,pins = "gpa1-2", "gpa1-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + i2c3_bus: i2c3-bus { > + samsung,pins = "gpa1-2", "gpa1-3"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + uart3_data: uart3-data { > + samsung,pins = "gpa1-4", "gpa1-5"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + spi0_bus: spi0-bus { > + samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + spi1_bus: spi1-bus { > + samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c4_hs_bus: i2c4-hs-bus { > + samsung,pins = "gpa2-0", "gpa2-1"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c5_hs_bus: i2c5-hs-bus { > + samsung,pins = "gpa2-2", "gpa2-3"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2s1_bus: i2s1-bus { > + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", > + "gpb0-4"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + pcm1_bus: pcm1-bus { > + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", > + "gpb0-4"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + i2s2_bus: i2s2-bus { > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", > + "gpb1-4"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + pcm2_bus: pcm2-bus { > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", > + "gpb1-4"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + spdif_bus: spdif-bus { > + samsung,pins = "gpb1-0", "gpb1-1"; > + samsung,pin-function = <4>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + spi2_bus: spi2-bus { > + samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; > + samsung,pin-function = <5>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c6_hs_bus: i2c6-hs-bus { > + samsung,pins = "gpb1-3", "gpb1-4"; > + samsung,pin-function = <4>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c7_hs_bus: i2c7-hs-bus { > + samsung,pins = "gpb2-2", "gpb2-3"; > + samsung,pin-function = <3>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c0_bus: i2c0-bus { > + samsung,pins = "gpb3-0", "gpb3-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c1_bus: i2c1-bus { > + samsung,pins = "gpb3-2", "gpb3-3"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c8_hs_bus: i2c8-hs-bus { > + samsung,pins = "gpb3-4", "gpb3-5"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c9_hs_bus: i2c9-hs-bus { > + samsung,pins = "gpb3-6", "gpb3-7"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + > + i2c10_hs_bus: i2c10-hs-bus { > + samsung,pins = "gpb4-0", "gpb4-1"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <3>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + pinctrl@03860000 { > + gpz: gpz { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + i2s0_bus: i2s0-bus { > + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", > + "gpz-4", "gpz-5", "gpz-6"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > +}; > diff --git a/arch/arm/boot/dts/exynos5420.dtsi > b/arch/arm/boot/dts/exynos5420.dtsi index 577dfe5..e7bf7c7 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -15,9 +15,18 @@ > > /include/ "skeleton.dtsi" > /include/ "exynos5.dtsi" > +/include/ "exynos5420-pinctrl.dtsi" > / { > compatible = "samsung,exynos5420"; > > + aliases { > + pinctrl0 = &pinctrl_0; > + pinctrl1 = &pinctrl_1; > + pinctrl2 = &pinctrl_2; > + pinctrl3 = &pinctrl_3; > + pinctrl4 = &pinctrl_4; > + }; > + > clock: clock-controller@0x10010000 { > compatible = "samsung,exynos5420-clock"; > reg = <0x10010000 0x30000>; > @@ -83,6 +92,42 @@ > }; > }; > > + pinctrl_0: pinctrl@13400000 { > + compatible = "samsung,exynos5420-pinctrl"; > + reg = <0x13400000 0x1000>; > + interrupts = <0 45 0>; > + > + wakeup-interrupt-controller { > + compatible = "samsung,exynos4210-wakeup-eint"; > + interrupt-parent = <&gic>; > + interrupts = <0 32 0>; > + }; > + }; > + > + pinctrl_1: pinctrl@13410000 { > + compatible = "samsung,exynos5420-pinctrl"; > + reg = <0x13410000 0x1000>; > + interrupts = <0 78 0>; > + }; > + > + pinctrl_2: pinctrl@14000000 { > + compatible = "samsung,exynos5420-pinctrl"; > + reg = <0x14000000 0x1000>; > + interrupts = <0 46 0>; > + }; > + > + pinctrl_3: pinctrl@14010000 { > + compatible = "samsung,exynos5420-pinctrl"; > + reg = <0x14010000 0x1000>; > + interrupts = <0 50 0>; > + }; > + > + pinctrl_4: pinctrl@03860000 { > + compatible = "samsung,exynos5420-pinctrl"; > + reg = <0x03860000 0x1000>; > + interrupts = <0 47 0>; > + }; > + > serial@12C00000 { > clocks = <&clock 257>, <&clock 128>; > }; ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 20:58 ` Tomasz Figa @ 2013-06-12 21:20 ` Doug Anderson 2013-06-12 21:35 ` Doug Anderson 2013-06-14 12:21 ` Leela Krishna Amudala 2013-06-14 4:49 ` Leela Krishna Amudala 1 sibling, 2 replies; 14+ messages in thread From: Doug Anderson @ 2013-06-12 21:20 UTC (permalink / raw) To: Tomasz Figa Cc: Leela Krishna Amudala, linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa, Linus Walleij, s.nawrocki Tomasz, On Wed, Jun 12, 2013 at 1:58 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: >> + pinctrl@13400000 { >> + gpy7: gpy7 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; > > According to patch 2/3, this bank doesn't support interrupts, as it's > defined using EINTN macro. Which variant is correct? As far as I know the GPY registers don't support interrupts, so this should be removed. Nice catch! >> + sd0_bus1: sd0-bus-width1 { >> + samsung,pins = "gpc0-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus4: sd0-bus-width4 { >> + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", > "gpc0-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus8: sd0-bus-width8 { >> + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", > "gpc3-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; > > > It seems like there is some inconsequence here, because sd0_bus4 setting > includes pins of sd0_bus1, while sd0_bus8 doesn't include pins of > sd0_bus4. > > I think it should be defined either first or second way, not mixed, but I > don't have any strong preference over any of them. > > CCing some people to hopefully get some more opinion on this. Yeah, I brought this up on 5250, but somehow it looks like it landed without getting changed. I agree it should be one way or the other. Feel free to add my Reviewed-by. The differences between the code you sent up and our ToT are: * You properly set the i2c4 drive strength to 0 to match all others. * You don't yet have the HDMI hot plug detect IRQ defined. ...but that looks slightly wrong in our tree anyway and can be added later. Reviewed-by: Doug Anderson <dianders@chromium.org> -Doug ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 21:20 ` Doug Anderson @ 2013-06-12 21:35 ` Doug Anderson 2013-06-12 21:38 ` Tomasz Figa 2013-06-14 12:21 ` Leela Krishna Amudala 1 sibling, 1 reply; 14+ messages in thread From: Doug Anderson @ 2013-06-12 21:35 UTC (permalink / raw) To: Tomasz Figa Cc: Leela Krishna Amudala, linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa, Linus Walleij, s.nawrocki Tomasz, On Wed, Jun 12, 2013 at 2:20 PM, Doug Anderson <dianders@chromium.org> wrote: > Tomasz, > > On Wed, Jun 12, 2013 at 1:58 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: >>> + pinctrl@13400000 { >>> + gpy7: gpy7 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >> >> According to patch 2/3, this bank doesn't support interrupts, as it's >> defined using EINTN macro. Which variant is correct? > > As far as I know the GPY registers don't support interrupts, so this > should be removed. Nice catch! Argh. I'm not sure what I was just searching before (I probably messed up and searched for gpy6 or something), but I just searched again and am now seeing that GPY7 actually does support interrupts, unlike all of the other gpy banks. -Doug ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 21:35 ` Doug Anderson @ 2013-06-12 21:38 ` Tomasz Figa 0 siblings, 0 replies; 14+ messages in thread From: Tomasz Figa @ 2013-06-12 21:38 UTC (permalink / raw) To: Doug Anderson Cc: Leela Krishna Amudala, linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa, Linus Walleij, s.nawrocki On Wednesday 12 of June 2013 14:35:30 Doug Anderson wrote: > Tomasz, > > On Wed, Jun 12, 2013 at 2:20 PM, Doug Anderson <dianders@chromium.org> wrote: > > Tomasz, > > > > On Wed, Jun 12, 2013 at 1:58 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > >>> + pinctrl@13400000 { > >>> + gpy7: gpy7 { > >>> + gpio-controller; > >>> + #gpio-cells = <2>; > >>> + > >>> + interrupt-controller; > >>> + #interrupt-cells = <2>; > >> > >> According to patch 2/3, this bank doesn't support interrupts, as it's > >> defined using EINTN macro. Which variant is correct? > > > > As far as I know the GPY registers don't support interrupts, so this > > should be removed. Nice catch! > > Argh. I'm not sure what I was just searching before (I probably > messed up and searched for gpy6 or something), but I just searched > again and am now seeing that GPY7 actually does support interrupts, > unlike all of the other gpy banks. This or other way, one of the patches needs to be fixed. If this bank supports interrupts, the patch adding driver data needs to be adjusted to use the EINTG macro. Best regards, Tomasz ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 21:20 ` Doug Anderson 2013-06-12 21:35 ` Doug Anderson @ 2013-06-14 12:21 ` Leela Krishna Amudala 2013-06-16 4:23 ` Doug Anderson 1 sibling, 1 reply; 14+ messages in thread From: Leela Krishna Amudala @ 2013-06-14 12:21 UTC (permalink / raw) To: Doug Anderson Cc: Tomasz Figa, Leela Krishna Amudala, linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa, Linus Walleij, Sylwester Nawrocki Hi Doug, On Thu, Jun 13, 2013 at 2:50 AM, Doug Anderson <dianders@chromium.org> wrote: > Tomasz, > > On Wed, Jun 12, 2013 at 1:58 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: >>> + pinctrl@13400000 { >>> + gpy7: gpy7 { >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >> >> According to patch 2/3, this bank doesn't support interrupts, as it's >> defined using EINTN macro. Which variant is correct? > > As far as I know the GPY registers don't support interrupts, so this > should be removed. Nice catch! > >>> + sd0_bus1: sd0-bus-width1 { >>> + samsung,pins = "gpc0-3"; >>> + samsung,pin-function = <2>; >>> + samsung,pin-pud = <3>; >>> + samsung,pin-drv = <3>; >>> + }; >>> + >>> + sd0_bus4: sd0-bus-width4 { >>> + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", >> "gpc0-6"; >>> + samsung,pin-function = <2>; >>> + samsung,pin-pud = <3>; >>> + samsung,pin-drv = <3>; >>> + }; >>> + >>> + sd0_bus8: sd0-bus-width8 { >>> + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", >> "gpc3-3"; >>> + samsung,pin-function = <2>; >>> + samsung,pin-pud = <3>; >>> + samsung,pin-drv = <3>; >>> + }; >> >> >> It seems like there is some inconsequence here, because sd0_bus4 setting >> includes pins of sd0_bus1, while sd0_bus8 doesn't include pins of >> sd0_bus4. >> >> I think it should be defined either first or second way, not mixed, but I >> don't have any strong preference over any of them. >> >> CCing some people to hopefully get some more opinion on this. > > Yeah, I brought this up on 5250, but somehow it looks like it landed > without getting changed. I agree it should be one way or the other. > > Here the GPIO pins added for sd0_bus1, sd0_bus4 and sd0_bus8 are correct Please look at the below example dwmmc node configured for 8bit bus width dwmmc0@12200000 { /*...*/ pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; slot@0 { reg = <0>; bus-width = <8>; }; }; In the above node we are specifying "&sd0_bus4 &sd0_bus8" in pinctrl-0 Pinctrl driver will configure the respective gpio pins given in sd0_bus4 and sd0_bus8 nodes. (which are "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6", "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3") But if we make gpio entries for sd0_bus1, sd0_bus4 and sd0_bus8 like below sd0_bus1: sd0-bus-width1 { samsung,pins = "gpc0-3"; /*...*/ }; sd0_bus4: sd0-bus-width4 { samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; /*...*/ }; sd0_bus8: sd0-bus-width8 { samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; /*...*/ }; we have to make entries like below for dwmmc node to configure 8bit bus width. pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; or if we choose like below sd0_bus1: sd0-bus-width1 { samsung,pins = "gpc0-3"; /*...*/ }; sd0_bus4: sd0-bus-width4 { samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; /*...*/ }; sd0_bus8: sd0-bus-width8 { samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6", "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; /*...*/ }; Then specifying pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; is enough Because all the other boards have the similar kind of nodes specified in their DT files, I followed the same convention. Best Wishes, Leela Krishna Amudala. > Feel free to add my Reviewed-by. The differences between the code you > sent up and our ToT are: > * You properly set the i2c4 drive strength to 0 to match all others. > * You don't yet have the HDMI hot plug detect IRQ defined. ...but > that looks slightly wrong in our tree anyway and can be added later. > > Reviewed-by: Doug Anderson <dianders@chromium.org> > > -Doug > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-14 12:21 ` Leela Krishna Amudala @ 2013-06-16 4:23 ` Doug Anderson 0 siblings, 0 replies; 14+ messages in thread From: Doug Anderson @ 2013-06-16 4:23 UTC (permalink / raw) To: Leela Krishna Amudala Cc: Tomasz Figa, linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa, Linus Walleij, Sylwester Nawrocki Leela On Fri, Jun 14, 2013 at 5:21 AM, Leela Krishna Amudala <l.krishna@samsung.com> wrote: > Here the GPIO pins added for sd0_bus1, sd0_bus4 and sd0_bus8 are correct > Please look at the below example dwmmc node configured for 8bit bus width > > dwmmc0@12200000 { > /*...*/ > pinctrl-names = "default"; > pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; > > slot@0 { > reg = <0>; > bus-width = <8>; > }; > }; > > In the above node we are specifying "&sd0_bus4 &sd0_bus8" in pinctrl-0 > Pinctrl driver will configure the respective gpio pins given in > sd0_bus4 and sd0_bus8 nodes. > (which are "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6", "gpc3-0", "gpc3-1", > "gpc3-2", "gpc3-3") > > But if we make gpio entries for sd0_bus1, sd0_bus4 and sd0_bus8 like below > > sd0_bus1: sd0-bus-width1 { > samsung,pins = "gpc0-3"; > /*...*/ > }; > > sd0_bus4: sd0-bus-width4 { > samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; > /*...*/ > }; > > sd0_bus8: sd0-bus-width8 { > samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; > /*...*/ > }; > > we have to make entries like below for dwmmc node to configure 8bit bus width. > pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; > > or if we choose like below > > sd0_bus1: sd0-bus-width1 { > samsung,pins = "gpc0-3"; > /*...*/ > }; > > sd0_bus4: sd0-bus-width4 { > samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; > /*...*/ > }; > > sd0_bus8: sd0-bus-width8 { > samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", > "gpc0-6", "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; > /*...*/ > }; > > Then specifying pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; is enough > > Because all the other boards have the similar kind of nodes specified > in their DT files, I followed the same convention. Right. I think what we're saying here is that all the other boards are wrong and ought to be fixed in a separate patch. ...following existing convention is often a good thing to do, but in this case we're asking to break convention and do the correct thing. I think Tomasz expressed a desire to use the syntax: pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; -Doug ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: add pinctrl support to Exynos5420 2013-06-12 20:58 ` Tomasz Figa 2013-06-12 21:20 ` Doug Anderson @ 2013-06-14 4:49 ` Leela Krishna Amudala 1 sibling, 0 replies; 14+ messages in thread From: Leela Krishna Amudala @ 2013-06-14 4:49 UTC (permalink / raw) To: Tomasz Figa Cc: Leela Krishna Amudala, linux-samsung-soc, Kukjin Kim, dianders, sjg, thomas.ab@samsung.com, t.figa, linus.walleij, Sylwester Nawrocki Hi Tomasz, Thanks for reviewing the patchset/ On Thu, Jun 13, 2013 at 2:28 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > Hi Leela Krishna, > > On Wednesday 12 of June 2013 20:21:26 Leela Krishna Amudala wrote: >> Add the required pin configuration support to Exynos5420 using pinctrl >> interface. >> >> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> >> --- >> arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 680 >> +++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5420.dtsi >> | 45 ++ >> 2 files changed, 725 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-pinctrl.dtsi >> >> diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi >> b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi new file mode 100644 >> index 0000000..23b7521 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi >> @@ -0,0 +1,680 @@ >> +/* >> + * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed >> as device + * tree nodes are listed in this file. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as + >> * published by the Free Software Foundation. >> +*/ >> + >> +/ { >> + pinctrl@13400000 { >> + gpy7: gpy7 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; > > According to patch 2/3, this bank doesn't support interrupts, as it's > defined using EINTN macro. Which variant is correct? > Its my mistake, gpy7 will support interrupts, so I'll change EINTN to EINTG in other patch. >> + }; >> + >> + gpx0: gpx0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + interrupt-parent = <&combiner>; >> + #interrupt-cells = <2>; >> + interrupts = <23 0>, <24 0>, <25 0>, <25 1>, >> + <26 0>, <26 1>, <27 0>, <27 1>; >> + }; >> + >> + gpx1: gpx1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + interrupt-parent = <&combiner>; >> + #interrupt-cells = <2>; >> + interrupts = <28 0>, <28 1>, <29 0>, <29 1>, >> + <30 0>, <30 1>, <31 0>, <31 1>; >> + }; >> + >> + gpx2: gpx2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpx3: gpx3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + }; >> + >> + pinctrl@13410000 { >> + gpc0: gpc0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpc1: gpc1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpc2: gpc2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpc3: gpc3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpc4: gpc4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpd1: gpd1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpy0: gpy0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy1: gpy1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy2: gpy2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy3: gpy3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy4: gpy4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy5: gpy5 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + gpy6: gpy6 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; >> + >> + sd0_clk: sd0-clk { >> + samsung,pins = "gpc0-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_cmd: sd0-cmd { >> + samsung,pins = "gpc0-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_cd: sd0-cd { >> + samsung,pins = "gpc0-2"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus1: sd0-bus-width1 { >> + samsung,pins = "gpc0-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus4: sd0-bus-width4 { >> + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", > "gpc0-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd0_bus8: sd0-bus-width8 { >> + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", > "gpc3-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; > > > It seems like there is some inconsequence here, because sd0_bus4 setting > includes pins of sd0_bus1, while sd0_bus8 doesn't include pins of > sd0_bus4. > > I think it should be defined either first or second way, not mixed, but I > don't have any strong preference over any of them. > > CCing some people to hopefully get some more opinion on this. > I'll check and post the appropriate changes to this. Best Wishes, Leela Krishna Amudala. >> + sd1_clk: sd1-clk { >> + samsung,pins = "gpc1-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd1_cmd: sd1-cmd { >> + samsung,pins = "gpc1-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd1_cd: sd1-cd { >> + samsung,pins = "gpc1-2"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd1_int: sd1-int { >> + samsung,pins = "gpd1-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + sd1_bus1: sd1-bus-width1 { >> + samsung,pins = "gpc1-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd1_bus4: sd1-bus-width4 { >> + samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5", > "gpc1-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd1_bus8: sd1-bus-width8 { >> + samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", > "gpd1-7"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; > > Same here. > > Rest of the patch looks fine to me. > > Reviewed-by: Tomasz Figa <t.figa@samsung.com> > > Best regards, > Tomasz > >> + sd2_clk: sd2-clk { >> + samsung,pins = "gpc2-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd2_cmd: sd2-cmd { >> + samsung,pins = "gpc2-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd2_cd: sd2-cd { >> + samsung,pins = "gpc2-2"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd2_bus1: sd2-bus-width1 { >> + samsung,pins = "gpc2-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + sd2_bus4: sd2-bus-width4 { >> + samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", > "gpc2-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <3>; >> + }; >> + }; >> + >> + pinctrl@14000000 { >> + gpe0: gpe0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpe1: gpe1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf0: gpf0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf1: gpf1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg0: gpg0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg1: gpg1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg2: gpg2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpj4: gpj4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + cam_gpio_a: cam-gpio-a { >> + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", > "gpe0-3", >> + "gpe0-4", "gpe0-5", "gpe0-6", > "gpe0-7", >> + "gpe1-0", "gpe1-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_gpio_b: cam-gpio-b { >> + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", > "gpf0-3", >> + "gpf1-0", "gpf1-1", "gpf1-2", > "gpf1-3"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_i2c2_bus: cam-i2c2-bus { >> + samsung,pins = "gpf0-4", "gpf0-5"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + cam_spi1_bus: cam-spi1-bus { >> + samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", > "gpf0-3"; >> + samsung,pin-function = <4>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_i2c1_bus: cam-i2c1-bus { >> + samsung,pins = "gpf0-2", "gpf0-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_i2c0_bus: cam-i2c0-bus { >> + samsung,pins = "gpf0-0", "gpf0-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_spi0_bus: cam-spi0-bus { >> + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", > "gpf1-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + cam_bayrgb_bus: cam-bayrgb-bus { >> + samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", > "gpg0-3", >> + "gpg0-4", "gpg0-5", "gpg0-6", > "gpg0-7", >> + "gpg1-0", "gpg1-1", "gpg1-2", > "gpg1-3", >> + "gpg1-4", "gpg1-5", "gpg1-6", > "gpg1-7", >> + "gpg2-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + pinctrl@14010000 { >> + gpa0: gpa0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpa1: gpa1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpa2: gpa2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb0: gpb0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb1: gpb1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb2: gpb2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb3: gpb3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb4: gpb4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gph0: gph0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + uart0_data: uart0-data { >> + samsung,pins = "gpa0-0", "gpa0-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart0_fctl: uart0-fctl { >> + samsung,pins = "gpa0-2", "gpa0-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart1_data: uart1-data { >> + samsung,pins = "gpa0-4", "gpa0-5"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart1_fctl: uart1-fctl { >> + samsung,pins = "gpa0-6", "gpa0-7"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c2_bus: i2c2-bus { >> + samsung,pins = "gpa0-6", "gpa0-7"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart2_data: uart2-data { >> + samsung,pins = "gpa1-0", "gpa1-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart2_fctl: uart2-fctl { >> + samsung,pins = "gpa1-2", "gpa1-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c3_bus: i2c3-bus { >> + samsung,pins = "gpa1-2", "gpa1-3"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + uart3_data: uart3-data { >> + samsung,pins = "gpa1-4", "gpa1-5"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + spi0_bus: spi0-bus { >> + samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", > "gpa2-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + spi1_bus: spi1-bus { >> + samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c4_hs_bus: i2c4-hs-bus { >> + samsung,pins = "gpa2-0", "gpa2-1"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c5_hs_bus: i2c5-hs-bus { >> + samsung,pins = "gpa2-2", "gpa2-3"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2s1_bus: i2s1-bus { >> + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", > "gpb0-3", >> + "gpb0-4"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + pcm1_bus: pcm1-bus { >> + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", > "gpb0-3", >> + "gpb0-4"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2s2_bus: i2s2-bus { >> + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", > "gpb1-3", >> + "gpb1-4"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + pcm2_bus: pcm2-bus { >> + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", > "gpb1-3", >> + "gpb1-4"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + spdif_bus: spdif-bus { >> + samsung,pins = "gpb1-0", "gpb1-1"; >> + samsung,pin-function = <4>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + spi2_bus: spi2-bus { >> + samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; >> + samsung,pin-function = <5>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c6_hs_bus: i2c6-hs-bus { >> + samsung,pins = "gpb1-3", "gpb1-4"; >> + samsung,pin-function = <4>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c7_hs_bus: i2c7-hs-bus { >> + samsung,pins = "gpb2-2", "gpb2-3"; >> + samsung,pin-function = <3>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c0_bus: i2c0-bus { >> + samsung,pins = "gpb3-0", "gpb3-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c1_bus: i2c1-bus { >> + samsung,pins = "gpb3-2", "gpb3-3"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c8_hs_bus: i2c8-hs-bus { >> + samsung,pins = "gpb3-4", "gpb3-5"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c9_hs_bus: i2c9-hs-bus { >> + samsung,pins = "gpb3-6", "gpb3-7"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + i2c10_hs_bus: i2c10-hs-bus { >> + samsung,pins = "gpb4-0", "gpb4-1"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <3>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + pinctrl@03860000 { >> + gpz: gpz { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + i2s0_bus: i2s0-bus { >> + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", >> + "gpz-4", "gpz-5", "gpz-6"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> +}; >> diff --git a/arch/arm/boot/dts/exynos5420.dtsi >> b/arch/arm/boot/dts/exynos5420.dtsi index 577dfe5..e7bf7c7 100644 >> --- a/arch/arm/boot/dts/exynos5420.dtsi >> +++ b/arch/arm/boot/dts/exynos5420.dtsi >> @@ -15,9 +15,18 @@ >> >> /include/ "skeleton.dtsi" >> /include/ "exynos5.dtsi" >> +/include/ "exynos5420-pinctrl.dtsi" >> / { >> compatible = "samsung,exynos5420"; >> >> + aliases { >> + pinctrl0 = &pinctrl_0; >> + pinctrl1 = &pinctrl_1; >> + pinctrl2 = &pinctrl_2; >> + pinctrl3 = &pinctrl_3; >> + pinctrl4 = &pinctrl_4; >> + }; >> + >> clock: clock-controller@0x10010000 { >> compatible = "samsung,exynos5420-clock"; >> reg = <0x10010000 0x30000>; >> @@ -83,6 +92,42 @@ >> }; >> }; >> >> + pinctrl_0: pinctrl@13400000 { >> + compatible = "samsung,exynos5420-pinctrl"; >> + reg = <0x13400000 0x1000>; >> + interrupts = <0 45 0>; >> + >> + wakeup-interrupt-controller { >> + compatible = "samsung,exynos4210-wakeup-eint"; >> + interrupt-parent = <&gic>; >> + interrupts = <0 32 0>; >> + }; >> + }; >> + >> + pinctrl_1: pinctrl@13410000 { >> + compatible = "samsung,exynos5420-pinctrl"; >> + reg = <0x13410000 0x1000>; >> + interrupts = <0 78 0>; >> + }; >> + >> + pinctrl_2: pinctrl@14000000 { >> + compatible = "samsung,exynos5420-pinctrl"; >> + reg = <0x14000000 0x1000>; >> + interrupts = <0 46 0>; >> + }; >> + >> + pinctrl_3: pinctrl@14010000 { >> + compatible = "samsung,exynos5420-pinctrl"; >> + reg = <0x14010000 0x1000>; >> + interrupts = <0 50 0>; >> + }; >> + >> + pinctrl_4: pinctrl@03860000 { >> + compatible = "samsung,exynos5420-pinctrl"; >> + reg = <0x03860000 0x1000>; >> + interrupts = <0 47 0>; >> + }; >> + >> serial@12C00000 { >> clocks = <&clock 257>, <&clock 128>; >> }; > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data 2013-06-12 14:51 [PATCH 0/3] Add pinctrl support to Exynos5420 Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 1/3] ARM: dts: add " Leela Krishna Amudala @ 2013-06-12 14:51 ` Leela Krishna Amudala 2013-06-12 21:00 ` Tomasz Figa 2013-06-12 21:37 ` Doug Anderson 2013-06-12 14:51 ` [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 Leela Krishna Amudala 2 siblings, 2 replies; 14+ messages in thread From: Leela Krishna Amudala @ 2013-06-12 14:51 UTC (permalink / raw) To: linux-samsung-soc; +Cc: kgene.kim, dianders, sjg, thomas.ab, t.figa Add Samsung Exynos5420 SoC specific data to enable pinctrl support for all platforms based on Exynos5420. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> --- .../bindings/pinctrl/samsung-pinctrl.txt | 1 + drivers/pinctrl/pinctrl-exynos.c | 115 ++++++++++++++++++++ drivers/pinctrl/pinctrl-samsung.c | 2 + drivers/pinctrl/pinctrl-samsung.h | 1 + 4 files changed, 119 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index b2bc219..fe949c7 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -15,6 +15,7 @@ Required Properties: - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. + - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index 2d76f66..753a8cd 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -941,3 +941,118 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = { .label = "exynos5250-gpio-ctrl3", }, }; + +/* pin banks of exynos5420 pin-controller 0 */ +static struct samsung_pin_bank exynos5420_pin_banks0[] = { + EXYNOS_PIN_BANK_EINTN(8, 0x000, "gpy7"), + EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), +}; + +/* pin banks of exynos5420 pin-controller 1 */ +static struct samsung_pin_bank exynos5420_pin_banks1[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpc0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc1", 0x04), + EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08), + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpc3", 0x0c), + EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpc4", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpd1", 0x14), + EXYNOS_PIN_BANK_EINTN(6, 0x0C0, "gpy0"), + EXYNOS_PIN_BANK_EINTN(4, 0x0E0, "gpy1"), + EXYNOS_PIN_BANK_EINTN(6, 0x100, "gpy2"), + EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpy3"), + EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpy4"), + EXYNOS_PIN_BANK_EINTN(8, 0x160, "gpy5"), + EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy6"), +}; + +/* pin banks of exynos5420 pin-controller 2 */ +static struct samsung_pin_bank exynos5420_pin_banks2[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00), + EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04), + EXYNOS_PIN_BANK_EINTG(6, 0x040, "gpf0", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpf1", 0x0c), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14), + EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpg2", 0x18), + EXYNOS_PIN_BANK_EINTG(4, 0x0E0, "gpj4", 0x1c), +}; + +/* pin banks of exynos5420 pin-controller 3 */ +static struct samsung_pin_bank exynos5420_pin_banks3[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpb3", 0x18), + EXYNOS_PIN_BANK_EINTG(2, 0x0E0, "gpb4", 0x1c), + EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph0", 0x20), +}; + +/* pin banks of exynos5420 pin-controller 4 */ +static struct samsung_pin_bank exynos5420_pin_banks4[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpz", 0x00), +}; + +/* + * Samsung pinctrl driver data for Exynos5420 SoC. Exynos5420 SoC includes + * four gpio/pin-mux/pinconfig controllers. + */ +struct samsung_pin_ctrl exynos5420_pin_ctrl[] = { + { + /* pin-controller instance 0 data */ + .pin_banks = exynos5420_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks0), + .weint_con = EXYNOS_WKUP_ECON_OFFSET, + .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, + .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .label = "exynos5420-gpio-ctrl0", + }, { + /* pin-controller instance 1 data */ + .pin_banks = exynos5420_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks1), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5420-gpio-ctrl1", + }, { + /* pin-controller instance 2 data */ + .pin_banks = exynos5420_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks2), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5420-gpio-ctrl2", + }, { + /* pin-controller instance 3 data */ + .pin_banks = exynos5420_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks3), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5420-gpio-ctrl3", + }, { + /* pin-controller instance 4 data */ + .pin_banks = exynos5420_pin_banks4, + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks4), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .label = "exynos5420-gpio-ctrl4", + }, +}; diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index e67ff1b..0a6c720 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -1113,6 +1113,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = (void *)exynos4x12_pin_ctrl }, { .compatible = "samsung,exynos5250-pinctrl", .data = (void *)exynos5250_pin_ctrl }, + { .compatible = "samsung,exynos5420-pinctrl", + .data = (void *)exynos5420_pin_ctrl }, #endif #ifdef CONFIG_PINCTRL_S3C64XX { .compatible = "samsung,s3c64xx-pinctrl", diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h index 79fcc20..954eeaf 100644 --- a/drivers/pinctrl/pinctrl-samsung.h +++ b/drivers/pinctrl/pinctrl-samsung.h @@ -259,5 +259,6 @@ extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2416_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2440_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2450_pin_ctrl[]; +extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; #endif /* __PINCTRL_SAMSUNG_H */ -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data 2013-06-12 14:51 ` [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data Leela Krishna Amudala @ 2013-06-12 21:00 ` Tomasz Figa 2013-06-12 21:37 ` Doug Anderson 1 sibling, 0 replies; 14+ messages in thread From: Tomasz Figa @ 2013-06-12 21:00 UTC (permalink / raw) To: Leela Krishna Amudala Cc: linux-samsung-soc, kgene.kim, dianders, sjg, thomas.ab, t.figa Hi Leela Krishna, On Wednesday 12 of June 2013 20:21:27 Leela Krishna Amudala wrote: > Add Samsung Exynos5420 SoC specific data to enable pinctrl support for > all platforms based on Exynos5420. > > Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> > --- > .../bindings/pinctrl/samsung-pinctrl.txt | 1 + > drivers/pinctrl/pinctrl-exynos.c | 115 > ++++++++++++++++++++ drivers/pinctrl/pinctrl-samsung.c > | 2 + > drivers/pinctrl/pinctrl-samsung.h | 1 + > 4 files changed, 119 insertions(+) Looks good to me. Reviewed-by: Tomasz Figa <t.figa@samsung.com> Best regards, Tomasz > diff --git > a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index > b2bc219..fe949c7 100644 > --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > @@ -15,6 +15,7 @@ Required Properties: > - "samsung,exynos4210-pinctrl": for Exynos4210 compatible > pin-controller. - "samsung,exynos4x12-pinctrl": for Exynos4x12 > compatible pin-controller. - "samsung,exynos5250-pinctrl": for > Exynos5250 compatible pin-controller. + - > "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. > > - reg: Base address of the pin controller hardware module and length of > the address space it occupies. > diff --git a/drivers/pinctrl/pinctrl-exynos.c > b/drivers/pinctrl/pinctrl-exynos.c index 2d76f66..753a8cd 100644 > --- a/drivers/pinctrl/pinctrl-exynos.c > +++ b/drivers/pinctrl/pinctrl-exynos.c > @@ -941,3 +941,118 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = { > .label = "exynos5250-gpio-ctrl3", > }, > }; > + > +/* pin banks of exynos5420 pin-controller 0 */ > +static struct samsung_pin_bank exynos5420_pin_banks0[] = { > + EXYNOS_PIN_BANK_EINTN(8, 0x000, "gpy7"), > + EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), > + EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), > + EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), > + EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), > +}; > + > +/* pin banks of exynos5420 pin-controller 1 */ > +static struct samsung_pin_bank exynos5420_pin_banks1[] = { > + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpc0", 0x00), > + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc1", 0x04), > + EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08), > + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpc3", 0x0c), > + EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpc4", 0x10), > + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpd1", 0x14), > + EXYNOS_PIN_BANK_EINTN(6, 0x0C0, "gpy0"), > + EXYNOS_PIN_BANK_EINTN(4, 0x0E0, "gpy1"), > + EXYNOS_PIN_BANK_EINTN(6, 0x100, "gpy2"), > + EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpy3"), > + EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpy4"), > + EXYNOS_PIN_BANK_EINTN(8, 0x160, "gpy5"), > + EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy6"), > +}; > + > +/* pin banks of exynos5420 pin-controller 2 */ > +static struct samsung_pin_bank exynos5420_pin_banks2[] = { > + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00), > + EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04), > + EXYNOS_PIN_BANK_EINTG(6, 0x040, "gpf0", 0x08), > + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpf1", 0x0c), > + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10), > + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14), > + EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpg2", 0x18), > + EXYNOS_PIN_BANK_EINTG(4, 0x0E0, "gpj4", 0x1c), > +}; > + > +/* pin banks of exynos5420 pin-controller 3 */ > +static struct samsung_pin_bank exynos5420_pin_banks3[] = { > + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), > + EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), > + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), > + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), > + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10), > + EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14), > + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpb3", 0x18), > + EXYNOS_PIN_BANK_EINTG(2, 0x0E0, "gpb4", 0x1c), > + EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph0", 0x20), > +}; > + > +/* pin banks of exynos5420 pin-controller 4 */ > +static struct samsung_pin_bank exynos5420_pin_banks4[] = { > + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpz", 0x00), > +}; > + > +/* > + * Samsung pinctrl driver data for Exynos5420 SoC. Exynos5420 SoC > includes + * four gpio/pin-mux/pinconfig controllers. > + */ > +struct samsung_pin_ctrl exynos5420_pin_ctrl[] = { > + { > + /* pin-controller instance 0 data */ > + .pin_banks = exynos5420_pin_banks0, > + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks0), > + .weint_con = EXYNOS_WKUP_ECON_OFFSET, > + .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, > + .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, > + .svc = EXYNOS_SVC_OFFSET, > + .eint_gpio_init = exynos_eint_gpio_init, > + .eint_wkup_init = exynos_eint_wkup_init, > + .label = "exynos5420-gpio-ctrl0", > + }, { > + /* pin-controller instance 1 data */ > + .pin_banks = exynos5420_pin_banks1, > + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks1), > + .geint_con = EXYNOS_GPIO_ECON_OFFSET, > + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, > + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, > + .svc = EXYNOS_SVC_OFFSET, > + .eint_gpio_init = exynos_eint_gpio_init, > + .label = "exynos5420-gpio-ctrl1", > + }, { > + /* pin-controller instance 2 data */ > + .pin_banks = exynos5420_pin_banks2, > + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks2), > + .geint_con = EXYNOS_GPIO_ECON_OFFSET, > + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, > + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, > + .svc = EXYNOS_SVC_OFFSET, > + .eint_gpio_init = exynos_eint_gpio_init, > + .label = "exynos5420-gpio-ctrl2", > + }, { > + /* pin-controller instance 3 data */ > + .pin_banks = exynos5420_pin_banks3, > + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks3), > + .geint_con = EXYNOS_GPIO_ECON_OFFSET, > + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, > + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, > + .svc = EXYNOS_SVC_OFFSET, > + .eint_gpio_init = exynos_eint_gpio_init, > + .label = "exynos5420-gpio-ctrl3", > + }, { > + /* pin-controller instance 4 data */ > + .pin_banks = exynos5420_pin_banks4, > + .nr_banks = ARRAY_SIZE(exynos5420_pin_banks4), > + .geint_con = EXYNOS_GPIO_ECON_OFFSET, > + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, > + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, > + .svc = EXYNOS_SVC_OFFSET, > + .eint_gpio_init = exynos_eint_gpio_init, > + .label = "exynos5420-gpio-ctrl4", > + }, > +}; > diff --git a/drivers/pinctrl/pinctrl-samsung.c > b/drivers/pinctrl/pinctrl-samsung.c index e67ff1b..0a6c720 100644 > --- a/drivers/pinctrl/pinctrl-samsung.c > +++ b/drivers/pinctrl/pinctrl-samsung.c > @@ -1113,6 +1113,8 @@ static const struct of_device_id > samsung_pinctrl_dt_match[] = { .data = (void *)exynos4x12_pin_ctrl }, > { .compatible = "samsung,exynos5250-pinctrl", > .data = (void *)exynos5250_pin_ctrl }, > + { .compatible = "samsung,exynos5420-pinctrl", > + .data = (void *)exynos5420_pin_ctrl }, > #endif > #ifdef CONFIG_PINCTRL_S3C64XX > { .compatible = "samsung,s3c64xx-pinctrl", > diff --git a/drivers/pinctrl/pinctrl-samsung.h > b/drivers/pinctrl/pinctrl-samsung.h index 79fcc20..954eeaf 100644 > --- a/drivers/pinctrl/pinctrl-samsung.h > +++ b/drivers/pinctrl/pinctrl-samsung.h > @@ -259,5 +259,6 @@ extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; > extern struct samsung_pin_ctrl s3c2416_pin_ctrl[]; > extern struct samsung_pin_ctrl s3c2440_pin_ctrl[]; > extern struct samsung_pin_ctrl s3c2450_pin_ctrl[]; > +extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; > > #endif /* __PINCTRL_SAMSUNG_H */ ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data 2013-06-12 14:51 ` [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data Leela Krishna Amudala 2013-06-12 21:00 ` Tomasz Figa @ 2013-06-12 21:37 ` Doug Anderson 1 sibling, 0 replies; 14+ messages in thread From: Doug Anderson @ 2013-06-12 21:37 UTC (permalink / raw) To: Leela Krishna Amudala Cc: linux-samsung-soc, Kukjin Kim, Simon Glass, Thomas P Abraham, Tomasz Figa Leela, On Wed, Jun 12, 2013 at 7:51 AM, Leela Krishna Amudala <l.krishna@samsung.com> wrote: > Add Samsung Exynos5420 SoC specific data to enable pinctrl support for > all platforms based on Exynos5420. > > Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> > --- > .../bindings/pinctrl/samsung-pinctrl.txt | 1 + > drivers/pinctrl/pinctrl-exynos.c | 115 ++++++++++++++++++++ > drivers/pinctrl/pinctrl-samsung.c | 2 + > drivers/pinctrl/pinctrl-samsung.h | 1 + > 4 files changed, 119 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > index b2bc219..fe949c7 100644 > --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > @@ -15,6 +15,7 @@ Required Properties: > - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. > - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. > - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. > + - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. > > - reg: Base address of the pin controller hardware module and length of > the address space it occupies. > diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c > index 2d76f66..753a8cd 100644 > --- a/drivers/pinctrl/pinctrl-exynos.c > +++ b/drivers/pinctrl/pinctrl-exynos.c > @@ -941,3 +941,118 @@ struct samsung_pin_ctrl exynos5250_pin_ctrl[] = { > .label = "exynos5250-gpio-ctrl3", > }, > }; > + > +/* pin banks of exynos5420 pin-controller 0 */ > +static struct samsung_pin_bank exynos5420_pin_banks0[] = { > + EXYNOS_PIN_BANK_EINTN(8, 0x000, "gpy7"), As Tomasz points out, it looks like this should be EINTG. Otherwise looks good. Reviewed-by: Doug Anderson <dianders@chromium.org> ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 2013-06-12 14:51 [PATCH 0/3] Add pinctrl support to Exynos5420 Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 1/3] ARM: dts: add " Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data Leela Krishna Amudala @ 2013-06-12 14:51 ` Leela Krishna Amudala 2013-06-12 21:02 ` Tomasz Figa 2 siblings, 1 reply; 14+ messages in thread From: Leela Krishna Amudala @ 2013-06-12 14:51 UTC (permalink / raw) To: linux-samsung-soc; +Cc: kgene.kim, dianders, sjg, thomas.ab, t.figa Skip exynos5420 gpiolib registration if pinctrl support is enabled. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> --- drivers/gpio/gpio-samsung.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 83a0d71..b3dd984 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -3033,6 +3033,7 @@ static __init int samsung_gpiolib_init(void) { .compatible = "samsung,exynos4210-pinctrl", }, { .compatible = "samsung,exynos4x12-pinctrl", }, { .compatible = "samsung,exynos5250-pinctrl", }, + { .compatible = "samsung,exynos5420-pinctrl", }, { .compatible = "samsung,exynos5440-pinctrl", }, { } }; -- 1.7.10.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 2013-06-12 14:51 ` [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 Leela Krishna Amudala @ 2013-06-12 21:02 ` Tomasz Figa 0 siblings, 0 replies; 14+ messages in thread From: Tomasz Figa @ 2013-06-12 21:02 UTC (permalink / raw) To: Leela Krishna Amudala Cc: linux-samsung-soc, kgene.kim, dianders, sjg, thomas.ab, t.figa On Wednesday 12 of June 2013 20:21:28 Leela Krishna Amudala wrote: > Skip exynos5420 gpiolib registration if pinctrl support is enabled. > > Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> > --- > drivers/gpio/gpio-samsung.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c > index 83a0d71..b3dd984 100644 > --- a/drivers/gpio/gpio-samsung.c > +++ b/drivers/gpio/gpio-samsung.c > @@ -3033,6 +3033,7 @@ static __init int samsung_gpiolib_init(void) > { .compatible = "samsung,exynos4210-pinctrl", }, > { .compatible = "samsung,exynos4x12-pinctrl", }, > { .compatible = "samsung,exynos5250-pinctrl", }, > + { .compatible = "samsung,exynos5420-pinctrl", }, > { .compatible = "samsung,exynos5440-pinctrl", }, IMHO after Kukjin's patches removing non-DT support for Exynos, we can just remove Exynos support from this legacy driver. I will send appropriate patch this Friday, along with other cleanup patches. Best regards, Tomasz > { } > }; ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2013-06-16 4:23 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-06-12 14:51 [PATCH 0/3] Add pinctrl support to Exynos5420 Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 1/3] ARM: dts: add " Leela Krishna Amudala 2013-06-12 20:58 ` Tomasz Figa 2013-06-12 21:20 ` Doug Anderson 2013-06-12 21:35 ` Doug Anderson 2013-06-12 21:38 ` Tomasz Figa 2013-06-14 12:21 ` Leela Krishna Amudala 2013-06-16 4:23 ` Doug Anderson 2013-06-14 4:49 ` Leela Krishna Amudala 2013-06-12 14:51 ` [PATCH 2/3] pinctrl: exynos: add exynos5420 SoC specific data Leela Krishna Amudala 2013-06-12 21:00 ` Tomasz Figa 2013-06-12 21:37 ` Doug Anderson 2013-06-12 14:51 ` [PATCH 3/3] gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5420 Leela Krishna Amudala 2013-06-12 21:02 ` Tomasz Figa
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