From: Neil Armstrong <neil.armstrong@linaro.org>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Zhentao Guo <zhentao.guo@amlogic.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder
Date: Thu, 5 Mar 2026 12:35:52 +0100 [thread overview]
Message-ID: <278f5018-9183-4eeb-bde1-7c19adecab06@linaro.org> (raw)
In-Reply-To: <69900d76-3820-467a-9fbc-13f79189df2f@kernel.org>
On 3/5/26 12:08, Krzysztof Kozlowski wrote:
> On 05/03/2026 12:01, Zhentao Guo wrote:
>>
>> 2. Why canvas is needed?
>>
>> 1. Since the ARM IOMMU HW is not integrated into the Amlogic SOCs,we
>> need canvas to prevent the DDR memory used by the decoder from being
>> rewrote by other hardware. Canvas provides the decoder with a
>> configurable DDR memory range, as well as hardware-based detection
>> and blocking for out-of-bounds access.
>> 2. From the diagram above, we can see a lite CPU called AMRISC. AMRISC
>> is the controller of the decoder HW and the decoder driver needs to
>> access the decoder hardware through AMRISC. However, AMRISC is a
>> 16-bit CPU and cannot directly handle 32-bit or 64-bit physical
>> addresses. Therefore, canvas is required to convert the addresses
>> into index to facilitate processing by the AMRISC core.
>
> This suggests "Canvas" is IOMMU, thus use proper IOMMU abstractions and
> you cannot have own phandle for it.
No it is not, canvas was used for a long time for the display and video processing side.
It's absolutely not like an IOMMU, the diagram is quite clear.
Neil
>
> Best regards,
> Krzysztof
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WARNING: multiple messages have this Message-ID (diff)
From: Neil Armstrong <neil.armstrong@linaro.org>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Zhentao Guo <zhentao.guo@amlogic.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder
Date: Thu, 5 Mar 2026 12:35:52 +0100 [thread overview]
Message-ID: <278f5018-9183-4eeb-bde1-7c19adecab06@linaro.org> (raw)
In-Reply-To: <69900d76-3820-467a-9fbc-13f79189df2f@kernel.org>
On 3/5/26 12:08, Krzysztof Kozlowski wrote:
> On 05/03/2026 12:01, Zhentao Guo wrote:
>>
>> 2. Why canvas is needed?
>>
>> 1. Since the ARM IOMMU HW is not integrated into the Amlogic SOCs,we
>> need canvas to prevent the DDR memory used by the decoder from being
>> rewrote by other hardware. Canvas provides the decoder with a
>> configurable DDR memory range, as well as hardware-based detection
>> and blocking for out-of-bounds access.
>> 2. From the diagram above, we can see a lite CPU called AMRISC. AMRISC
>> is the controller of the decoder HW and the decoder driver needs to
>> access the decoder hardware through AMRISC. However, AMRISC is a
>> 16-bit CPU and cannot directly handle 32-bit or 64-bit physical
>> addresses. Therefore, canvas is required to convert the addresses
>> into index to facilitate processing by the AMRISC core.
>
> This suggests "Canvas" is IOMMU, thus use proper IOMMU abstractions and
> you cannot have own phandle for it.
No it is not, canvas was used for a long time for the display and video processing side.
It's absolutely not like an IOMMU, the diagram is quite clear.
Neil
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2026-03-05 11:36 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-13 5:12 [PATCH RFC v4 0/4] Add Amlogic stateless H.264 video decoder for S4 Zhentao Guo
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` [PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder Zhentao Guo
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 7:35 ` Krzysztof Kozlowski
2026-02-13 7:35 ` Krzysztof Kozlowski
2026-02-13 8:04 ` Zhentao Guo
2026-02-13 8:04 ` Zhentao Guo
2026-02-13 8:17 ` Krzysztof Kozlowski
2026-02-13 8:17 ` Krzysztof Kozlowski
[not found] ` <75e55ceb-e6dd-47b5-a829-66f6fbb3e13e@amlogic.com>
2026-02-13 8:16 ` Krzysztof Kozlowski
2026-02-13 8:16 ` Krzysztof Kozlowski
2026-02-13 8:31 ` Zhentao Guo
2026-02-13 8:31 ` Zhentao Guo
2026-02-13 8:55 ` Krzysztof Kozlowski
2026-02-13 8:55 ` Krzysztof Kozlowski
2026-02-13 9:14 ` Zhentao Guo
2026-02-13 9:14 ` Zhentao Guo
2026-02-13 11:14 ` Piotr Oniszczuk
2026-02-13 11:14 ` Piotr Oniszczuk
2026-02-13 11:30 ` Krzysztof Kozlowski
2026-02-13 11:30 ` Krzysztof Kozlowski
2026-03-05 11:01 ` Zhentao Guo
2026-03-05 11:01 ` Zhentao Guo
2026-03-05 11:08 ` Krzysztof Kozlowski
2026-03-05 11:08 ` Krzysztof Kozlowski
2026-03-05 11:35 ` Neil Armstrong [this message]
2026-03-05 11:35 ` Neil Armstrong
2026-03-05 11:53 ` Krzysztof Kozlowski
2026-03-05 11:53 ` Krzysztof Kozlowski
2026-03-05 15:57 ` Neil Armstrong
2026-03-05 15:57 ` Neil Armstrong
2026-02-13 5:12 ` [PATCH RFC v4 2/4] decoder: Add V4L2 stateless H.264 decoder driver Zhentao Guo
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-16 1:10 ` kernel test robot
2026-02-13 5:12 ` [PATCH RFC v4 3/4] arm64: dts: amlogic: Add video decoder driver support for S4 SOCs Zhentao Guo
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` [PATCH RFC v4 4/4] arm64: defconfig: Enable VDEC driver for Amlogic SoCs Zhentao Guo
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 5:12 ` Zhentao Guo via B4 Relay
2026-02-13 7:33 ` Krzysztof Kozlowski
2026-02-13 7:33 ` Krzysztof Kozlowski
2026-02-13 8:06 ` Zhentao Guo
2026-02-13 8:06 ` Zhentao Guo
2026-02-13 8:18 ` Krzysztof Kozlowski
2026-02-13 8:18 ` Krzysztof Kozlowski
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