Re: [PATCH RFC v4 1/4] media: dt-bindings: Add Amlogic V4L2 video decoder

[Piotr Oniszczuk <piotr.oniszczuk@gmail.com>]

> Wiadomość napisana przez Krzysztof Kozlowski <krzk@kernel.org> w dniu 13 lut 2026, o godz. 09:55:
> 
> On 13/02/2026 09:31, Zhentao Guo wrote:
>>>>>> 
>>>>> Why? What for?
>>>>> 
>>>>> What is canvas provider?
>>>> The canvas provider is: drivers/soc/amlogic/meson-canvas.c
>>> What is this "canvas" device.
>> You can think of canvas as the agent through which the decoder hardware 
>> accesses DDR.
> 
> AGAIN:
> 
> What is the canvas device. Describe or point me to bindings describing
> it. Your current bindings say that canvas is "a collection of metadata
> that describes a pixel buffer" so there is no way it handles DDR access.
> 
> NAK
> 
>>>> In short, canvas is a hardware IP inside the Amlogic SoC. The decoder IP
>>>> needs to access DDR through canvas IP, so we need to reference the
>>> Why decoder cannot access DDR directly?
>> The internal topology of the S4 chip is designed this way, we don't know 
>> why our VLSI colleauges designed like this. But similar designs have 
>> been removed in subsequent chips, eliminating the need to rely on a 
>> common hardware IP.
> 
> Quite poor explanation. Based on this, this as well could be entry in
> device reg lists.
> 
> Anyway, I am done guessing, explain properly the hardware instead of
> answering with half-baked responses just so I will go away.
> 
> 
> Best regards,
> Krzysztof
> 

Krzysztof,

May you pls explain me: what added value - to upstreaming aml video decoder - will be provided by giving NAK .... because canvas/DDR access details explanations are not enough detailed FOR YOU?



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