From: Marc Zyngier <maz@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v2 6/7] KVM: arm64: Upgrade PMU support to ARMv8.4
Date: Thu, 04 Feb 2021 14:21:37 +0000 [thread overview]
Message-ID: <30d455e9eacf8b4b9b43ff30b3a48309@kernel.org> (raw)
In-Reply-To: <7134513d-bccf-923f-961a-08527cf77f8e@arm.com>
On 2021-02-04 12:32, Alexandru Elisei wrote:
> Hi,
>
> On 2/3/21 1:28 PM, Marc Zyngier wrote:
>> On 2021-02-03 12:39, Auger Eric wrote:
>>> Hi,
>>>
>>> On 2/3/21 12:20 PM, Marc Zyngier wrote:
>>>> On 2021-02-03 11:07, Auger Eric wrote:
>>>>> Hi Marc,
>>>>> On 2/3/21 11:36 AM, Marc Zyngier wrote:
>>>>>> Hi Eric,
>>>>>>
>>>>>> On 2021-01-27 17:53, Auger Eric wrote:
>>>>>>> Hi Marc,
>>>>>>>
>>>>>>> On 1/25/21 1:26 PM, Marc Zyngier wrote:
>>>>>>>> Upgrading the PMU code from ARMv8.1 to ARMv8.4 turns out to be
>>>>>>>> pretty easy. All that is required is support for PMMIR_EL1,
>>>>>>>> which
>>>>>>>> is read-only, and for which returning 0 is a valid option as
>>>>>>>> long
>>>>>>>> as we don't advertise STALL_SLOT as an implemented event.
>>>>>>>>
>>>>>>>> Let's just do that and adjust what we return to the guest.
>>>>>>>>
>>>>>>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>>>>>>> ---
>>>>>>>> arch/arm64/include/asm/sysreg.h | 3 +++
>>>>>>>> arch/arm64/kvm/pmu-emul.c | 6 ++++++
>>>>>>>> arch/arm64/kvm/sys_regs.c | 11 +++++++----
>>>>>>>> 3 files changed, 16 insertions(+), 4 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm64/include/asm/sysreg.h
>>>>>>>> b/arch/arm64/include/asm/sysreg.h
>>>>>>>> index 8b5e7e5c3cc8..2fb3f386588c 100644
>>>>>>>> --- a/arch/arm64/include/asm/sysreg.h
>>>>>>>> +++ b/arch/arm64/include/asm/sysreg.h
>>>>>>>> @@ -846,7 +846,10 @@
>>>>>>>>
>>>>>>>> #define ID_DFR0_PERFMON_SHIFT 24
>>>>>>>>
>>>>>>>> +#define ID_DFR0_PERFMON_8_0 0x3
>>>>>>>> #define ID_DFR0_PERFMON_8_1 0x4
>>>>>>>> +#define ID_DFR0_PERFMON_8_4 0x5
>>>>>>>> +#define ID_DFR0_PERFMON_8_5 0x6
>>>>>>>>
>>>>>>>> #define ID_ISAR4_SWP_FRAC_SHIFT 28
>>>>>>>> #define ID_ISAR4_PSR_M_SHIFT 24
>>>>>>>> diff --git a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> index 398f6df1bbe4..72cd704a8368 100644
>>>>>>>> --- a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> +++ b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> @@ -795,6 +795,12 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu
>>>>>>>> *vcpu,
>>>>>>>> bool pmceid1)
>>>>>>>> base = 0;
>>>>>>>> } else {
>>>>>>>> val = read_sysreg(pmceid1_el0);
>>>>>>>> + /*
>>>>>>>> + * Don't advertise STALL_SLOT, as PMMIR_EL0 is handled
>>>>>>>> + * as RAZ
>>>>>>>> + */
>>>>>>>> + if (vcpu->kvm->arch.pmuver >= ID_AA64DFR0_PMUVER_8_4)
>>>>>>>> + val &= ~BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT -
>>>>>>>> 32);
>>>>>>> what about the STALL_SLOT_BACKEND and FRONTEND events then?
>>>>>>
>>>>>> Aren't these a mandatory ARMv8.1 feature? I don't see a reason to
>>>>>> drop them.
>>>>>
>>>>> I understand the 3 are linked together.
>>>>>
>>>>> In D7.11 it is said
>>>>> "
>>>>> When any of the following common events are implemented, all three
>>>>> of
>>>>> them are implemented:
>>>>> 0x003D , STALL_SLOT_BACKEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the backend,
>>>>> 0x003E , STALL_SLOT_FRONTEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the frontend.
>>>>> 0x003F , STALL_SLOT, No operation sent for execution on a Slot.
>>>>> "
>>>>
>>>> They are linked in the sense that they report related events, but
>>>> they
>>>> don't have to be implemented in the same level of the architecure,
>>>> if only
>>>> because BACKEND/FRONTEND were introducedway before ARMv8.4.
>>>>
>>>> What the architecture says is:
>>>>
>>>> - For FEAT_PMUv3p1 (ARMv8.1):
>>>> "The STALL_FRONTEND and STALL_BACKEND events are required to be
>>>> implemented." (A2.4.1, DDI0487G.a)
>>> OK
>>>>
>>>> - For FEAT_PMUv3p4 (ARMv8.4):
>>>> "If FEAT_PMUv3p4 is implemented:
>>>> - If STALL_SLOT is not implemented, it is IMPLEMENTATION DEFINED
>>>> whether the PMMIR System registers are implemented.
>>>> - If STALL_SLOT is implemented, then the PMMIR System registers
>>>> are
>>>> implemented." (D7-2873, DDI0487G.a)
>>>>
>>>> So while BACKEND/FRONTEND are required in an ARMv8.4 implementation
>>>> by virtue of being mandatory in ARMv8.1, STALL_SLOT isn't at any
>>>> point.
>>> But then how do you understand "When any of the following common
>>> events
>>> are implemented, all three of them are implemented"?
>>
>> I think that's wholly inconsistent, because it would mean that
>> STALL_SLOT
>> isn't optional on ARMv8.4, and would make PMMIR mandatory.
>
> I think there's some confusion regarding the event names. From my
> reading of the
> architecture, STALL != STALL_SLOT, STALL_BACKEND != STALL_SLOT_BACKEND,
> STALL_FRONTEND != STALL_SLOT_FRONTEND.
Dammit, I hadn't realised that at all. Thanks for putting me right.
>
> STALL{, _BACKEND, _FRONTEND} count the number of CPU cycles where no
> instructions
> are being executed on the PE (page D7-2872), STALL_SLOT{, _BACKEND,
> _FRONTEND}
> count the number of slots where no instructions are being executed
> (page D7-2873).
>
> STALL_{BACKEND, FRONTEND} are required by ARMv8.1-PMU (pages A2-76,
> D7-2913);
> STALL is required by ARMv8.4-PMU (page D7-2914).
>
> STALL_SLOT{, _BACKEND, _FRONTEND} are optional in ARMv8.4-PMU (pages
> D7-2913,
> D7-2914), but if one of them is implemented, all of them must be
> implemented (page D7-2914).
>
> The problem I see with this patch is that it doesn't clear the
> STALL_SLOT_{BACKEND, FRONTEND} event bits along with the STALL_SLOT bit
> from
> PMCEID1_EL0.
OK, so Eric was right, and I'm an illiterate idiot! I'll fix the patch
and repost
the whole thing.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
Auger Eric <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
kvmarm@lists.cs.columbia.edu,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH v2 6/7] KVM: arm64: Upgrade PMU support to ARMv8.4
Date: Thu, 04 Feb 2021 14:21:37 +0000 [thread overview]
Message-ID: <30d455e9eacf8b4b9b43ff30b3a48309@kernel.org> (raw)
In-Reply-To: <7134513d-bccf-923f-961a-08527cf77f8e@arm.com>
On 2021-02-04 12:32, Alexandru Elisei wrote:
> Hi,
>
> On 2/3/21 1:28 PM, Marc Zyngier wrote:
>> On 2021-02-03 12:39, Auger Eric wrote:
>>> Hi,
>>>
>>> On 2/3/21 12:20 PM, Marc Zyngier wrote:
>>>> On 2021-02-03 11:07, Auger Eric wrote:
>>>>> Hi Marc,
>>>>> On 2/3/21 11:36 AM, Marc Zyngier wrote:
>>>>>> Hi Eric,
>>>>>>
>>>>>> On 2021-01-27 17:53, Auger Eric wrote:
>>>>>>> Hi Marc,
>>>>>>>
>>>>>>> On 1/25/21 1:26 PM, Marc Zyngier wrote:
>>>>>>>> Upgrading the PMU code from ARMv8.1 to ARMv8.4 turns out to be
>>>>>>>> pretty easy. All that is required is support for PMMIR_EL1,
>>>>>>>> which
>>>>>>>> is read-only, and for which returning 0 is a valid option as
>>>>>>>> long
>>>>>>>> as we don't advertise STALL_SLOT as an implemented event.
>>>>>>>>
>>>>>>>> Let's just do that and adjust what we return to the guest.
>>>>>>>>
>>>>>>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>>>>>>> ---
>>>>>>>> arch/arm64/include/asm/sysreg.h | 3 +++
>>>>>>>> arch/arm64/kvm/pmu-emul.c | 6 ++++++
>>>>>>>> arch/arm64/kvm/sys_regs.c | 11 +++++++----
>>>>>>>> 3 files changed, 16 insertions(+), 4 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm64/include/asm/sysreg.h
>>>>>>>> b/arch/arm64/include/asm/sysreg.h
>>>>>>>> index 8b5e7e5c3cc8..2fb3f386588c 100644
>>>>>>>> --- a/arch/arm64/include/asm/sysreg.h
>>>>>>>> +++ b/arch/arm64/include/asm/sysreg.h
>>>>>>>> @@ -846,7 +846,10 @@
>>>>>>>>
>>>>>>>> #define ID_DFR0_PERFMON_SHIFT 24
>>>>>>>>
>>>>>>>> +#define ID_DFR0_PERFMON_8_0 0x3
>>>>>>>> #define ID_DFR0_PERFMON_8_1 0x4
>>>>>>>> +#define ID_DFR0_PERFMON_8_4 0x5
>>>>>>>> +#define ID_DFR0_PERFMON_8_5 0x6
>>>>>>>>
>>>>>>>> #define ID_ISAR4_SWP_FRAC_SHIFT 28
>>>>>>>> #define ID_ISAR4_PSR_M_SHIFT 24
>>>>>>>> diff --git a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> index 398f6df1bbe4..72cd704a8368 100644
>>>>>>>> --- a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> +++ b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> @@ -795,6 +795,12 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu
>>>>>>>> *vcpu,
>>>>>>>> bool pmceid1)
>>>>>>>> base = 0;
>>>>>>>> } else {
>>>>>>>> val = read_sysreg(pmceid1_el0);
>>>>>>>> + /*
>>>>>>>> + * Don't advertise STALL_SLOT, as PMMIR_EL0 is handled
>>>>>>>> + * as RAZ
>>>>>>>> + */
>>>>>>>> + if (vcpu->kvm->arch.pmuver >= ID_AA64DFR0_PMUVER_8_4)
>>>>>>>> + val &= ~BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT -
>>>>>>>> 32);
>>>>>>> what about the STALL_SLOT_BACKEND and FRONTEND events then?
>>>>>>
>>>>>> Aren't these a mandatory ARMv8.1 feature? I don't see a reason to
>>>>>> drop them.
>>>>>
>>>>> I understand the 3 are linked together.
>>>>>
>>>>> In D7.11 it is said
>>>>> "
>>>>> When any of the following common events are implemented, all three
>>>>> of
>>>>> them are implemented:
>>>>> 0x003D , STALL_SLOT_BACKEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the backend,
>>>>> 0x003E , STALL_SLOT_FRONTEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the frontend.
>>>>> 0x003F , STALL_SLOT, No operation sent for execution on a Slot.
>>>>> "
>>>>
>>>> They are linked in the sense that they report related events, but
>>>> they
>>>> don't have to be implemented in the same level of the architecure,
>>>> if only
>>>> because BACKEND/FRONTEND were introducedway before ARMv8.4.
>>>>
>>>> What the architecture says is:
>>>>
>>>> - For FEAT_PMUv3p1 (ARMv8.1):
>>>> "The STALL_FRONTEND and STALL_BACKEND events are required to be
>>>> implemented." (A2.4.1, DDI0487G.a)
>>> OK
>>>>
>>>> - For FEAT_PMUv3p4 (ARMv8.4):
>>>> "If FEAT_PMUv3p4 is implemented:
>>>> - If STALL_SLOT is not implemented, it is IMPLEMENTATION DEFINED
>>>> whether the PMMIR System registers are implemented.
>>>> - If STALL_SLOT is implemented, then the PMMIR System registers
>>>> are
>>>> implemented." (D7-2873, DDI0487G.a)
>>>>
>>>> So while BACKEND/FRONTEND are required in an ARMv8.4 implementation
>>>> by virtue of being mandatory in ARMv8.1, STALL_SLOT isn't at any
>>>> point.
>>> But then how do you understand "When any of the following common
>>> events
>>> are implemented, all three of them are implemented"?
>>
>> I think that's wholly inconsistent, because it would mean that
>> STALL_SLOT
>> isn't optional on ARMv8.4, and would make PMMIR mandatory.
>
> I think there's some confusion regarding the event names. From my
> reading of the
> architecture, STALL != STALL_SLOT, STALL_BACKEND != STALL_SLOT_BACKEND,
> STALL_FRONTEND != STALL_SLOT_FRONTEND.
Dammit, I hadn't realised that at all. Thanks for putting me right.
>
> STALL{, _BACKEND, _FRONTEND} count the number of CPU cycles where no
> instructions
> are being executed on the PE (page D7-2872), STALL_SLOT{, _BACKEND,
> _FRONTEND}
> count the number of slots where no instructions are being executed
> (page D7-2873).
>
> STALL_{BACKEND, FRONTEND} are required by ARMv8.1-PMU (pages A2-76,
> D7-2913);
> STALL is required by ARMv8.4-PMU (page D7-2914).
>
> STALL_SLOT{, _BACKEND, _FRONTEND} are optional in ARMv8.4-PMU (pages
> D7-2913,
> D7-2914), but if one of them is implemented, all of them must be
> implemented (page D7-2914).
>
> The problem I see with this patch is that it doesn't clear the
> STALL_SLOT_{BACKEND, FRONTEND} event bits along with the STALL_SLOT bit
> from
> PMCEID1_EL0.
OK, so Eric was right, and I'm an illiterate idiot! I'll fix the patch
and repost
the whole thing.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Auger Eric <eric.auger@redhat.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: Re: [PATCH v2 6/7] KVM: arm64: Upgrade PMU support to ARMv8.4
Date: Thu, 04 Feb 2021 14:21:37 +0000 [thread overview]
Message-ID: <30d455e9eacf8b4b9b43ff30b3a48309@kernel.org> (raw)
In-Reply-To: <7134513d-bccf-923f-961a-08527cf77f8e@arm.com>
On 2021-02-04 12:32, Alexandru Elisei wrote:
> Hi,
>
> On 2/3/21 1:28 PM, Marc Zyngier wrote:
>> On 2021-02-03 12:39, Auger Eric wrote:
>>> Hi,
>>>
>>> On 2/3/21 12:20 PM, Marc Zyngier wrote:
>>>> On 2021-02-03 11:07, Auger Eric wrote:
>>>>> Hi Marc,
>>>>> On 2/3/21 11:36 AM, Marc Zyngier wrote:
>>>>>> Hi Eric,
>>>>>>
>>>>>> On 2021-01-27 17:53, Auger Eric wrote:
>>>>>>> Hi Marc,
>>>>>>>
>>>>>>> On 1/25/21 1:26 PM, Marc Zyngier wrote:
>>>>>>>> Upgrading the PMU code from ARMv8.1 to ARMv8.4 turns out to be
>>>>>>>> pretty easy. All that is required is support for PMMIR_EL1,
>>>>>>>> which
>>>>>>>> is read-only, and for which returning 0 is a valid option as
>>>>>>>> long
>>>>>>>> as we don't advertise STALL_SLOT as an implemented event.
>>>>>>>>
>>>>>>>> Let's just do that and adjust what we return to the guest.
>>>>>>>>
>>>>>>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>>>>>>> ---
>>>>>>>> arch/arm64/include/asm/sysreg.h | 3 +++
>>>>>>>> arch/arm64/kvm/pmu-emul.c | 6 ++++++
>>>>>>>> arch/arm64/kvm/sys_regs.c | 11 +++++++----
>>>>>>>> 3 files changed, 16 insertions(+), 4 deletions(-)
>>>>>>>>
>>>>>>>> diff --git a/arch/arm64/include/asm/sysreg.h
>>>>>>>> b/arch/arm64/include/asm/sysreg.h
>>>>>>>> index 8b5e7e5c3cc8..2fb3f386588c 100644
>>>>>>>> --- a/arch/arm64/include/asm/sysreg.h
>>>>>>>> +++ b/arch/arm64/include/asm/sysreg.h
>>>>>>>> @@ -846,7 +846,10 @@
>>>>>>>>
>>>>>>>> #define ID_DFR0_PERFMON_SHIFT 24
>>>>>>>>
>>>>>>>> +#define ID_DFR0_PERFMON_8_0 0x3
>>>>>>>> #define ID_DFR0_PERFMON_8_1 0x4
>>>>>>>> +#define ID_DFR0_PERFMON_8_4 0x5
>>>>>>>> +#define ID_DFR0_PERFMON_8_5 0x6
>>>>>>>>
>>>>>>>> #define ID_ISAR4_SWP_FRAC_SHIFT 28
>>>>>>>> #define ID_ISAR4_PSR_M_SHIFT 24
>>>>>>>> diff --git a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> index 398f6df1bbe4..72cd704a8368 100644
>>>>>>>> --- a/arch/arm64/kvm/pmu-emul.c
>>>>>>>> +++ b/arch/arm64/kvm/pmu-emul.c
>>>>>>>> @@ -795,6 +795,12 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu
>>>>>>>> *vcpu,
>>>>>>>> bool pmceid1)
>>>>>>>> base = 0;
>>>>>>>> } else {
>>>>>>>> val = read_sysreg(pmceid1_el0);
>>>>>>>> + /*
>>>>>>>> + * Don't advertise STALL_SLOT, as PMMIR_EL0 is handled
>>>>>>>> + * as RAZ
>>>>>>>> + */
>>>>>>>> + if (vcpu->kvm->arch.pmuver >= ID_AA64DFR0_PMUVER_8_4)
>>>>>>>> + val &= ~BIT_ULL(ARMV8_PMUV3_PERFCTR_STALL_SLOT -
>>>>>>>> 32);
>>>>>>> what about the STALL_SLOT_BACKEND and FRONTEND events then?
>>>>>>
>>>>>> Aren't these a mandatory ARMv8.1 feature? I don't see a reason to
>>>>>> drop them.
>>>>>
>>>>> I understand the 3 are linked together.
>>>>>
>>>>> In D7.11 it is said
>>>>> "
>>>>> When any of the following common events are implemented, all three
>>>>> of
>>>>> them are implemented:
>>>>> 0x003D , STALL_SLOT_BACKEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the backend,
>>>>> 0x003E , STALL_SLOT_FRONTEND, No operation sent for execution on a
>>>>> Slot
>>>>> due to the frontend.
>>>>> 0x003F , STALL_SLOT, No operation sent for execution on a Slot.
>>>>> "
>>>>
>>>> They are linked in the sense that they report related events, but
>>>> they
>>>> don't have to be implemented in the same level of the architecure,
>>>> if only
>>>> because BACKEND/FRONTEND were introducedway before ARMv8.4.
>>>>
>>>> What the architecture says is:
>>>>
>>>> - For FEAT_PMUv3p1 (ARMv8.1):
>>>> "The STALL_FRONTEND and STALL_BACKEND events are required to be
>>>> implemented." (A2.4.1, DDI0487G.a)
>>> OK
>>>>
>>>> - For FEAT_PMUv3p4 (ARMv8.4):
>>>> "If FEAT_PMUv3p4 is implemented:
>>>> - If STALL_SLOT is not implemented, it is IMPLEMENTATION DEFINED
>>>> whether the PMMIR System registers are implemented.
>>>> - If STALL_SLOT is implemented, then the PMMIR System registers
>>>> are
>>>> implemented." (D7-2873, DDI0487G.a)
>>>>
>>>> So while BACKEND/FRONTEND are required in an ARMv8.4 implementation
>>>> by virtue of being mandatory in ARMv8.1, STALL_SLOT isn't at any
>>>> point.
>>> But then how do you understand "When any of the following common
>>> events
>>> are implemented, all three of them are implemented"?
>>
>> I think that's wholly inconsistent, because it would mean that
>> STALL_SLOT
>> isn't optional on ARMv8.4, and would make PMMIR mandatory.
>
> I think there's some confusion regarding the event names. From my
> reading of the
> architecture, STALL != STALL_SLOT, STALL_BACKEND != STALL_SLOT_BACKEND,
> STALL_FRONTEND != STALL_SLOT_FRONTEND.
Dammit, I hadn't realised that at all. Thanks for putting me right.
>
> STALL{, _BACKEND, _FRONTEND} count the number of CPU cycles where no
> instructions
> are being executed on the PE (page D7-2872), STALL_SLOT{, _BACKEND,
> _FRONTEND}
> count the number of slots where no instructions are being executed
> (page D7-2873).
>
> STALL_{BACKEND, FRONTEND} are required by ARMv8.1-PMU (pages A2-76,
> D7-2913);
> STALL is required by ARMv8.4-PMU (page D7-2914).
>
> STALL_SLOT{, _BACKEND, _FRONTEND} are optional in ARMv8.4-PMU (pages
> D7-2913,
> D7-2914), but if one of them is implemented, all of them must be
> implemented (page D7-2914).
>
> The problem I see with this patch is that it doesn't clear the
> STALL_SLOT_{BACKEND, FRONTEND} event bits along with the STALL_SLOT bit
> from
> PMCEID1_EL0.
OK, so Eric was right, and I'm an illiterate idiot! I'll fix the patch
and repost
the whole thing.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2021-02-04 14:21 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 12:26 [PATCH v2 0/7] KVM: arm64: More PMU/debug ID register fixes Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` [PATCH v2 1/7] KVM: arm64: Fix missing RES1 in emulation of DBGBIDR Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-26 17:32 ` Alexandru Elisei
2021-01-26 17:32 ` Alexandru Elisei
2021-01-26 17:32 ` Alexandru Elisei
2021-01-25 12:26 ` [PATCH v2 2/7] KVM: arm64: Fix AArch32 PMUv3 capping Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-26 17:35 ` Alexandru Elisei
2021-01-26 17:35 ` Alexandru Elisei
2021-01-26 17:35 ` Alexandru Elisei
2021-01-25 12:26 ` [PATCH v2 3/7] KVM: arm64: Add handling of AArch32 PCMEID{2, 3} PMUv3 registers Marc Zyngier
2021-01-25 12:26 ` [PATCH v2 3/7] KVM: arm64: Add handling of AArch32 PCMEID{2,3} " Marc Zyngier
2021-01-25 12:26 ` [PATCH v2 3/7] KVM: arm64: Add handling of AArch32 PCMEID{2, 3} " Marc Zyngier
2021-01-25 12:26 ` [PATCH v2 4/7] KVM: arm64: Refactor filtering of ID registers Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-27 12:12 ` Alexandru Elisei
2021-01-27 12:12 ` Alexandru Elisei
2021-01-27 12:12 ` Alexandru Elisei
2021-01-25 12:26 ` [PATCH v2 5/7] KVM: arm64: Limit the debug architecture to ARMv8.0 Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-27 12:18 ` Alexandru Elisei
2021-01-27 12:18 ` Alexandru Elisei
2021-01-27 12:18 ` Alexandru Elisei
2021-01-25 12:26 ` [PATCH v2 6/7] KVM: arm64: Upgrade PMU support to ARMv8.4 Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-27 14:09 ` Alexandru Elisei
2021-01-27 14:09 ` Alexandru Elisei
2021-01-27 14:09 ` Alexandru Elisei
2021-01-27 14:35 ` Marc Zyngier
2021-01-27 14:35 ` Marc Zyngier
2021-01-27 14:35 ` Marc Zyngier
2021-01-27 17:00 ` Alexandru Elisei
2021-01-27 17:00 ` Alexandru Elisei
2021-01-27 17:00 ` Alexandru Elisei
2021-01-27 17:23 ` Marc Zyngier
2021-01-27 17:23 ` Marc Zyngier
2021-01-27 17:23 ` Marc Zyngier
2021-01-27 17:41 ` Alexandru Elisei
2021-01-27 17:41 ` Alexandru Elisei
2021-01-27 17:41 ` Alexandru Elisei
2021-02-03 10:32 ` Marc Zyngier
2021-02-03 10:32 ` Marc Zyngier
2021-02-03 10:32 ` Marc Zyngier
2021-02-03 17:29 ` Alexandru Elisei
2021-02-03 17:29 ` Alexandru Elisei
2021-02-03 17:29 ` Alexandru Elisei
2021-01-27 17:53 ` Auger Eric
2021-01-27 17:53 ` Auger Eric
2021-01-27 17:53 ` Auger Eric
2021-02-03 10:36 ` Marc Zyngier
2021-02-03 10:36 ` Marc Zyngier
2021-02-03 10:36 ` Marc Zyngier
2021-02-03 11:07 ` Auger Eric
2021-02-03 11:07 ` Auger Eric
2021-02-03 11:07 ` Auger Eric
2021-02-03 11:20 ` Marc Zyngier
2021-02-03 11:20 ` Marc Zyngier
2021-02-03 11:20 ` Marc Zyngier
2021-02-03 12:39 ` Auger Eric
2021-02-03 12:39 ` Auger Eric
2021-02-03 12:39 ` Auger Eric
2021-02-03 13:28 ` Marc Zyngier
2021-02-03 13:28 ` Marc Zyngier
2021-02-03 13:28 ` Marc Zyngier
2021-02-04 12:32 ` Alexandru Elisei
2021-02-04 12:32 ` Alexandru Elisei
2021-02-04 12:32 ` Alexandru Elisei
2021-02-04 14:21 ` Marc Zyngier [this message]
2021-02-04 14:21 ` Marc Zyngier
2021-02-04 14:21 ` Marc Zyngier
2021-01-25 12:26 ` [PATCH v2 7/7] KVM: arm64: Use symbolic names for the PMU versions Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-25 12:26 ` Marc Zyngier
2021-01-27 14:28 ` Alexandru Elisei
2021-01-27 14:28 ` Alexandru Elisei
2021-01-27 14:28 ` Alexandru Elisei
2021-01-27 17:56 ` Auger Eric
2021-01-27 17:56 ` Auger Eric
2021-01-27 17:56 ` Auger Eric
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=30d455e9eacf8b4b9b43ff30b3a48309@kernel.org \
--to=maz@kernel.org \
--cc=alexandru.elisei@arm.com \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.