From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Jakub Kicinski <kuba@kernel.org>
Cc: Jiri Pirko <jiri@resnulli.us>,
Bart Van Assche <bvanassche@acm.org>,
netdev@vger.kernel.org, intel-wired-lan@lists.osuosl.org,
linux-arm-kernel@lists.infradead.org,
Jiri Pirko <jiri@nvidia.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>,
linux-clk@vger.kernel.org, Milena Olech <milena.olech@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH net-next v4 3/9] dpll: core: Add DPLL framework base functions
Date: Tue, 15 Aug 2023 19:38:41 +0100 [thread overview]
Message-ID: <39e701b4-0992-2c96-67b3-38c341c77af5@linux.dev> (raw)
In-Reply-To: <20230815112856.1f1bd3ac@kernel.org>
On 15/08/2023 19:28, Jakub Kicinski wrote:
> On Tue, 15 Aug 2023 19:20:31 +0100 Vadim Fedorenko wrote:
>>>> + ret = xa_alloc(&dpll_device_xa, &dpll->id, dpll, xa_limit_16b,
>>>> + GFP_KERNEL);
>>>
>>> Why only 16b and why not _cyclic?
>>
>> I cannot image systems with more than 65k of DPLL devices. We don't
>> store any id's of last used DPLL device, so there is no easy way to
>> restart the search from the last point. And it's not a hot path to
>> optimize it.
>
> I think this gets used under the xa_lock() so you can just add a static
> variable inside the function to remember previous allocation.
>
> I don't expect >64k devices either, obviously, but what are we saving
> by not allowing the full u32 range?
I don't see any benefits for either _cyclic or u32 range, but if you
insist I can change it.
_______________________________________________
Intel-wired-lan mailing list
Intel-wired-lan@osuosl.org
https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
WARNING: multiple messages have this Message-ID (diff)
From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Jakub Kicinski <kuba@kernel.org>
Cc: Jiri Pirko <jiri@resnulli.us>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>,
Milena Olech <milena.olech@intel.com>,
Michal Michalik <michal.michalik@intel.com>,
linux-arm-kernel@lists.infradead.org, poros@redhat.com,
mschmidt@redhat.com, netdev@vger.kernel.org,
linux-clk@vger.kernel.org, Bart Van Assche <bvanassche@acm.org>,
intel-wired-lan@lists.osuosl.org, Jiri Pirko <jiri@nvidia.com>
Subject: Re: [PATCH net-next v4 3/9] dpll: core: Add DPLL framework base functions
Date: Tue, 15 Aug 2023 19:38:41 +0100 [thread overview]
Message-ID: <39e701b4-0992-2c96-67b3-38c341c77af5@linux.dev> (raw)
In-Reply-To: <20230815112856.1f1bd3ac@kernel.org>
On 15/08/2023 19:28, Jakub Kicinski wrote:
> On Tue, 15 Aug 2023 19:20:31 +0100 Vadim Fedorenko wrote:
>>>> + ret = xa_alloc(&dpll_device_xa, &dpll->id, dpll, xa_limit_16b,
>>>> + GFP_KERNEL);
>>>
>>> Why only 16b and why not _cyclic?
>>
>> I cannot image systems with more than 65k of DPLL devices. We don't
>> store any id's of last used DPLL device, so there is no easy way to
>> restart the search from the last point. And it's not a hot path to
>> optimize it.
>
> I think this gets used under the xa_lock() so you can just add a static
> variable inside the function to remember previous allocation.
>
> I don't expect >64k devices either, obviously, but what are we saving
> by not allowing the full u32 range?
I don't see any benefits for either _cyclic or u32 range, but if you
insist I can change it.
WARNING: multiple messages have this Message-ID (diff)
From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
To: Jakub Kicinski <kuba@kernel.org>
Cc: Jiri Pirko <jiri@resnulli.us>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>,
Milena Olech <milena.olech@intel.com>,
Michal Michalik <michal.michalik@intel.com>,
linux-arm-kernel@lists.infradead.org, poros@redhat.com,
mschmidt@redhat.com, netdev@vger.kernel.org,
linux-clk@vger.kernel.org, Bart Van Assche <bvanassche@acm.org>,
intel-wired-lan@lists.osuosl.org, Jiri Pirko <jiri@nvidia.com>
Subject: Re: [PATCH net-next v4 3/9] dpll: core: Add DPLL framework base functions
Date: Tue, 15 Aug 2023 19:38:41 +0100 [thread overview]
Message-ID: <39e701b4-0992-2c96-67b3-38c341c77af5@linux.dev> (raw)
In-Reply-To: <20230815112856.1f1bd3ac@kernel.org>
On 15/08/2023 19:28, Jakub Kicinski wrote:
> On Tue, 15 Aug 2023 19:20:31 +0100 Vadim Fedorenko wrote:
>>>> + ret = xa_alloc(&dpll_device_xa, &dpll->id, dpll, xa_limit_16b,
>>>> + GFP_KERNEL);
>>>
>>> Why only 16b and why not _cyclic?
>>
>> I cannot image systems with more than 65k of DPLL devices. We don't
>> store any id's of last used DPLL device, so there is no easy way to
>> restart the search from the last point. And it's not a hot path to
>> optimize it.
>
> I think this gets used under the xa_lock() so you can just add a static
> variable inside the function to remember previous allocation.
>
> I don't expect >64k devices either, obviously, but what are we saving
> by not allowing the full u32 range?
I don't see any benefits for either _cyclic or u32 range, but if you
insist I can change it.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-08-15 18:38 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 20:03 [Intel-wired-lan] [PATCH net-next v4 0/9] Create common DPLL configuration API Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 1/9] dpll: documentation on DPLL subsystem interface Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-15 2:52 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 2:52 ` Jakub Kicinski
2023-08-15 2:52 ` Jakub Kicinski
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 2/9] dpll: spec: Add Netlink spec in YAML Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-15 2:43 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 2:43 ` Jakub Kicinski
2023-08-15 2:43 ` Jakub Kicinski
2023-08-17 18:40 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2023-08-17 18:40 ` Kubalewski, Arkadiusz
2023-08-17 18:40 ` Kubalewski, Arkadiusz
2023-08-17 23:36 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-17 23:36 ` Jakub Kicinski
2023-08-17 23:36 ` Jakub Kicinski
2023-08-18 7:23 ` [Intel-wired-lan] " Jiri Pirko
2023-08-18 7:23 ` Jiri Pirko
2023-08-18 7:23 ` Jiri Pirko
2023-08-21 10:15 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2023-08-21 10:15 ` Kubalewski, Arkadiusz
2023-08-21 10:15 ` Kubalewski, Arkadiusz
2023-08-22 16:54 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-22 16:54 ` Jakub Kicinski
2023-08-22 16:54 ` Jakub Kicinski
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 3/9] dpll: core: Add DPLL framework base functions Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-15 3:17 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 3:17 ` Jakub Kicinski
2023-08-15 3:17 ` Jakub Kicinski
2023-08-15 6:00 ` [Intel-wired-lan] " Jiri Pirko
2023-08-15 6:00 ` Jiri Pirko
2023-08-15 6:00 ` Jiri Pirko
2023-08-15 18:20 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-15 18:20 ` Vadim Fedorenko
2023-08-15 18:20 ` Vadim Fedorenko
2023-08-15 18:28 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 18:28 ` Jakub Kicinski
2023-08-15 18:28 ` Jakub Kicinski
2023-08-15 18:38 ` Vadim Fedorenko [this message]
2023-08-15 18:38 ` Vadim Fedorenko
2023-08-15 18:38 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 4/9] dpll: netlink: " Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-15 3:23 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 3:23 ` Jakub Kicinski
2023-08-15 3:23 ` Jakub Kicinski
2023-08-15 3:24 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 3:24 ` Jakub Kicinski
2023-08-15 3:24 ` Jakub Kicinski
2023-08-15 15:18 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-15 15:18 ` Vadim Fedorenko
2023-08-15 15:18 ` Vadim Fedorenko
2023-08-15 16:55 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 16:55 ` Jakub Kicinski
2023-08-15 16:55 ` Jakub Kicinski
2023-08-15 18:25 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-15 18:25 ` Vadim Fedorenko
2023-08-15 18:25 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 5/9] netdev: expose DPLL pin handle for netdevice Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 6/9] ice: add admin commands to access cgu configuration Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 7/9] ice: implement dpll interface to control cgu Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-12 6:19 ` [Intel-wired-lan] " Jiri Pirko
2023-08-12 6:19 ` Jiri Pirko
2023-08-12 6:19 ` Jiri Pirko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 8/9] ptp_ocp: implement DPLL ops Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` [Intel-wired-lan] [PATCH net-next v4 9/9] mlx5: Implement SyncE support using DPLL infrastructure Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-11 20:03 ` Vadim Fedorenko
2023-08-12 6:22 ` [Intel-wired-lan] [PATCH net-next v4 0/9] Create common DPLL configuration API Jiri Pirko
2023-08-12 6:22 ` Jiri Pirko
2023-08-12 6:22 ` Jiri Pirko
2023-08-12 11:20 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-12 11:20 ` Vadim Fedorenko
2023-08-12 11:20 ` Vadim Fedorenko
2023-08-15 2:45 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 2:45 ` Jakub Kicinski
2023-08-15 2:45 ` Jakub Kicinski
2023-08-15 11:36 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-15 11:36 ` Vadim Fedorenko
2023-08-15 11:36 ` Vadim Fedorenko
2023-08-15 11:52 ` [Intel-wired-lan] " Jiri Pirko
2023-08-15 11:52 ` Jiri Pirko
2023-08-15 11:52 ` Jiri Pirko
2023-08-15 14:32 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-15 14:32 ` Vadim Fedorenko
2023-08-15 14:32 ` Vadim Fedorenko
2023-08-15 17:02 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-15 17:02 ` Jakub Kicinski
2023-08-15 17:02 ` Jakub Kicinski
2023-08-18 10:15 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2023-08-18 10:15 ` Kubalewski, Arkadiusz
2023-08-18 10:15 ` Kubalewski, Arkadiusz
2023-08-18 21:03 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-18 21:03 ` Jakub Kicinski
2023-08-18 21:03 ` Jakub Kicinski
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