Re: [PATCH v1 1/7] drm/rockchip: dsi: Add support for RK3368

From: Heiko Stuebner <heiko@sntech.de>
To: robh@kernel.org, WeiHao Li <cn.liweihao@gmail.com>
Cc: hjc@rock-chips.com, andy.yan@rock-chips.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org,
	WeiHao Li <cn.liweihao@gmail.com>
Subject: Re: [PATCH v1 1/7] drm/rockchip: dsi: Add support for RK3368
Date: Wed, 03 Sep 2025 14:07:50 +0200	[thread overview]
Message-ID: <42028191.XM6RcZxFsP@phil> (raw)
In-Reply-To: <20250831104855.45883-2-cn.liweihao@gmail.com>

Hi,

Am Sonntag, 31. August 2025, 12:48:49 Mitteleuropäische Sommerzeit schrieb WeiHao Li:
> RK3368 has DesignWare MIPI DSI controller and an external inno D-PHY.
> 
> Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>

as a general remark, this patch will likely need to wait for 6.18-rc1,
because a big update of the HIWORD_MASK macros was merged [0].

So introducing a new user now would cause havok :-) .

Also when sending a v2, please base it on top of that changeset, or
just take linux-next [1] as a base.

Also in a separate patch, please add the needed rk3368 entry to the
devicetree binding [2], this will pacify the bot that checked your
devicetree changes :-) .

Please also make sure that relevant additions to the lists below
are made (the binding contains specific settings for some controllers
furter below) .

Heiko

[0] https://lore.kernel.org/linux-rockchip/20250825-byeword-update-v3-0-947b841cdb29@collabora.com/
[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml

> ---
>  .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> index 3398160ad..5d76e3e04 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
> @@ -162,6 +162,11 @@
>  #define RK3288_DSI0_LCDC_SEL		BIT(6)
>  #define RK3288_DSI1_LCDC_SEL		BIT(9)
>  
> +#define RK3368_GRF_SOC_CON7		0x41c
> +#define RK3368_DSI_FORCETXSTOPMODE	(0xf << 7)
> +#define RK3368_DSI_FORCERXMODE		BIT(6)
> +#define RK3368_DSI_TURNDISABLE		BIT(5)
> +
>  #define RK3399_GRF_SOC_CON20		0x6250
>  #define RK3399_DSI0_LCDC_SEL		BIT(0)
>  #define RK3399_DSI1_LCDC_SEL		BIT(4)
> @@ -1530,6 +1535,18 @@ static const struct rockchip_dw_dsi_chip_data rk3288_chip_data[] = {
>  	{ /* sentinel */ }
>  };
>  
> +static const struct rockchip_dw_dsi_chip_data rk3368_chip_data[] = {
> +	{
> +		.reg = 0xff960000,
> +		.lanecfg1_grf_reg = RK3368_GRF_SOC_CON7,
> +		.lanecfg1 = HIWORD_UPDATE(0, RK3368_DSI_TURNDISABLE |
> +						RK3368_DSI_FORCETXSTOPMODE |
> +						RK3368_DSI_FORCERXMODE),
> +		.max_data_lanes = 4,
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static int rk3399_dphy_tx1rx1_init(struct phy *phy)
>  {
>  	struct dw_mipi_dsi_rockchip *dsi = phy_get_drvdata(phy);
> @@ -1693,6 +1710,9 @@ static const struct of_device_id dw_mipi_dsi_rockchip_dt_ids[] = {
>  	}, {
>  	 .compatible = "rockchip,rk3288-mipi-dsi",
>  	 .data = &rk3288_chip_data,
> +	}, {
> +	 .compatible = "rockchip,rk3368-mipi-dsi",
> +	 .data = &rk3368_chip_data,
>  	}, {
>  	 .compatible = "rockchip,rk3399-mipi-dsi",
>  	 .data = &rk3399_chip_data,
> 