From: Quentin Schulz via U-Boot <u-boot@lists.u-boot-project.org>
To: Alexey Charkov <alchark@flipper.net>,
u-boot@lists.denx.de, Elaine Zhang <zhangqing@rock-chips.com>,
Jagan Teki <jagan@edgeble.ai>
Cc: Lukasz Majewski <lukma@denx.de>, Simon Glass <sjg@chromium.org>,
Kever Yang <kever.yang@rock-chips.com>,
Tom Rini <trini@konsulko.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
Finley Xiao <finley.xiao@rock-chips.com>,
Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [PATCH 2/6] clk: rockchip: pll: fix rounding of negative k in RK3588 frac PLL
Date: Tue, 21 Jul 2026 14:57:25 +0200 [thread overview]
Message-ID: <487ef2e8-49e5-4395-9ede-4e8750fd078b@cherry.de> (raw)
In-Reply-To: <20260713-rk3588-fracpll-v1-2-cdf47f2ca0b8@flipper.net>
Hi Alexey,
Resending so it hits the ML because I once again triggered the spam
filter by using the "wrong" mail address.
On 7/13/26 8:35 PM, Alexey Charkov wrote:
> Current code uses magical constants when rounding up the magnitude of
> negative fractional PLL component k. This leads to overshooting the
> requested rate when the calculated fractional part has less than 0.3 in
> its decimal part due to failure to round up the fractional part.
>
The choice of magic numbers sure is odd.
> Use a proper rounding up function to avoid overshooting the requested
> rate and make the calculation more readable.
>
Just for posterity, ffrac is guaranteed to not underflow in the if
condition because the caller of rockchip_rk3588_pll_k_get() actually
check that fvco < ffrac (computed with m+1).
ffrac * 65536 won't overflow because ffrac can be roughly max 1024 *
fin_hz, so fin_hz needs to be U64_MAX / 1024 / 65536 which is 256GHz.
Therefore:
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Thanks!
Quentin
> Fixes: 6bfb37e70209 ("clk: rockchip: rk3588: fix up the frac pll
calculation")
> Signed-off-by: Alexey Charkov <alchark@flipper.net>
> ---
> drivers/clk/rockchip/clk_pll.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/rockchip/clk_pll.c
b/drivers/clk/rockchip/clk_pll.c
> index d0df3b8fb49d..69d2d182dcb5 100644
> --- a/drivers/clk/rockchip/clk_pll.c
> +++ b/drivers/clk/rockchip/clk_pll.c
> @@ -11,6 +11,7 @@
> #include <asm/arch-rockchip/hardware.h>
> #include <div64.h>
> #include <linux/delay.h>
> +#include <linux/math64.h>
> static struct rockchip_pll_rate_table rockchip_auto_table;
> @@ -177,7 +178,10 @@ rockchip_rk3588_pll_k_get(u32 m, u32 p, u32 s,
u64 fin_hz, u64 fvco)
> k = ffrac * 65536 / fref;
> if (k > 32767) {
> ffrac = ((m + 1) * fref) - fvco;
> - k = ((ffrac * 65536 * 10 / fref) + 7) / 10;
> + /*
> + * Round up to avoid overshooting requested rate for negative k
> + */
> + k = DIV64_U64_ROUND_UP(ffrac * 65536, fref);
> if (k > 32767)
> k = 0;
> else
>
next prev parent reply other threads:[~2026-07-21 12:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 18:35 [PATCH 0/6] clk: rockchip: pll: fixes and simplification of maths in RK3588 frac PLL Alexey Charkov
2026-07-13 18:35 ` [PATCH 1/6] clk: rockchip: pll: drop misleading fout in rockchip_rk3588_pll_k_get() Alexey Charkov
2026-07-21 10:09 ` Quentin Schulz via U-Boot
2026-07-13 18:35 ` [PATCH 2/6] clk: rockchip: pll: fix rounding of negative k in RK3588 frac PLL Alexey Charkov
2026-07-21 12:57 ` Quentin Schulz via U-Boot [this message]
2026-07-13 18:35 ` [PATCH 3/6] clk: rockchip: pll: fix RK3588 frac PLL result for k=-32768 Alexey Charkov
2026-07-21 12:16 ` Quentin Schulz via U-Boot
2026-07-21 12:51 ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 4/6] clk: rockchip: pll: let rockchip_rk3588_pll_k_get update m directly Alexey Charkov
2026-07-21 12:19 ` Quentin Schulz via U-Boot
2026-07-21 12:47 ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 5/6] clk: rockchip: pll: fractional PLL coefficient is two's complement Alexey Charkov
2026-07-21 12:20 ` Quentin Schulz via U-Boot
2026-07-21 12:46 ` Alexey Charkov via U-Boot
2026-07-21 14:34 ` Quentin Schulz via U-Boot
2026-07-21 15:21 ` Alexey Charkov via U-Boot
2026-07-21 16:34 ` Quentin Schulz via U-Boot
2026-07-21 17:27 ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 6/6] clk: rockchip: pll: fix overflow and drop manual two's complement in rk3588_pll_get_rate Alexey Charkov
2026-07-21 12:56 ` Quentin Schulz via U-Boot
2026-07-21 13:34 ` Alexey Charkov via U-Boot
2026-07-21 14:05 ` Quentin Schulz via U-Boot
2026-07-21 16:02 ` Alexey Charkov via U-Boot
2026-07-23 9:23 ` Quentin Schulz
2026-07-23 12:25 ` Alexey Charkov
2026-07-23 12:33 ` Quentin Schulz
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