All of lore.kernel.org
 help / color / mirror / Atom feed
From: Quentin Schulz via U-Boot <u-boot@lists.u-boot-project.org>
To: Alexey Charkov <alchark@flipper.net>
Cc: u-boot@lists.denx.de, Elaine Zhang <zhangqing@rock-chips.com>,
	Jagan Teki <jagan@edgeble.ai>, Lukasz Majewski <lukma@denx.de>,
	Simon Glass <sjg@chromium.org>,
	Kever Yang <kever.yang@rock-chips.com>,
	Tom Rini <trini@konsulko.com>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	Finley Xiao <finley.xiao@rock-chips.com>,
	Jonas Karlman <jonas@kwiboo.se>
Subject: Re: [PATCH 5/6] clk: rockchip: pll: fractional PLL coefficient is two's complement
Date: Tue, 21 Jul 2026 16:34:10 +0200	[thread overview]
Message-ID: <c42cd1f8-2a74-4ef7-a426-ad43ee038b56@cherry.de> (raw)
In-Reply-To: <CAKTNdwFeUNxcVz-Jv1BGXRfsx7mKo0w9hTQEoEtFabfaco65vg@mail.gmail.com>

Hi Alexey,

On 7/21/26 2:46 PM, Alexey Charkov wrote:
> Hi Quentin,
> 
> On Tue, Jul 21, 2026 at 4:20 PM Quentin Schulz <quentin.schulz@cherry.de> wrote:
>>
>> Hi Alexey,
>>
>> On 7/13/26 8:35 PM, Alexey Charkov wrote:
>>> The TRM defines the fractional PLL adjustment coefficient as a signed
>>> two's complement number, 16 bits wide, so store it as such to avoid
>>> confusion.
>>>
>>
>> Yet...
>>
>>> Signed-off-by: Alexey Charkov <alchark@flipper.net>
>>> ---
>>>    arch/arm/include/asm/arch-rockchip/clock.h | 2 +-
>>>    drivers/clk/rockchip/clk_pll.c             | 3 ++-
>>>    2 files changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
>>> index 95b08bfd046f..f9bfdfb8a6a3 100644
>>> --- a/arch/arm/include/asm/arch-rockchip/clock.h
>>> +++ b/arch/arm/include/asm/arch-rockchip/clock.h
>>> @@ -104,7 +104,7 @@ struct rockchip_pll_rate_table {
>>>        unsigned int m;
>>>        unsigned int p;
>>>        unsigned int s;
>>> -     unsigned int k;
>>> +     int k;
>>
>> ... you use int here instead of s16, any specific reason?
> 
> Yes. What matters here is the signedness. The table value never gets
> written to or read from the hardware without accessor functions, which
> mask on writes and sign-extend on reads anyway. A generic 'int'
> usually performs better than a fixed-width type because it aligns
> better and requires fewer instructions for arithmetic.
> 

Is the performance gain worth the potential confusion around int vs s16?

> It also reduces potential churn if this table definition is ever
> reused for another SoC with a different width for the k coefficient,
> but this latter point is more theoretical.
> 

The kernel uses a union in rockchip_pll_rate_table, maybe we should be 
doing the same (totally unrelated to your patch though)? It also uses an 
unsigned int k (still, but maybe you're working on that? haven't seen 
patches on the ML at a quick glance though). In general, I like to not 
differ tooooo much from the kernel as ideally it would allow to backport 
patches from the kernel and more eyes have read the code.

If all we care is signedness, I would rather have all s16 or int, not a 
mix. But if the kernel keeps using an unsigned int for k, maybe we 
should wait for them to change or just stay with what we have here?

I understand using an unsigned int for what is effectively an s16 to be 
quite confusing, at the very least we can add a comment in the struct.

> Shall I reword the commit description accordingly?
> 
> Happy to set the type to s16 if you believe it's more expressive,
> though; we aren't doing much arithmetic on the table values anyway.
> 

I'm undecided whether we should diverge from how the kernel represents 
the rate table (that is, switch away from unsigned int for k), but if we 
do, I think we really should be consistent and avoid optimization at the 
cost of readability/confusion (except if gains are substantial).

I see that the kernel only has a table of rates, and doesn't do maths to 
figure out k and it seems they store negative k's in their 
representation in a unsigned form (that is, values above 32767 to 
represent negative k's). I'm guessing we cannot store tables in U-Boot 
because they would take too much space.

I'm sorry this mail is a bit all over the place, but I think there's 
another issue in the driver. I believe we shouldn't check for rate->k 
before calling rk_clrsetreg(base + pll->con_offset + 
RK3588_PLLCON(2),...) otherwise we may not clear an existing non-zero k 
when setting a new rate. Is that correct? Not required for this series, 
but I think it should be fixed (if I'm indeed right).

I'm wondering also if we couldn't merge the loops in 
rockchip_rk3588_pll_frac_by_auto() and rk3588_pll_clk_set_by_auto(). The 
only difference I see is that p cannot be 1 when we have an exact match 
(the for-loop in rk3588_pll_clk_set_by_auto()), but if we modify 
rockchip_rk3588_pll_k_get() as suggested in another patch in this series 
to return 0 on success, we could have the function set k to 0 and still 
be valid. What do you think? This is further improvement and is not 
required for this series.

Cheers,
Quentin

  reply	other threads:[~2026-07-21 14:34 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-13 18:35 [PATCH 0/6] clk: rockchip: pll: fixes and simplification of maths in RK3588 frac PLL Alexey Charkov
2026-07-13 18:35 ` [PATCH 1/6] clk: rockchip: pll: drop misleading fout in rockchip_rk3588_pll_k_get() Alexey Charkov
2026-07-21 10:09   ` Quentin Schulz via U-Boot
2026-07-13 18:35 ` [PATCH 2/6] clk: rockchip: pll: fix rounding of negative k in RK3588 frac PLL Alexey Charkov
2026-07-21 12:57   ` Quentin Schulz via U-Boot
2026-07-13 18:35 ` [PATCH 3/6] clk: rockchip: pll: fix RK3588 frac PLL result for k=-32768 Alexey Charkov
2026-07-21 12:16   ` Quentin Schulz via U-Boot
2026-07-21 12:51     ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 4/6] clk: rockchip: pll: let rockchip_rk3588_pll_k_get update m directly Alexey Charkov
2026-07-21 12:19   ` Quentin Schulz via U-Boot
2026-07-21 12:47     ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 5/6] clk: rockchip: pll: fractional PLL coefficient is two's complement Alexey Charkov
2026-07-21 12:20   ` Quentin Schulz via U-Boot
2026-07-21 12:46     ` Alexey Charkov via U-Boot
2026-07-21 14:34       ` Quentin Schulz via U-Boot [this message]
2026-07-21 15:21         ` Alexey Charkov via U-Boot
2026-07-21 16:34           ` Quentin Schulz via U-Boot
2026-07-21 17:27             ` Alexey Charkov via U-Boot
2026-07-13 18:35 ` [PATCH 6/6] clk: rockchip: pll: fix overflow and drop manual two's complement in rk3588_pll_get_rate Alexey Charkov
2026-07-21 12:56   ` Quentin Schulz via U-Boot
2026-07-21 13:34     ` Alexey Charkov via U-Boot
2026-07-21 14:05       ` Quentin Schulz via U-Boot
2026-07-21 16:02         ` Alexey Charkov via U-Boot
2026-07-23  9:23   ` Quentin Schulz
2026-07-23 12:25     ` Alexey Charkov
2026-07-23 12:33       ` Quentin Schulz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c42cd1f8-2a74-4ef7-a426-ad43ee038b56@cherry.de \
    --to=u-boot@lists.u-boot-project.org \
    --cc=alchark@flipper.net \
    --cc=finley.xiao@rock-chips.com \
    --cc=ilias.apalodimas@linaro.org \
    --cc=jagan@edgeble.ai \
    --cc=jonas@kwiboo.se \
    --cc=kever.yang@rock-chips.com \
    --cc=lukma@denx.de \
    --cc=quentin.schulz@cherry.de \
    --cc=sjg@chromium.org \
    --cc=trini@konsulko.com \
    --cc=u-boot@lists.denx.de \
    --cc=zhangqing@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.