[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode

[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode

[Christian Schmidt]

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My EFI BIOS starts the graphics card up in my projector's preferred EDID
mode, 1080@60i. The Intel driver does not clear the interlaced bit:

#define   PIPECONF_PROGRESSIVE  (0 << 21)
#define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
#define   PIPECONF_INTERLACE_FIELD_0_ONLY               (7 << 21)

Likewise, I suppose that this bit is not set for interlaced modes
either, however interlaced modes are discarded anyway.

Signed-of-by: Charistian Schmidt <schmidt@digadd.de>

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diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c	2011-11-08 01:16:02.000000000 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c	2011-11-13 21:58:22.310791999 +0100
@@ -5136,7 +5136,7 @@
 		adjusted_mode->crtc_vsync_end -= 1;
 		adjusted_mode->crtc_vsync_start -= 1;
 	} else
-		pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+		pipeconf &= ~PIPECONF_INTERLACE_FIELD_0_ONLY; /* progressive */
 
 	I915_WRITE(HTOTAL(pipe),
 		   (adjusted_mode->crtc_hdisplay - 1) |

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Re: [PATCH] intel-dri: Fix initialization if startup happens in interlaced mode

[Chris Wilson]

On Sun, 13 Nov 2011 22:08:41 +0100, Christian Schmidt <schmidt@digadd.de> wrote:
> My EFI BIOS starts the graphics card up in my projector's preferred EDID
> mode, 1080@60i. The Intel driver does not clear the interlaced bit:
> 
> #define   PIPECONF_PROGRESSIVE  (0 << 21)
> #define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
> #define   PIPECONF_INTERLACE_FIELD_0_ONLY               (7 << 21)
> 
> Likewise, I suppose that this bit is not set for interlaced modes
> either, however interlaced modes are discarded anyway.

The patch is correct, we do need to clear all 3 bits to restore
progressive mode. However it would be better to add a new
#define PIPECONF_INTERLACE_MASK (7 << 21)
so that we do not confuse clearing all interlace bits with unsetting a
particular mode.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre