From: "Cousson, Benoit" <b-cousson@ti.com>
To: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Archit Taneja <archit@ti.com>,
linux-omap@vger.kernel.org, linux@arm.linux.org.uk,
linux-fbdev@vger.kernel.org
Subject: Re: [PATCH v2] OMAPDSS: HACK: Ensure DSS clock domain gets out of idle when HDMI is enabled
Date: Tue, 14 Feb 2012 12:58:05 +0000 [thread overview]
Message-ID: <4F3A5A5D.4020906@ti.com> (raw)
In-Reply-To: <1329220678.1845.68.camel@deskari>
Hi Tomi,
On 2/14/2012 12:57 PM, Tomi Valkeinen wrote:
> Hi,
>
> On Fri, 2012-02-10 at 11:45 +0530, Archit Taneja wrote:
>> For DSS clock domain to transition from idle to active state. It's necessary
>> to enable the optional clock DSS_FCLK before we enable the module using the
>> MODULEMODE bits in the clock domain's CM_DSS_DSS_CLKCTRL register.
>>
>> This sequence was not followed correctly for the 'dss_hdmi' hwmod and it led
>> to DSS clock domain not getting out of idle when pm_runtime_get_sync() was
>> called for hdmi's platform device.
>>
>> Since the clock domain failed to change it's state to active, the hwmod code
>> disables any clocks it had enabled before for this hwmod. This led to the clock
>> 'dss_48mhz_clk' gettind disabled.
>>
>> When hdmi's runtime_resume() op is called, the call to dss_runtime_get()
>> correctly enables the DSS clock domain this time. However, the clock
>> 'dss_48mhz_clk' is needed for HDMI's PHY to function correctly. Since it was
>> disabled previously, the driver fails when it tries to enable HDMI's PHY.
>>
>> Fix this for now by ensuring that dss_runtime_get() is called before we call
>> pm_runtime_get_sync() for hdmi's platform device. A correct fix for later would
>> be to modify the DSS related hwmod's mainclks, and also some changes in how
>> opt clocks are handled in the DSS driver.
>>
>> This fixes the issue of HDMI not working when it's the default display. The
>> issue is not seen if any other display is already enabled as the first display
>> would have correctly enabled the DSS clockdomain.
>
> I think this looks fine, it's shouldn't have any side effects and is
> easy to remove later.
>
> Benoit, do you think we'll get the MODULEMODE mess cleaned up in the
> hwmod/clk framework at some point, and the drivers could do without
> these kinds of hacks? =)
The best way to fix that for my point of view is to go to device tree
or/and to consider the DSS as the parent of all the DSS modules.
pm_runtime will then always ensure that the parent is enabled before any
of the child are used.
Implementing that with hwmod is not the right approach since is will
require to add some more complex OMAP custom stuff in the hwmod fmwk
whereas the LDM is already able to handle that.
The whole point is that going to device tree, we will have to change the
responsibility of hwmod to make it focus mainly on OMAP PRCM stuff and
let the device handles the IRQ/DMA/REG/CLKS resources since it is the
correct place to do that.
Regards,
Benoit
WARNING: multiple messages have this Message-ID (diff)
From: "Cousson, Benoit" <b-cousson@ti.com>
To: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Archit Taneja <archit@ti.com>,
linux-omap@vger.kernel.org, linux@arm.linux.org.uk,
linux-fbdev@vger.kernel.org
Subject: Re: [PATCH v2] OMAPDSS: HACK: Ensure DSS clock domain gets out of idle when HDMI is enabled
Date: Tue, 14 Feb 2012 13:58:05 +0100 [thread overview]
Message-ID: <4F3A5A5D.4020906@ti.com> (raw)
In-Reply-To: <1329220678.1845.68.camel@deskari>
Hi Tomi,
On 2/14/2012 12:57 PM, Tomi Valkeinen wrote:
> Hi,
>
> On Fri, 2012-02-10 at 11:45 +0530, Archit Taneja wrote:
>> For DSS clock domain to transition from idle to active state. It's necessary
>> to enable the optional clock DSS_FCLK before we enable the module using the
>> MODULEMODE bits in the clock domain's CM_DSS_DSS_CLKCTRL register.
>>
>> This sequence was not followed correctly for the 'dss_hdmi' hwmod and it led
>> to DSS clock domain not getting out of idle when pm_runtime_get_sync() was
>> called for hdmi's platform device.
>>
>> Since the clock domain failed to change it's state to active, the hwmod code
>> disables any clocks it had enabled before for this hwmod. This led to the clock
>> 'dss_48mhz_clk' gettind disabled.
>>
>> When hdmi's runtime_resume() op is called, the call to dss_runtime_get()
>> correctly enables the DSS clock domain this time. However, the clock
>> 'dss_48mhz_clk' is needed for HDMI's PHY to function correctly. Since it was
>> disabled previously, the driver fails when it tries to enable HDMI's PHY.
>>
>> Fix this for now by ensuring that dss_runtime_get() is called before we call
>> pm_runtime_get_sync() for hdmi's platform device. A correct fix for later would
>> be to modify the DSS related hwmod's mainclks, and also some changes in how
>> opt clocks are handled in the DSS driver.
>>
>> This fixes the issue of HDMI not working when it's the default display. The
>> issue is not seen if any other display is already enabled as the first display
>> would have correctly enabled the DSS clockdomain.
>
> I think this looks fine, it's shouldn't have any side effects and is
> easy to remove later.
>
> Benoit, do you think we'll get the MODULEMODE mess cleaned up in the
> hwmod/clk framework at some point, and the drivers could do without
> these kinds of hacks? =)
The best way to fix that for my point of view is to go to device tree
or/and to consider the DSS as the parent of all the DSS modules.
pm_runtime will then always ensure that the parent is enabled before any
of the child are used.
Implementing that with hwmod is not the right approach since is will
require to add some more complex OMAP custom stuff in the hwmod fmwk
whereas the LDM is already able to handle that.
The whole point is that going to device tree, we will have to change the
responsibility of hwmod to make it focus mainly on OMAP PRCM stuff and
let the device handles the IRQ/DMA/REG/CLKS resources since it is the
correct place to do that.
Regards,
Benoit
next prev parent reply other threads:[~2012-02-14 12:58 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-10 6:15 [PATCH v2] OMAPDSS: HACK: Ensure DSS clock domain gets out of idle when HDMI is enabled Archit Taneja
2012-02-10 6:27 ` Archit Taneja
2012-02-14 11:57 ` Tomi Valkeinen
2012-02-14 11:57 ` Tomi Valkeinen
2012-02-14 12:58 ` Cousson, Benoit [this message]
2012-02-14 12:58 ` Cousson, Benoit
2012-02-14 13:15 ` Tomi Valkeinen
2012-02-14 13:15 ` Tomi Valkeinen
2012-02-14 13:30 ` Archit Taneja
2012-02-14 13:42 ` Archit Taneja
2012-02-14 13:33 ` Tomi Valkeinen
2012-02-14 13:33 ` Tomi Valkeinen
2012-02-14 13:45 ` Archit Taneja
2012-02-14 13:57 ` Archit Taneja
2012-02-14 16:02 ` Cousson, Benoit
2012-02-14 16:02 ` Cousson, Benoit
2012-02-14 16:59 ` Shilimkar, Santosh
2012-02-14 16:59 ` Shilimkar, Santosh
2012-02-14 19:42 ` Archit Taneja
2012-02-14 19:54 ` Archit Taneja
2012-02-14 15:41 ` Cousson, Benoit
2012-02-14 15:41 ` Cousson, Benoit
2012-02-15 12:01 ` Archit Taneja
2012-02-15 12:13 ` Archit Taneja
2012-02-15 12:35 ` Cousson, Benoit
2012-02-15 12:35 ` Cousson, Benoit
2012-02-15 12:51 ` Tomi Valkeinen
2012-02-15 12:51 ` Tomi Valkeinen
2012-02-15 13:04 ` Cousson, Benoit
2012-02-15 13:04 ` Cousson, Benoit
2012-02-15 19:59 ` Kevin Hilman
2012-02-15 19:59 ` Kevin Hilman
2012-02-16 8:22 ` Tomi Valkeinen
2012-02-16 8:22 ` Tomi Valkeinen
2012-02-16 10:16 ` Cousson, Benoit
2012-02-16 10:16 ` Cousson, Benoit
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