Re: [PATCH v2 1/9] drm/xe/hw_error: Reuse CSC worker for generic error handling

["Tauro, Riana" <riana.tauro@intel.com>]

On 27-10-2026 18:31, Mallesh, Koujalagi wrote:
>
> On 26-10-2026 11:35 am, Riana Tauro wrote:
>> Convert the CSC hardware error worker to a delayed work item so it
>> can be reused for generic hardware error handling in later patches.
>>
>> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_hw_error.c   | 10 +++++-----
>>   drivers/gpu/drm/xe/xe_tile_types.h |  6 +++---
>>   2 files changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c 
>> b/drivers/gpu/drm/xe/xe_hw_error.c
>> index ac720710c8e8..41ddd997478b 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_error.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
>> @@ -166,9 +166,9 @@ 
>> static_assert(ARRAY_SIZE(pvc_master_local_nonfatal_err_reg) == 
>> XE_RAS_REG_SIZE);
>>                            pvc_master_local_fatal_err_reg : \
>>                            pvc_master_local_nonfatal_err_reg)
>>   -static void csc_hw_error_work(struct work_struct *work)
>> +static void hw_error_work(struct work_struct *work)
>>   {
>> -    struct xe_tile *tile = container_of(work, typeof(*tile), 
>> csc_hw_error_work);
>> +    struct xe_tile *tile = container_of(work, typeof(*tile), 
>> hw_error_work.work);
>>       struct xe_device *xe = tile_to_xe(tile);
>>         guard(xe_pm_runtime)(xe);
>> @@ -204,7 +204,7 @@ static void csc_hw_error_handler(struct xe_tile 
>> *tile, const enum hardware_error
>>                            hec_uncorrected_fw_errors[err_bit], 
>> severity_str,
>>                            err_bit);
>>   -            schedule_work(&tile->csc_hw_error_work);
>> +            schedule_delayed_work(&tile->hw_error_work, 0);
>
> hmm, what is rational to use delay work? and making CSC work as 
> generic hardware error handling?
>
> do u see any impact when we trigger fault injection etc.

This is used in patch [4]
We shouldn't have csc error injection in systems with sysctrl. So 
shouldn't affect.

Thanks
Riana


>
>>           }
>>       }
>>   @@ -513,7 +513,7 @@ void xe_hw_error_irq_handler(struct xe_tile 
>> *tile, const u32 master_ctl)
>>       enum hardware_error hw_err;
>>         if (xe_fault_csc_hw_error())
>> -        schedule_work(&tile->csc_hw_error_work);
>> +        schedule_delayed_work(&tile->hw_error_work, 0);
>>         for (hw_err = 0; hw_err < HARDWARE_ERROR_MAX; hw_err++) {
>>           if (master_ctl & ERROR_IRQ(hw_err))
>> @@ -551,7 +551,7 @@ void xe_hw_error_init(struct xe_device *xe)
>>       if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
>>           return;
>>   -    INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
>> +    INIT_DELAYED_WORK(&tile->hw_error_work, hw_error_work);
>>         process_hw_errors(xe);
>>   }
>> diff --git a/drivers/gpu/drm/xe/xe_tile_types.h 
>> b/drivers/gpu/drm/xe/xe_tile_types.h
>> index e1368c04846a..0f41738635c5 100644
>> --- a/drivers/gpu/drm/xe/xe_tile_types.h
>> +++ b/drivers/gpu/drm/xe/xe_tile_types.h
>> @@ -7,7 +7,7 @@
>>   #define _XE_TILE_TYPES_H_
>>     #include <linux/mutex_types.h>
>> -#include <linux/workqueue_types.h>
>> +#include <linux/workqueue.h>
>>     #include "xe_lmtt_types.h"
>>   #include "xe_memirq_types.h"
>> @@ -118,8 +118,8 @@ struct xe_tile {
>>       /** @memirq: Memory Based Interrupts. */
>>       struct xe_memirq memirq;
>>   -    /** @csc_hw_error_work: worker to report CSC HW errors */
>> -    struct work_struct csc_hw_error_work;
>> +    /** @hw_error_work: delayed work to handle HW errors */
>> +    struct delayed_work hw_error_work;
>>         /** @pcode: tile's PCODE */
>>       struct {