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From: "Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>
To: Riana Tauro <riana.tauro@intel.com>, <intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
	<aravind.iddamsetty@linux.intel.com>, <badal.nilawar@intel.com>,
	<raag.jadav@intel.com>, <ravi.kishore.koppuravuri@intel.com>,
	<tejas.upadhyay@intel.com>
Subject: Re: [PATCH v2 6/9] drm/xe/pci: Add upstream switch port lookup helper
Date: Wed, 28 Oct 2026 15:15:07 +0530	[thread overview]
Message-ID: <55118b62-934a-4e81-bfdc-1e2f67777253@intel.com> (raw)
In-Reply-To: <20261026060459.771448-17-riana.tauro@intel.com>


On 26-10-2026 11:35 am, Riana Tauro wrote:
> Move the USP lookup logic out of RAS code and into the PCI
nit: s/into the PCI layer/into the xe driver's PCI layer
> layer so it can be reused by other callers.
>
> No functional change.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_pci.c | 23 +++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_pci.h |  1 +
>   drivers/gpu/drm/xe/xe_ras.c | 19 ++-----------------
>   3 files changed, 26 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 0c13eb901aa7..a9b8e65dff07 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1521,6 +1521,29 @@ struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev)
>   	return to_xe_device(drm);
>   }
>   
> +/**
> + * xe_pci_get_usp_dev() - Get the upstream switch port device.
> + * @pdev: pci device of SGunit
> + *
> + * Device Hierarchy:
> + * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
> + *
> + * The function traverses the PCI device hierarchy to find the upstream switch port
> + * device.
> + *
> + * Return: pointer to USP &pci_dev, NULL otherwise.
> + */
> +struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev)
> +{
> +	struct pci_dev *vsp;
> +
> +	vsp = pci_upstream_bridge(pdev);
> +	if (!vsp)
> +		return NULL;
> +
> +	return pci_upstream_bridge(vsp);
> +}
> +
>   int xe_register_pci_driver(void)
>   {
>   	return pci_register_driver(&xe_pci_driver);
> diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
> index 11bcc5fe2c5b..3dc3539c3970 100644
> --- a/drivers/gpu/drm/xe/xe_pci.h
> +++ b/drivers/gpu/drm/xe/xe_pci.h
> @@ -11,5 +11,6 @@ struct pci_dev;
>   int xe_register_pci_driver(void);
>   void xe_unregister_pci_driver(void);
>   struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
> +struct pci_dev *xe_pci_get_usp_dev(struct pci_dev *pdev);
>   
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 2b1a7cb01b0d..a91c3d924e8c 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -10,6 +10,7 @@
>   #include "xe_device.h"
>   #include "xe_drm_ras.h"
>   #include "xe_log.h"
> +#include "xe_pci.h"
>   #include "xe_pm.h"
>   #include "xe_printk.h"
>   #include "xe_ras.h"
> @@ -462,22 +463,6 @@ static void get_offline_list(struct xe_device *xe)
>   			      &response, sizeof(response), &response.common, false);
>   }
>   
> -static struct pci_dev *find_usp_dev(struct pci_dev *pdev)
> -{
> -	struct pci_dev *vsp;
> -
> -	/*
> -	 * Device Hierarchy:
> -	 *
> -	 * Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit (GPU endpoint)
> -	 */
> -	vsp = pci_upstream_bridge(pdev);
> -	if (!vsp)
> -		return NULL;
> -
> -	return pci_upstream_bridge(vsp);
> -}
> -
>   static void ras_usp_aer_init(struct xe_device *xe)
>   {
>   	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> @@ -485,7 +470,7 @@ static void ras_usp_aer_init(struct xe_device *xe)
>   	u16 aer_cap;
>   	u32 status;
>   
> -	usp = find_usp_dev(pdev);
> +	usp = xe_pci_get_usp_dev(pdev);
>   	if (!usp)
>   		return;
>   

  reply	other threads:[~2026-10-28  9:45 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-26  6:04 [PATCH v2 0/9] Handle non-fatal errors routed via IRQ Riana Tauro
2026-10-26  6:05 ` [PATCH v2 1/9] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-10-27 13:01   ` Mallesh, Koujalagi
2026-10-29  8:07     ` Tauro, Riana
2026-10-26  6:05 ` [PATCH v2 2/9] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-10-26  9:37   ` sashiko-bot
2026-10-27 14:51   ` Mallesh, Koujalagi
2026-10-29  8:11     ` Tauro, Riana
2026-10-28 16:07   ` Andi Shyti
2026-10-26  6:05 ` [PATCH v2 3/9] drm/xe: Add wa_14028434957 to Graphics Version 35.11 Riana Tauro
2026-10-28  6:16   ` Mallesh, Koujalagi
2026-10-29  8:12     ` Tauro, Riana
2026-10-28 14:19   ` Gustavo Sousa
2026-10-29  8:32     ` Tauro, Riana
2026-10-26  6:05 ` [PATCH v2 4/9] drm/xe/xe_hw_error: Handle non-fatal errors routed via direct IRQ Riana Tauro
2026-10-26 10:09   ` sashiko-bot
2026-10-26 10:49   ` Upadhyay, Tejas
2026-10-26 14:08     ` Tauro, Riana
2026-10-29  6:36       ` Mallesh, Koujalagi
2026-10-29  8:17         ` Tauro, Riana
2026-10-28 16:15   ` Andi Shyti
2026-10-29  8:23     ` Tauro, Riana
2026-10-28 16:17   ` Andi Shyti
2026-10-29  8:20     ` Tauro, Riana
2026-10-26  6:05 ` [PATCH v2 5/9] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
2026-10-28  9:24   ` Mallesh, Koujalagi
2026-10-29  8:27     ` Tauro, Riana
2026-10-26  6:05 ` [PATCH v2 6/9] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
2026-10-28  9:45   ` Mallesh, Koujalagi [this message]
2026-10-28 16:19   ` Andi Shyti
2026-10-29  8:28     ` Tauro, Riana
2026-10-26  6:05 ` [PATCH v2 7/9] drm/xe/xe_ras: Disable hw error worker when AER handling is in progress Riana Tauro
2026-10-26 10:32   ` sashiko-bot
2026-10-26  6:05 ` [PATCH v2 8/9] drm/xe/xe_ras: Trigger SBR for all device errors Riana Tauro
2026-10-28 16:25   ` Andi Shyti
2026-10-29  5:18   ` Mallesh, Koujalagi
2026-10-26  6:05 ` [PATCH v2 9/9] drm/xe/ras: Skip double-bit ECC page offlining on AER path Riana Tauro
2026-10-28 16:26   ` Andi Shyti
2026-10-29  5:25   ` Mallesh, Koujalagi
2026-10-26  6:30 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev2) Patchwork
2026-10-26  7:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-26  8:55 ` ✗ Xe.CI.FULL: failure " Patchwork

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