From: Stephen Warren <swarren@wwwdotorg.org>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>,
Russell King <linux@arm.linux.org.uk>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Simon Glass <sjg@chromium.org>,
Mike Turquette <mturquette@linaro.org>,
Joseph Lo <josephl@nvidia.com>,
devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 07/10] ARM: tegra: Define Tegra114 CAR binding
Date: Mon, 04 Feb 2013 14:16:44 -0700 [thread overview]
Message-ID: <5110253C.3070005@wwwdotorg.org> (raw)
In-Reply-To: <1359713962-16822-8-git-send-email-pdeschrijver@nvidia.com>
On 02/01/2013 03:18 AM, Peter De Schrijver wrote:
> The device tree binding models Tegra114 CAR (Clock And Reset) as a single
> monolithic clock provider.
...
> +- #clock-cells : Should be 1.
> + In clock consumers, this cell represents the clock ID exposed by the CAR.
...
> + 222 pll_u
> + 223 pll_u_480M
> + 224 pll_u_60M
> + 225 pll_u_48M
> + 226 pll_u_12M
I notice here that we have separate clock IDs for the various PLL u
outputs. We don't have this on Tegra20 or Tegra30, but I wonder if we
should have them there too?
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 07/10] ARM: tegra: Define Tegra114 CAR binding
Date: Mon, 04 Feb 2013 14:16:44 -0700 [thread overview]
Message-ID: <5110253C.3070005@wwwdotorg.org> (raw)
In-Reply-To: <1359713962-16822-8-git-send-email-pdeschrijver@nvidia.com>
On 02/01/2013 03:18 AM, Peter De Schrijver wrote:
> The device tree binding models Tegra114 CAR (Clock And Reset) as a single
> monolithic clock provider.
...
> +- #clock-cells : Should be 1.
> + In clock consumers, this cell represents the clock ID exposed by the CAR.
...
> + 222 pll_u
> + 223 pll_u_480M
> + 224 pll_u_60M
> + 225 pll_u_48M
> + 226 pll_u_12M
I notice here that we have separate clock IDs for the various PLL u
outputs. We don't have this on Tegra20 or Tegra30, but I wonder if we
should have them there too?
next prev parent reply other threads:[~2013-02-04 21:16 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-01 10:18 [PATCH v5 00/10] Tegra114 clockframework Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 03/10] clk: tegra: Add PLL post divider table Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
[not found] ` <1359713962-16822-4-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:28 ` Prashant Gaikwad
2013-02-04 6:28 ` Prashant Gaikwad
2013-02-04 6:28 ` Prashant Gaikwad
[not found] ` <1359713962-16822-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-01 10:18 ` [PATCH v5 01/10] clk: tegra: Refactor PLL programming code Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
[not found] ` <1359713962-16822-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:06 ` Prashant Gaikwad
2013-02-04 6:06 ` Prashant Gaikwad
2013-02-04 6:06 ` Prashant Gaikwad
2013-02-04 14:32 ` Peter De Schrijver
2013-02-04 14:32 ` Peter De Schrijver
2013-02-05 5:42 ` Prashant Gaikwad
2013-02-05 5:42 ` Prashant Gaikwad
[not found] ` <51109BB3.8000706-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-05 13:23 ` Peter De Schrijver
2013-02-05 13:23 ` Peter De Schrijver
2013-02-05 13:23 ` Peter De Schrijver
[not found] ` <20130205132355.GD3073-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-06 12:32 ` Peter De Schrijver
2013-02-06 12:32 ` Peter De Schrijver
2013-02-06 12:32 ` Peter De Schrijver
2013-02-04 21:57 ` Stephen Warren
2013-02-04 21:57 ` Stephen Warren
2013-02-04 21:57 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 02/10] clk: tegra: Add TEGRA_PLL_BYPASS flag Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
[not found] ` <1359713962-16822-3-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:13 ` Prashant Gaikwad
2013-02-04 6:13 ` Prashant Gaikwad
2013-02-04 6:13 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
[not found] ` <1359713962-16822-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-01 19:40 ` Rhyland Klein
2013-02-01 19:40 ` Rhyland Klein
2013-02-01 19:40 ` Rhyland Klein
[not found] ` <510C1A2E.5010408-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:35 ` Prashant Gaikwad
2013-02-04 6:35 ` Prashant Gaikwad
2013-02-04 6:35 ` Prashant Gaikwad
[not found] ` <510F56B1.5060409-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 10:37 ` Peter De Schrijver
2013-02-04 10:37 ` Peter De Schrijver
2013-02-04 10:37 ` Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 05/10] clk: tegra: Add flags to tegra_clk_periph() Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
[not found] ` <1359713962-16822-6-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:33 ` Prashant Gaikwad
2013-02-04 6:33 ` Prashant Gaikwad
2013-02-04 6:33 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 06/10] clk: tegra: Workaround for Tegra114 MSENC problem Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-04 6:39 ` Prashant Gaikwad
2013-02-04 6:39 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 07/10] ARM: tegra: Define Tegra114 CAR binding Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-04 21:16 ` Stephen Warren [this message]
2013-02-04 21:16 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 08/10] ARM: dt: Add references to tegra_car clocks Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-04 6:45 ` Prashant Gaikwad
2013-02-04 6:45 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia,tegra114-car Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia, tegra114-car Peter De Schrijver
2013-02-04 7:10 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia,tegra114-car Prashant Gaikwad
2013-02-04 7:10 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia, tegra114-car Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-01 10:18 ` Peter De Schrijver
2013-02-04 7:08 ` Prashant Gaikwad
2013-02-04 7:08 ` Prashant Gaikwad
[not found] ` <510F5E87.90801-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 10:45 ` Peter De Schrijver
2013-02-04 10:45 ` Peter De Schrijver
2013-02-04 10:45 ` Peter De Schrijver
[not found] ` <20130204104531.GQ2364-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-04 14:07 ` Peter De Schrijver
2013-02-04 14:07 ` Peter De Schrijver
2013-02-04 14:07 ` Peter De Schrijver
2013-02-04 21:01 ` Stephen Warren
2013-02-04 21:01 ` Stephen Warren
2013-02-07 16:18 ` Peter De Schrijver
2013-02-07 16:18 ` Peter De Schrijver
2013-02-04 14:34 ` Peter De Schrijver
2013-02-04 14:34 ` Peter De Schrijver
[not found] ` <20130204143401.GW2364-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-05 5:36 ` Prashant Gaikwad
2013-02-05 5:36 ` Prashant Gaikwad
2013-02-05 5:36 ` Prashant Gaikwad
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