From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Russell King - ARM Linux
<linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
ARM kernel mailing list
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>,
Bo Yan <byan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: Re: Multi-platform, and secure-only ARM errata workarounds
Date: Mon, 04 Mar 2013 10:08:27 -0700 [thread overview]
Message-ID: <5134D50B.8060001@wwwdotorg.org> (raw)
In-Reply-To: <20130304091600.GC27241-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
On 03/04/2013 02:16 AM, Peter De Schrijver wrote:
> On Mon, Mar 04, 2013 at 07:34:36AM +0100, Peter De Schrijver wrote:
>> On Fri, Mar 01, 2013 at 06:37:27PM +0100, Stephen Warren wrote:
>>
>> ...
>>
>>> Since some of the bits that enable WARs are banked per CPU, the WAR
>>> needs to be enabled by code running on each individual CPU, each time
>>> it's powered on. When a secure monitor exists, the CPU will boot through
>>> it (at least on Tegra, there is a single register that defines the boot
>>> vector for all CPUs; I don't know if that fact is ARM-architectural or
>>> not), so the secure monitor can apply the WAR if needed. However, when
>>> there is no secure monitor and the kernel runs in secure world, the
>>> kernel would have to apply those WARs, since the only code that runs is
>>> in the kernel.
>>>
>>
>> The boot vector register is Tegra specific. At least on OMAP all cores boot
>> from ROM afaik.
>
> Nicolas Pitre suggested a slightly different solution to me:
>
> 1) Handle CPU0 errata WARs in the bootloader
OK - there's not much choice here, and I've posted a patch for this for
Tegra U-Boot already.
> 2) Indicate in device tree if linux is booting in secude mode or non-secure
> mode.
> 3) Use this information in the kernel to decide how to apply the WARs for
> secondary core bringup and after powerungating.
Hmmm. That seems like a lot of overhead to avoid duplicating roughly 8
assembly instructions per Tegra version. Also, some/all of the WARs in
question probably need to be applied very early by assembly code, e.g.
before MMU is re-enabled, so I think you'd end up parsing DT from
assembly again, which would be painful. I tend to think just including
the code in the kernel's SoC-specific reset handler is simplest, and
even with the slight duplication, probably most maintainable. I've
written a patch for this for Tegra already, which I hope to post later
today, depending on testing and what other stuff I get side-tracked on.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: Multi-platform, and secure-only ARM errata workarounds
Date: Mon, 04 Mar 2013 10:08:27 -0700 [thread overview]
Message-ID: <5134D50B.8060001@wwwdotorg.org> (raw)
In-Reply-To: <20130304091600.GC27241@tbergstrom-lnx.Nvidia.com>
On 03/04/2013 02:16 AM, Peter De Schrijver wrote:
> On Mon, Mar 04, 2013 at 07:34:36AM +0100, Peter De Schrijver wrote:
>> On Fri, Mar 01, 2013 at 06:37:27PM +0100, Stephen Warren wrote:
>>
>> ...
>>
>>> Since some of the bits that enable WARs are banked per CPU, the WAR
>>> needs to be enabled by code running on each individual CPU, each time
>>> it's powered on. When a secure monitor exists, the CPU will boot through
>>> it (at least on Tegra, there is a single register that defines the boot
>>> vector for all CPUs; I don't know if that fact is ARM-architectural or
>>> not), so the secure monitor can apply the WAR if needed. However, when
>>> there is no secure monitor and the kernel runs in secure world, the
>>> kernel would have to apply those WARs, since the only code that runs is
>>> in the kernel.
>>>
>>
>> The boot vector register is Tegra specific. At least on OMAP all cores boot
>> from ROM afaik.
>
> Nicolas Pitre suggested a slightly different solution to me:
>
> 1) Handle CPU0 errata WARs in the bootloader
OK - there's not much choice here, and I've posted a patch for this for
Tegra U-Boot already.
> 2) Indicate in device tree if linux is booting in secude mode or non-secure
> mode.
> 3) Use this information in the kernel to decide how to apply the WARs for
> secondary core bringup and after powerungating.
Hmmm. That seems like a lot of overhead to avoid duplicating roughly 8
assembly instructions per Tegra version. Also, some/all of the WARs in
question probably need to be applied very early by assembly code, e.g.
before MMU is re-enabled, so I think you'd end up parsing DT from
assembly again, which would be painful. I tend to think just including
the code in the kernel's SoC-specific reset handler is simplest, and
even with the slight duplication, probably most maintainable. I've
written a patch for this for Tegra already, which I hope to post later
today, depending on testing and what other stuff I get side-tracked on.
next prev parent reply other threads:[~2013-03-04 17:08 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-25 23:47 Multi-platform, and secure-only ARM errata workarounds Stephen Warren
2013-02-25 23:47 ` Stephen Warren
2013-02-26 9:36 ` Marc Dietrich
2013-02-26 9:36 ` Marc Dietrich
[not found] ` <4928288.ie8EUukfVD-D3pzGp0ZKuDWZbiwp4sFPyrtisivX6KghOMvlBiLbJSELgA04lAiVw@public.gmane.org>
2013-02-26 16:39 ` Stephen Warren
2013-02-26 16:39 ` Stephen Warren
[not found] ` <512CE533.6020005-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-26 22:31 ` Nicolas Pitre
2013-02-26 22:31 ` Nicolas Pitre
2013-02-27 9:03 ` Marc Dietrich
2013-02-27 9:03 ` Marc Dietrich
[not found] ` <22709540.96uJddbx1U-D3pzGp0ZKuDWZbiwp4sFPyrtisivX6KghOMvlBiLbJSELgA04lAiVw@public.gmane.org>
2013-02-27 14:00 ` Rob Herring
2013-02-27 14:00 ` Rob Herring
2013-02-27 17:42 ` Stephen Warren
2013-02-27 17:42 ` Stephen Warren
2013-02-28 13:58 ` Marc Dietrich
2013-02-28 13:58 ` Marc Dietrich
[not found] ` <512BF81A.3080700-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-26 10:23 ` Arnd Bergmann
2013-02-26 10:23 ` Arnd Bergmann
[not found] ` <201302261023.26939.arnd-r2nGTMty4D4@public.gmane.org>
2013-02-26 10:31 ` Catalin Marinas
2013-02-26 10:31 ` Catalin Marinas
[not found] ` <20130226103114.GA16875-5wv7dgnIgG8@public.gmane.org>
2013-02-26 10:35 ` Catalin Marinas
2013-02-26 10:35 ` Catalin Marinas
[not found] ` <20130226103503.GB16875-5wv7dgnIgG8@public.gmane.org>
2013-02-26 10:48 ` Arnd Bergmann
2013-02-26 10:48 ` Arnd Bergmann
[not found] ` <201302261048.06644.arnd-r2nGTMty4D4@public.gmane.org>
2013-02-26 11:11 ` Catalin Marinas
2013-02-26 11:11 ` Catalin Marinas
2013-02-26 11:35 ` Russell King - ARM Linux
2013-02-26 11:35 ` Russell King - ARM Linux
[not found] ` <20130226113538.GS17833-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2013-02-26 14:07 ` Rob Herring
2013-02-26 14:07 ` Rob Herring
2013-02-26 18:01 ` Stephen Warren
2013-02-26 18:01 ` Stephen Warren
[not found] ` <512CF87A.4090404-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-26 18:11 ` Russell King - ARM Linux
2013-02-26 18:11 ` Russell King - ARM Linux
[not found] ` <20130226181114.GU17833-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2013-02-26 18:30 ` Stephen Warren
2013-02-26 18:30 ` Stephen Warren
[not found] ` <512CFF30.9080300-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-26 18:49 ` Russell King - ARM Linux
2013-02-26 18:49 ` Russell King - ARM Linux
[not found] ` <20130226184942.GV17833-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2013-02-27 6:07 ` Santosh Shilimkar
2013-02-27 6:07 ` Santosh Shilimkar
2013-03-01 17:37 ` Stephen Warren
2013-03-01 17:37 ` Stephen Warren
[not found] ` <5130E757.6090500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-03-01 18:05 ` Russell King - ARM Linux
2013-03-01 18:05 ` Russell King - ARM Linux
2013-03-04 6:34 ` Peter De Schrijver
2013-03-04 6:34 ` Peter De Schrijver
[not found] ` <20130304063436.GB27241-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-03-04 9:16 ` Peter De Schrijver
2013-03-04 9:16 ` Peter De Schrijver
[not found] ` <20130304091600.GC27241-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-03-04 17:08 ` Stephen Warren [this message]
2013-03-04 17:08 ` Stephen Warren
[not found] ` <5134D50B.8060001-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-03-05 7:40 ` Peter De Schrijver
2013-03-05 7:40 ` Peter De Schrijver
[not found] ` <20130305074047.GH27241-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-03-05 17:00 ` Stephen Warren
2013-03-05 17:00 ` Stephen Warren
[not found] ` <513624AA.4090207-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-03-06 8:14 ` Peter De Schrijver
2013-03-06 8:14 ` Peter De Schrijver
[not found] ` <20130306081401.GN27241-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-03-06 16:18 ` Stephen Warren
2013-03-06 16:18 ` Stephen Warren
2013-03-10 17:25 ` Santosh Shilimkar
2013-03-10 17:25 ` Santosh Shilimkar
[not found] ` <513CC21E.7080901-l0cyMroinI0@public.gmane.org>
2013-03-10 18:47 ` Olof Johansson
2013-03-10 18:47 ` Olof Johansson
[not found] ` <CAOesGMgYL19+u-bLp080iasct5xtC=qfNCoz=SY7bbVgF=7JQg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-03-11 16:59 ` Stephen Warren
2013-03-11 16:59 ` Stephen Warren
2013-03-11 18:54 ` Jason Gunthorpe
2013-03-11 18:54 ` Jason Gunthorpe
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