[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine

[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine

[Ilia Mirkin]

I went through the gallium-nine tree and picked out nouveau patches that are
general bug-fixes. The first bunch I'd like to also get into 10.2. I've
reviewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.

Unless I hear objections, I'd like to push this by Friday.

Christoph Bumiller (11):
  nv50,nvc0: always pull out bufctx on context destruction
  nv50: setup scissors on clear_render_target/depth_stencil
  nv50,nvc0: set constbufs dirty on pipe context switch
  nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
  nv50/ir/opt: fix constant folding with saturate modifier
  nv50/ir: fix lowering of predicated instructions (without defs)
  nv50/ir/tgsi: optimize KIL
  nv50,nvc0: handle guard band defines
  nv50,nvc0: allow 15,16,30 bpp display formats
  nvc0: use PRIxPTR for sizeof()
  nvc0: assert that we have vertex elements state

Joakim Sindholt (1):
  nv50: count wrapped textures towards the tex_obj count

 .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp    | 11 ++++++++++-
 .../nouveau/codegen/nv50_ir_lowering_nv50.cpp        |  5 ++++-
 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp     |  4 +++-
 src/gallium/drivers/nouveau/nv50/nv50_context.c      |  7 ++-----
 src/gallium/drivers/nouveau/nv50/nv50_formats.c      |  8 ++++----
 src/gallium/drivers/nouveau/nv50/nv50_miptree.c      |  2 ++
 src/gallium/drivers/nouveau/nv50/nv50_screen.c       | 10 ++++++++--
 .../drivers/nouveau/nv50/nv50_state_validate.c       |  4 ++++
 src/gallium/drivers/nouveau/nv50/nv50_surface.c      | 20 ++++++++++++++++++--
 src/gallium/drivers/nouveau/nvc0/nvc0_context.c      |  9 +++++----
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c      |  2 +-
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c       | 10 ++++++++--
 .../drivers/nouveau/nvc0/nvc0_state_validate.c       |  1 +
 src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c          |  1 +
 14 files changed, 71 insertions(+), 23 deletions(-)

-- 
1.8.5.5

[PATCH 01/12] nv50, nvc0: always pull out bufctx on context destruction

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
---
 src/gallium/drivers/nouveau/nv50/nv50_context.c | 7 ++-----
 src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 9 +++++----
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c b/src/gallium/drivers/nouveau/nv50/nv50_context.c
index 52e14bf..f844592 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.c
@@ -122,12 +122,9 @@ nv50_destroy(struct pipe_context *pipe)
 {
    struct nv50_context *nv50 = nv50_context(pipe);
 
-   if (nv50_context_screen(nv50)->cur_ctx == nv50) {
-      nv50->base.pushbuf->kick_notify = NULL;
+   if (nv50_context_screen(nv50)->cur_ctx == nv50)
       nv50_context_screen(nv50)->cur_ctx = NULL;
-      nouveau_pushbuf_bufctx(nv50->base.pushbuf, NULL);
-   }
-   /* need to flush before destroying the bufctx */
+   nouveau_pushbuf_bufctx(nv50->base.pushbuf, NULL);
    nouveau_pushbuf_kick(nv50->base.pushbuf, nv50->base.pushbuf->channel);
 
    nv50_context_unreference_resources(nv50);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
index 83c8c34..e5040c4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c
@@ -123,11 +123,12 @@ nvc0_destroy(struct pipe_context *pipe)
 {
    struct nvc0_context *nvc0 = nvc0_context(pipe);
 
-   if (nvc0->screen->cur_ctx == nvc0) {
-      nvc0->base.pushbuf->kick_notify = NULL;
+   if (nvc0->screen->cur_ctx == nvc0)
       nvc0->screen->cur_ctx = NULL;
-      nouveau_pushbuf_bufctx(nvc0->base.pushbuf, NULL);
-   }
+   /* Unset bufctx, we don't want to revalidate any resources after the flush.
+    * Other contexts will always set their bufctx again on action calls.
+    */
+   nouveau_pushbuf_bufctx(nvc0->base.pushbuf, NULL);
    nouveau_pushbuf_kick(nvc0->base.pushbuf, nvc0->base.pushbuf->channel);
 
    nvc0_context_unreference_resources(nvc0);
-- 
1.8.5.5

[PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil

[Ilia Mirkin]

From: Christoph Bumiller <e0425955@student.tuwien.ac.at>

[imirkin: add logic to also clear the "regular" scissors]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/nouveau/nv50/nv50_surface.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index 1f37527..6e68fb8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
 
    PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
 
+   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
+   PUSH_DATA (push, ( width << 16) | dstx);
+   PUSH_DATA (push, (height << 16) | dsty);
+   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
+   PUSH_DATA (push, 8192 << 16);
+   PUSH_DATA (push, 8192 << 16);
+   nv50->scissors_dirty |= 1;
+
    BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
    PUSH_DATA (push, 1);
    BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
@@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe,
                  (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
    }
 
-   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
+   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
 }
 
 static void
@@ -364,6 +372,14 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
 
    PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
 
+   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
+   PUSH_DATA (push, ( width << 16) | dstx);
+   PUSH_DATA (push, (height << 16) | dsty);
+   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
+   PUSH_DATA (push, 8192 << 16);
+   PUSH_DATA (push, 8192 << 16);
+   nv50->scissors_dirty |= 1;
+
    BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
    PUSH_DATAh(push, bo->offset + sf->offset);
    PUSH_DATA (push, bo->offset + sf->offset);
@@ -390,7 +406,7 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
                  (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
    }
 
-   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
+   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
 }
 
 void
-- 
1.8.5.5

[PATCH 03/12] nv50, nvc0: set constbufs dirty on pipe context switch

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller@speed.at>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 4 ++++
 src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c | 1 +
 2 files changed, 5 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index 18451c7..1dcb961 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -400,6 +400,10 @@ nv50_switch_pipe_context(struct nv50_context *ctx_to)
    ctx_to->viewports_dirty = ~0;
    ctx_to->scissors_dirty = ~0;
 
+   ctx_to->constbuf_dirty[0] =
+   ctx_to->constbuf_dirty[1] =
+   ctx_to->constbuf_dirty[2] = (1 << NV50_MAX_PIPE_CONSTBUFS) - 1;
+
    if (!ctx_to->vertex)
       ctx_to->dirty &= ~(NV50_NEW_VERTEX | NV50_NEW_ARRAYS);
 
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
index 40016fc..dcec910 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -531,6 +531,7 @@ nvc0_switch_pipe_context(struct nvc0_context *ctx_to)
    for (s = 0; s < 5; ++s) {
       ctx_to->samplers_dirty[s] = ~0;
       ctx_to->textures_dirty[s] = ~0;
+      ctx_to->constbuf_dirty[s] = (1 << NVC0_MAX_PIPE_CONSTBUFS) - 1;
    }
 
    if (!ctx_to->vertex)
-- 
1.8.5.5

[PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 3e44bf9..e24be51 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
    case TGSI_OPCODE_IMUL_HI:
    case TGSI_OPCODE_UMUL_HI:
    case TGSI_OPCODE_OR:
-   case TGSI_OPCODE_POW:
    case TGSI_OPCODE_SHL:
    case TGSI_OPCODE_ISHR:
    case TGSI_OPCODE_USHR:
@@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
          mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
       break;
+   case TGSI_OPCODE_POW:
+      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
+      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
+         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
+      break;
    case TGSI_OPCODE_EX2:
    case TGSI_OPCODE_LG2:
       val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0);
-- 
1.8.5.5

[PATCH 05/12] nv50/ir/opt: fix constant folding with saturate modifier

[Ilia Mirkin]

From: Christoph Bumiller <e0425955@student.tuwien.ac.at>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index e6f8f69..1a2c2e6 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -561,7 +561,7 @@ ConstantFolding::expr(Instruction *i,
       if (i->src(0).getImmediate(src0))
          expr(i, src0, *i->getSrc(1)->asImm());
    } else {
-      i->op = OP_MOV;
+      i->op = i->saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
    }
 }
 
@@ -612,6 +612,7 @@ ConstantFolding::unary(Instruction *i, const ImmediateValue &imm)
    switch (i->op) {
    case OP_NEG: res.data.f32 = -imm.reg.data.f32; break;
    case OP_ABS: res.data.f32 = fabsf(imm.reg.data.f32); break;
+   case OP_SAT: res.data.f32 = CLAMP(imm.reg.data.f32, 0.0f, 1.0f); break;
    case OP_RCP: res.data.f32 = 1.0f / imm.reg.data.f32; break;
    case OP_RSQ: res.data.f32 = 1.0f / sqrtf(imm.reg.data.f32); break;
    case OP_LG2: res.data.f32 = log2f(imm.reg.data.f32); break;
@@ -922,6 +923,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
 
    case OP_ABS:
    case OP_NEG:
+   case OP_SAT:
    case OP_LG2:
    case OP_RCP:
    case OP_SQRT:
-- 
1.8.5.5

[PATCH 06/12] nv50/ir: fix lowering of predicated instructions (without defs)

[Ilia Mirkin]

From: Christoph Bumiller <e0425955-oe7qfRrRQffzPE21tAIdciO7C/xPubJB@public.gmane.org>

Note that predicated instructions with defs are still not supported
because transformation to SSA doesn't handle them yet.

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 0fb7666..ed06def 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -1279,8 +1279,11 @@ NV50LoweringPreSSA::checkPredicate(Instruction *insn)
    Value *pred = insn->getPredicate();
    Value *cdst;
 
-   if (!pred || pred->reg.file == FILE_FLAGS)
+   // FILE_PREDICATE will simply be changed to FLAGS on conversion to SSA
+   if (!pred ||
+       pred->reg.file == FILE_FLAGS || pred->reg.file == FILE_PREDICATE)
       return;
+
    cdst = bld.getSSA(1, FILE_FLAGS);
 
    bld.mkCmp(OP_SET, CC_NEU, insn->dType, cdst, insn->dType, bld.loadImm(NULL, 0), pred);
-- 
1.8.5.5

[PATCH 07/12] nv50/ir/tgsi: optimize KIL

[Ilia Mirkin]

From: Christoph Bumiller <e0425955@student.tuwien.ac.at>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index e24be51..a0f1fe1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -2457,7 +2457,12 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
       break;
    case TGSI_OPCODE_KILL_IF:
       val0 = new_LValue(func, FILE_PREDICATE);
+      mask = 0;
       for (c = 0; c < 4; ++c) {
+         const int s = tgsi.getSrc(0).getSwizzle(c);
+         if (mask & (1 << s))
+            continue;
+         mask |= 1 << s;
          mkCmp(OP_SET, CC_LT, TYPE_F32, val0, TYPE_F32, fetchSrc(0, c), zero);
          mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0);
       }
-- 
1.8.5.5

[PATCH 08/12] nv50,nvc0: handle guard band defines

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

[imirkin: moved default case out of switch]
Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
---
 src/gallium/drivers/nouveau/nv50/nv50_screen.c | 10 ++++++++--
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 10 ++++++++--
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 68d30ea..36a4ad1 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -286,10 +286,16 @@ nv50_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
       return 16.0f;
    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
       return 4.0f;
-   default:
-      NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
+   case PIPE_CAPF_GUARD_BAND_LEFT:
+   case PIPE_CAPF_GUARD_BAND_TOP:
       return 0.0f;
+   case PIPE_CAPF_GUARD_BAND_RIGHT:
+   case PIPE_CAPF_GUARD_BAND_BOTTOM:
+      return 0.0f; /* that or infinity */
    }
+
+   NOUVEAU_ERR("unknown PIPE_CAPF %d\n", param);
+   return 0.0f;
 }
 
 static void
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index cccfe2b..9f89f31 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -294,10 +294,16 @@ nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
       return 16.0f;
    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
       return 15.0f;
-   default:
-      NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
+   case PIPE_CAPF_GUARD_BAND_LEFT:
+   case PIPE_CAPF_GUARD_BAND_TOP:
       return 0.0f;
+   case PIPE_CAPF_GUARD_BAND_RIGHT:
+   case PIPE_CAPF_GUARD_BAND_BOTTOM:
+      return 0.0f; /* that or infinity */
    }
+
+   NOUVEAU_ERR("unknown PIPE_CAPF %d\n", param);
+   return 0.0f;
 }
 
 static int
-- 
1.8.5.5

[PATCH 09/12] nv50, nvc0: allow 15, 16, 30 bpp display formats

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
---
 src/gallium/drivers/nouveau/nv50/nv50_formats.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_formats.c b/src/gallium/drivers/nouveau/nv50/nv50_formats.c
index 3af34c1..ff33654 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_formats.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_formats.c
@@ -194,9 +194,9 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
    SXB(S8X24_UINT, C0, S8_Z24, T),
    SXB(X32_S8X24_UINT, C1, Z32_S8_X24, T),
 
-   F3B(B5G6R5_UNORM, B5G6R5_UNORM, C2, C1, C0, xx, UNORM, 5_6_5, T),
-   C4B(B5G5R5A1_UNORM, BGR5_A1_UNORM, C2, C1, C0, C3, UNORM, 5_5_5_1, TB),
-   F3B(B5G5R5X1_UNORM, BGR5_X1_UNORM, C2, C1, C0, xx, UNORM, 5_5_5_1, TB),
+   F3B(B5G6R5_UNORM, B5G6R5_UNORM, C2, C1, C0, xx, UNORM, 5_6_5, TD),
+   C4B(B5G5R5A1_UNORM, BGR5_A1_UNORM, C2, C1, C0, C3, UNORM, 5_5_5_1, TD),
+   F3B(B5G5R5X1_UNORM, BGR5_X1_UNORM, C2, C1, C0, xx, UNORM, 5_5_5_1, TD),
    C4B(B4G4R4A4_UNORM, NONE, C2, C1, C0, C3, UNORM, 4_4_4_4, T),
    F3B(B4G4R4X4_UNORM, NONE, C2, C1, C0, xx, UNORM, 4_4_4_4, T),
    F3B(R9G9B9E5_FLOAT, NONE, C0, C1, C2, xx, FLOAT, 9_9_9_E5, T),
@@ -204,7 +204,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
    C4A(R10G10B10A2_UNORM, RGB10_A2_UNORM, C0, C1, C2, C3, UNORM, 10_10_10_2,
        IBV, 0),
    C4A(B10G10R10A2_UNORM, BGR10_A2_UNORM, C2, C1, C0, C3, UNORM, 10_10_10_2,
-       TBV, 1),
+       TDV, 1),
    C4A(R10G10B10A2_SNORM, NONE, C0, C1, C2, C3, SNORM, 10_10_10_2, TV, 0),
    C4A(B10G10R10A2_SNORM, NONE, C2, C1, C0, C3, SNORM, 10_10_10_2, TV, 1),
    C4A(R10G10B10A2_UINT, RGB10_A2_UINT, C0, C1, C2, C3, UINT, 10_10_10_2, TRV, 0),
-- 
1.8.5.5

[PATCH 10/12] nvc0: use PRIxPTR for sizeof()

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
---
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 1d59fc4..8724cc5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -512,7 +512,7 @@ nvc0_program_dump(struct nvc0_program *prog)
 
    if (prog->type != PIPE_SHADER_COMPUTE) {
       for (pos = 0; pos < sizeof(prog->hdr) / sizeof(prog->hdr[0]); ++pos)
-         debug_printf("HDR[%02lx] = 0x%08x\n",
+         debug_printf("HDR[%02"PRIxPTR"] = 0x%08x\n",
                       pos * sizeof(prog->hdr[0]), prog->hdr[pos]);
    }
    debug_printf("shader binary code (0x%x bytes):", prog->code_size);
-- 
1.8.5.5

[PATCH 11/12] nvc0: assert that we have vertex elements state

[Ilia Mirkin]

From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>

Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
---
 src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
index c58d6da..83d406d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
@@ -423,6 +423,7 @@ nvc0_vertex_arrays_validate(struct nvc0_context *nvc0)
 
    nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_VTX);
 
+   assert(vertex);
    if (unlikely(vertex->need_conversion) ||
        unlikely(nvc0->vertprog->vp.edgeflag < PIPE_MAX_ATTRIBS)) {
       vbo_mode = 3;
-- 
1.8.5.5

[PATCH 12/12] nv50: count wrapped textures towards the tex_obj count

[Ilia Mirkin]

From: Joakim Sindholt <opensource@zhasha.com>

But don't count their size towards the allocated memory, since that
belongs to whoever created it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
---
 src/gallium/drivers/nouveau/nv50/nv50_miptree.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
index 513d8f9..4c55179 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
@@ -404,6 +404,8 @@ nv50_miptree_from_handle(struct pipe_screen *pscreen,
    mt->level[0].offset = 0;
    mt->level[0].tile_mode = mt->base.bo->config.nv50.tile_mode;
 
+   NOUVEAU_DRV_STAT(nouveau_screen(pscreen), tex_obj_current_count, 1);
+
    /* no need to adjust bo reference count */
    return &mt->base.base;
 }
-- 
1.8.5.5

Re: [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Emil Velikov]

On 21/05/14 00:39, Ilia Mirkin wrote:
> From: Christoph Bumiller <christoph.bumiller@speed.at>
> 
> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
> Cc: "10.2" <mesa-stable@lists.freedesktop.org>
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> index 3e44bf9..e24be51 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>     case TGSI_OPCODE_IMUL_HI:
>     case TGSI_OPCODE_UMUL_HI:
>     case TGSI_OPCODE_OR:
> -   case TGSI_OPCODE_POW:
>     case TGSI_OPCODE_SHL:
>     case TGSI_OPCODE_ISHR:
>     case TGSI_OPCODE_USHR:
> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>        FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>           mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>        break;
> +   case TGSI_OPCODE_POW:
> +      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
> +      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
> +         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
> +      break;
Can you use mkMov ? Pretty please :)

-Emil
>     case TGSI_OPCODE_EX2:
>     case TGSI_OPCODE_LG2:
>        val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0);
> 

Re: [Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Ilia Mirkin]

On Wed, May 21, 2014 at 2:51 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On 21/05/14 00:39, Ilia Mirkin wrote:
>> From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>
>>
>> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
>> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>> ---
>>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>> index 3e44bf9..e24be51 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>> @@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>     case TGSI_OPCODE_IMUL_HI:
>>     case TGSI_OPCODE_UMUL_HI:
>>     case TGSI_OPCODE_OR:
>> -   case TGSI_OPCODE_POW:
>>     case TGSI_OPCODE_SHL:
>>     case TGSI_OPCODE_ISHR:
>>     case TGSI_OPCODE_USHR:
>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>        FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>           mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>        break;
>> +   case TGSI_OPCODE_POW:
>> +      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
>> +      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>> +         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
>> +      break;
> Can you use mkMov ? Pretty please :)

The two are used fairly interchangeably, and a lot of the surrounding
code uses this style (as you can see in the context lines). I'd rather
keep it as-is.

  -ilia

Re: [Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil

[Emil Velikov]

On 21/05/14 00:39, Ilia Mirkin wrote:
> From: Christoph Bumiller <e0425955-oe7qfRrRQffzPE21tAIdciO7C/xPubJB@public.gmane.org>
> 
> [imirkin: add logic to also clear the "regular" scissors]
Can you please share why are you've added the "regular" scissors ?
Does it matter if we set the screen scissors before the render target params?

Thanks
Emil

> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
> ---
>  src/gallium/drivers/nouveau/nv50/nv50_surface.c | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> index 1f37527..6e68fb8 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>  
>     PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>  
> +   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
> +   PUSH_DATA (push, ( width << 16) | dstx);
> +   PUSH_DATA (push, (height << 16) | dsty);
> +   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
> +   PUSH_DATA (push, 8192 << 16);
> +   PUSH_DATA (push, 8192 << 16);
> +   nv50->scissors_dirty |= 1;
> +
>     BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
>     PUSH_DATA (push, 1);
>     BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
> @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe,
>                   (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
>     }
>  
> -   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
> +   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
>  }
>  
>  static void
> @@ -364,6 +372,14 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
>  
>     PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>  
> +   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
> +   PUSH_DATA (push, ( width << 16) | dstx);
> +   PUSH_DATA (push, (height << 16) | dsty);
> +   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
> +   PUSH_DATA (push, 8192 << 16);
> +   PUSH_DATA (push, 8192 << 16);
> +   nv50->scissors_dirty |= 1;
> +
>     BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
>     PUSH_DATAh(push, bo->offset + sf->offset);
>     PUSH_DATA (push, bo->offset + sf->offset);
> @@ -390,7 +406,7 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
>                   (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
>     }
>  
> -   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
> +   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
>  }
>  
>  void
> 

Re: [Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil

[Ilia Mirkin]

On Wed, May 21, 2014 at 2:57 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On 21/05/14 00:39, Ilia Mirkin wrote:
>> From: Christoph Bumiller <e0425955-oe7qfRrRQffzPE21tAIdciO7C/xPubJB@public.gmane.org>
>>
>> [imirkin: add logic to also clear the "regular" scissors]
> Can you please share why are you've added the "regular" scissors ?

Because I had to when I was implementing the clear_texture and
clear_buffer hooks (clear_texture didn't end up making it in quite yet
because I suck at writing piglit tests, but clear_buffer is there
now). Basically if scissors are set, they will apply to the clear,
which is not what we want.

> Does it matter if we set the screen scissors before the render target params?

AFAIK, with the exception of a few "go" methods, you can pretty much
randomize the order in which you set all parameters.

>
> Thanks
> Emil
>
>> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
>> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>> ---
>>  src/gallium/drivers/nouveau/nv50/nv50_surface.c | 20 ++++++++++++++++++--
>>  1 file changed, 18 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> index 1f37527..6e68fb8 100644
>> --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>>
>>     PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>>
>> +   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
>> +   PUSH_DATA (push, ( width << 16) | dstx);
>> +   PUSH_DATA (push, (height << 16) | dsty);
>> +   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
>> +   PUSH_DATA (push, 8192 << 16);
>> +   PUSH_DATA (push, 8192 << 16);
>> +   nv50->scissors_dirty |= 1;
>> +
>>     BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
>>     PUSH_DATA (push, 1);
>>     BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
>> @@ -325,7 +333,7 @@ nv50_clear_render_target(struct pipe_context *pipe,
>>                   (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
>>     }
>>
>> -   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
>> +   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
>>  }
>>
>>  static void
>> @@ -364,6 +372,14 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
>>
>>     PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>>
>> +   BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
>> +   PUSH_DATA (push, ( width << 16) | dstx);
>> +   PUSH_DATA (push, (height << 16) | dsty);
>> +   BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
>> +   PUSH_DATA (push, 8192 << 16);
>> +   PUSH_DATA (push, 8192 << 16);
>> +   nv50->scissors_dirty |= 1;
>> +
>>     BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
>>     PUSH_DATAh(push, bo->offset + sf->offset);
>>     PUSH_DATA (push, bo->offset + sf->offset);
>> @@ -390,7 +406,7 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
>>                   (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT));
>>     }
>>
>> -   nv50->dirty |= NV50_NEW_FRAMEBUFFER;
>> +   nv50->dirty |= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR;
>>  }
>>
>>  void
>>
>

Re: [Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Emil Velikov]

On 21/05/14 19:53, Ilia Mirkin wrote:
> On Wed, May 21, 2014 at 2:51 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> On 21/05/14 00:39, Ilia Mirkin wrote:
>>> From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>
>>>
>>> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
>>> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>>> ---
>>>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>> index 3e44bf9..e24be51 100644
>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>> @@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>     case TGSI_OPCODE_IMUL_HI:
>>>     case TGSI_OPCODE_UMUL_HI:
>>>     case TGSI_OPCODE_OR:
>>> -   case TGSI_OPCODE_POW:
>>>     case TGSI_OPCODE_SHL:
>>>     case TGSI_OPCODE_ISHR:
>>>     case TGSI_OPCODE_USHR:
>>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>        FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>           mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>>        break;
>>> +   case TGSI_OPCODE_POW:
>>> +      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
>>> +      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>> +         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
>>> +      break;
>> Can you use mkMov ? Pretty please :)
> 
> The two are used fairly interchangeably, and a lot of the surrounding
> code uses this style (as you can see in the context lines). I'd rather
> keep it as-is.
> 
IMHO using mkMov makes the code easier to read for noobs like me. There are
only two cases of mkOp1(OP_MOV) and more than a dozen mkMov's. Either way it's
up-to you.

-Emil

>   -ilia
> 

Re: [Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Ilia Mirkin]

On Wed, May 21, 2014 at 3:01 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On 21/05/14 19:53, Ilia Mirkin wrote:
>> On Wed, May 21, 2014 at 2:51 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>> On 21/05/14 00:39, Ilia Mirkin wrote:
>>>> From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>
>>>>
>>>> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
>>>> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>>>> ---
>>>>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>> index 3e44bf9..e24be51 100644
>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>> @@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>>     case TGSI_OPCODE_IMUL_HI:
>>>>     case TGSI_OPCODE_UMUL_HI:
>>>>     case TGSI_OPCODE_OR:
>>>> -   case TGSI_OPCODE_POW:
>>>>     case TGSI_OPCODE_SHL:
>>>>     case TGSI_OPCODE_ISHR:
>>>>     case TGSI_OPCODE_USHR:
>>>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>>        FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>>           mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>>>        break;
>>>> +   case TGSI_OPCODE_POW:
>>>> +      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
>>>> +      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>> +         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
>>>> +      break;
>>> Can you use mkMov ? Pretty please :)
>>
>> The two are used fairly interchangeably, and a lot of the surrounding
>> code uses this style (as you can see in the context lines). I'd rather
>> keep it as-is.
>>
> IMHO using mkMov makes the code easier to read for noobs like me. There are
> only two cases of mkOp1(OP_MOV) and more than a dozen mkMov's. Either way it's
> up-to you.

OK -- if you'd like, you can send a patch to convert all of them over
to mkMov. (Personally, I actually have a mild preference towards
nuking it since it implies that mov is somehow special compared to
other ops, and it isn't.)

Re: [Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result

[Ilia Mirkin]

On Wed, May 21, 2014 at 3:03 PM, Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org> wrote:
> On Wed, May 21, 2014 at 3:01 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> On 21/05/14 19:53, Ilia Mirkin wrote:
>>> On Wed, May 21, 2014 at 2:51 PM, Emil Velikov <emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>>> On 21/05/14 00:39, Ilia Mirkin wrote:
>>>>> From: Christoph Bumiller <christoph.bumiller-D4IDLmZPRBc@public.gmane.org>
>>>>>
>>>>> Reviewed-by: Ilia Mirkin <imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
>>>>> Cc: "10.2" <mesa-stable-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>>>>> ---
>>>>>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 6 +++++-
>>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>>> index 3e44bf9..e24be51 100644
>>>>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
>>>>> @@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>>>     case TGSI_OPCODE_IMUL_HI:
>>>>>     case TGSI_OPCODE_UMUL_HI:
>>>>>     case TGSI_OPCODE_OR:
>>>>> -   case TGSI_OPCODE_POW:
>>>>>     case TGSI_OPCODE_SHL:
>>>>>     case TGSI_OPCODE_ISHR:
>>>>>     case TGSI_OPCODE_USHR:
>>>>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>>>        FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>>>           mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>>>>        break;
>>>>> +   case TGSI_OPCODE_POW:
>>>>> +      val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSrc(0, 0), fetchSrc(1, 0));
>>>>> +      FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>>> +         mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
>>>>> +      break;
>>>> Can you use mkMov ? Pretty please :)
>>>
>>> The two are used fairly interchangeably, and a lot of the surrounding
>>> code uses this style (as you can see in the context lines). I'd rather
>>> keep it as-is.
>>>
>> IMHO using mkMov makes the code easier to read for noobs like me. There are
>> only two cases of mkOp1(OP_MOV) and more than a dozen mkMov's. Either way it's
>> up-to you.
>
> OK -- if you'd like, you can send a patch to convert all of them over
> to mkMov. (Personally, I actually have a mild preference towards
> nuking it since it implies that mov is somehow special compared to
> other ops, and it isn't.)

Oh, and for situations like this, mkMov(a, b) would actually be wrong.
You'd need to use mkMov(a, b, TYPE_F32).

   Instruction *mkMov(Value *, Value *, DataType = TYPE_U32);

Fun, eh?

Re: [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil

[Emil Velikov]

On 21/05/14 19:59, Ilia Mirkin wrote:
> On Wed, May 21, 2014 at 2:57 PM, Emil Velikov <emil.l.velikov@gmail.com> wrote:
>> On 21/05/14 00:39, Ilia Mirkin wrote:
>>> From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
>>>
>>> [imirkin: add logic to also clear the "regular" scissors]
>> Can you please share why are you've added the "regular" scissors ?
> 
> Because I had to when I was implementing the clear_texture and
> clear_buffer hooks (clear_texture didn't end up making it in quite yet
> because I suck at writing piglit tests, but clear_buffer is there
> now). Basically if scissors are set, they will apply to the clear,
> which is not what we want.
> 
>> Does it matter if we set the screen scissors before the render target params?
> 
> AFAIK, with the exception of a few "go" methods, you can pretty much
> randomize the order in which you set all parameters.
> 

Great, thank you.