From: Paolo Bonzini <pbonzini@redhat.com>
To: "Chen, Tiejun" <tiejun.chen@intel.com>,
daniel.vetter@ffwll.ch, jani.nikula@linux.intel.com,
airlied@linux.ie
Cc: intel-gfx@lists.freedesktop.org, xen-devel@lists.xensource.com,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
qemu-devel@nongnu.org
Subject: Re: [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type
Date: Mon, 30 Jun 2014 12:56:16 +0200 [thread overview]
Message-ID: <53B14250.2080509@redhat.com> (raw)
In-Reply-To: <53B0D5EB.70103@intel.com>
Il 30/06/2014 05:13, Chen, Tiejun ha scritto:
> After I discuss internal, we think even we just set the real
> vendor/device ids to this ISA bridge at 00:1f.0, guest firmware should
> still work well with these pair of real vendor/device ids.
>
> So if you think something would conflict or be broken, could you tell us
> what's exactly that? Then we will double check.
The Xen hvmloader doesn't break since it only supports one chipset. But
SeaBIOS checks for the exact vendor/device ids since Q35 support was added.
If you want to add this feature, try to implement it in a way that is a
bit more forward-looking. I'm sure that Xen sooner or later will want a
PCIe chipset, otherwise things such as AER forwarding are impossible.
Paolo
WARNING: multiple messages have this Message-ID (diff)
From: Paolo Bonzini <pbonzini@redhat.com>
To: "Chen, Tiejun" <tiejun.chen@intel.com>,
daniel.vetter@ffwll.ch, jani.nikula@linux.intel.com,
airlied@linux.ie
Cc: intel-gfx@lists.freedesktop.org, xen-devel@lists.xensource.com,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type
Date: Mon, 30 Jun 2014 12:56:16 +0200 [thread overview]
Message-ID: <53B14250.2080509@redhat.com> (raw)
In-Reply-To: <53B0D5EB.70103@intel.com>
Il 30/06/2014 05:13, Chen, Tiejun ha scritto:
> After I discuss internal, we think even we just set the real
> vendor/device ids to this ISA bridge at 00:1f.0, guest firmware should
> still work well with these pair of real vendor/device ids.
>
> So if you think something would conflict or be broken, could you tell us
> what's exactly that? Then we will double check.
The Xen hvmloader doesn't break since it only supports one chipset. But
SeaBIOS checks for the exact vendor/device ids since Q35 support was added.
If you want to add this feature, try to implement it in a way that is a
bit more forward-looking. I'm sure that Xen sooner or later will want a
PCIe chipset, otherwise things such as AER forwarding are impossible.
Paolo
next prev parent reply other threads:[~2014-06-30 10:56 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-19 9:53 [RFC][PATCH] gpu:drm:i915:intel_detect_pch: back to check devfn instead of check class type Tiejun Chen
2014-06-19 9:53 ` [Qemu-devel] " Tiejun Chen
2014-06-19 9:53 ` Tiejun Chen
2014-06-20 9:40 ` Chen, Tiejun
2014-06-20 9:40 ` [Qemu-devel] " Chen, Tiejun
2014-06-20 9:40 ` Chen, Tiejun
2014-06-20 12:32 ` Daniel Vetter
2014-06-20 12:32 ` [Qemu-devel] " Daniel Vetter
2014-06-20 12:32 ` Daniel Vetter
2014-06-22 8:00 ` Chen, Tiejun
2014-06-22 8:00 ` [Qemu-devel] " Chen, Tiejun
2014-06-22 8:00 ` Chen, Tiejun
2014-06-20 12:48 ` Paolo Bonzini
2014-06-20 12:48 ` [Qemu-devel] " Paolo Bonzini
2014-06-22 8:25 ` Chen, Tiejun
2014-06-22 8:25 ` [Qemu-devel] " Chen, Tiejun
2014-06-25 6:48 ` Paolo Bonzini
2014-06-25 6:48 ` [Qemu-devel] " Paolo Bonzini
2014-06-25 7:34 ` Chen, Tiejun
2014-06-25 7:34 ` [Qemu-devel] " Chen, Tiejun
2014-06-25 7:55 ` Paolo Bonzini
2014-06-25 7:55 ` [Qemu-devel] " Paolo Bonzini
2014-06-30 3:13 ` Chen, Tiejun
2014-06-30 3:13 ` [Qemu-devel] " Chen, Tiejun
2014-06-30 10:56 ` Paolo Bonzini [this message]
2014-06-30 10:56 ` Paolo Bonzini
2014-07-07 14:49 ` Daniel Vetter
2014-07-07 14:49 ` [Qemu-devel] " Daniel Vetter
2014-07-07 14:49 ` Daniel Vetter
2014-07-07 14:57 ` Paolo Bonzini
2014-07-07 14:57 ` [Qemu-devel] " Paolo Bonzini
2014-07-07 17:54 ` [Intel-gfx] " Daniel Vetter
2014-07-07 17:54 ` [Qemu-devel] " Daniel Vetter
2014-07-07 17:54 ` Daniel Vetter
2014-07-07 17:58 ` Paolo Bonzini
2014-07-07 17:58 ` [Qemu-devel] " Paolo Bonzini
2014-07-07 18:40 ` Daniel Vetter
2014-07-07 18:40 ` [Qemu-devel] [Intel-gfx] " Daniel Vetter
2014-07-07 18:40 ` Daniel Vetter
2014-07-10 21:08 ` Tian, Kevin
2014-07-10 21:08 ` [Qemu-devel] [Intel-gfx] " Tian, Kevin
2014-07-10 21:08 ` Tian, Kevin
2014-07-11 6:29 ` Daniel Vetter
2014-07-11 6:29 ` [Qemu-devel] " Daniel Vetter
2014-07-11 6:29 ` Daniel Vetter
2014-07-11 19:42 ` [Xen-devel] " Konrad Rzeszutek Wilk
2014-07-11 19:42 ` [Qemu-devel] [Xen-devel] [Intel-gfx] " Konrad Rzeszutek Wilk
2014-07-11 19:42 ` Konrad Rzeszutek Wilk
2014-07-11 20:30 ` [Xen-devel] " Tian, Kevin
2014-07-11 20:30 ` [Qemu-devel] [Xen-devel] [Intel-gfx] " Tian, Kevin
2014-07-11 20:30 ` Tian, Kevin
2014-07-12 10:13 ` [Xen-devel] " Daniel Vetter
2014-07-12 10:13 ` [Qemu-devel] [Intel-gfx] " Daniel Vetter
2014-07-12 10:13 ` Daniel Vetter
2014-06-24 2:59 ` Zhenyu Wang
2014-06-24 2:59 ` [Qemu-devel] [Intel-gfx] " Zhenyu Wang
2014-06-24 2:59 ` Zhenyu Wang
2014-06-25 2:28 ` Chen, Tiejun
2014-06-25 2:28 ` [Qemu-devel] [Intel-gfx] " Chen, Tiejun
2014-06-25 2:28 ` Chen, Tiejun
2014-07-07 14:51 ` Daniel Vetter
2014-07-07 14:51 ` [Qemu-devel] " Daniel Vetter
2014-07-07 14:51 ` Daniel Vetter
2014-06-30 11:18 ` Michael S. Tsirkin
2014-06-30 11:18 ` [Qemu-devel] " Michael S. Tsirkin
2014-06-30 11:18 ` Michael S. Tsirkin
2014-07-01 1:52 ` Chen, Tiejun
2014-07-01 1:52 ` [Qemu-devel] " Chen, Tiejun
2014-07-01 1:52 ` Chen, Tiejun
2014-07-02 6:21 ` Michael S. Tsirkin
2014-07-02 6:21 ` [Qemu-devel] " Michael S. Tsirkin
2014-07-02 6:21 ` Michael S. Tsirkin
2014-07-02 8:27 ` Chen, Tiejun
2014-07-02 8:27 ` [Qemu-devel] " Chen, Tiejun
2014-07-02 8:27 ` Chen, Tiejun
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