From: k.khlebnikov@samsung.com (Konstantin Khlebnikov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1
Date: Thu, 28 Aug 2014 15:50:56 +0400 [thread overview]
Message-ID: <53FF17A0.1030100@samsung.com> (raw)
In-Reply-To: <20140828110300.GJ22580@arm.com>
On 2014-08-28 15:03, Will Deacon wrote:
> On Wed, Aug 27, 2014 at 04:45:24PM +0100, Jassi Brar wrote:
>> On Wed, Aug 27, 2014 at 9:01 PM, Konstantin Khlebnikov <koct9i@gmail.com> wrote:
>>> On Wed, Aug 27, 2014 at 7:26 PM, Jassi Brar <jassisinghbrar@gmail.com> wrote:
>>>> It seems the patch wasn't tested on any real platform, I did on my
>>>> CA15 based platform - it breaks boot. Simply reverting the patch gets
>>>> it going again. I am happy to try any fix.
>>>>
>>> Please try to remove adcls line.
>>> Seems like this affects only systems where PHYS_OFFSET == PAGE_OFFSET.
>>>
>>> --- a/arch/arm/mm/proc-v7-3level.S
>>> +++ b/arch/arm/mm/proc-v7-3level.S
>>> @@ -146,7 +146,6 @@ ENDPROC(cpu_v7_set_pte_ext)
>>> mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
>>> mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
>>> addls \ttbr1, \ttbr1, #TTBR1_OFFSET
>>> - adcls \tmp, \tmp, #0
>>> mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
>>> mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
>>> mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
>>>
>> Yup, restores boot.
> Can somebody write this up as a proper patch and put it in the patch system
> please?
Ok. Done.
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8132/1
>
> Will
>
-------------- next part --------------
ARM: LPAE: drop wrong carry flag correction after adding TTBR1_OFFSET
From: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
In commit 7fb00c2fca4b6c58be521eb3676cf4b4ba8dde3b ("ARM: 8114/1: LPAE:
load upper bits of early TTBR0/TTBR1") part which fixes carrying in adding
TTBR1_OFFSET to TTRR1 was wrong:
addls \ttbr1, \ttbr1, #TTBR1_OFFSET
adcls \tmp, \tmp, #0
addls doesn't update flags, adcls adds carry from cmp above:
cmp \ttbr1, \tmp @ PHYS_OFFSET > PAGE_OFFSET?
Condition 'ls' means carry flag is clear or zero flag is set, thus only one
case is affected: when PHYS_OFFSET == PAGE_OFFSET.
It seems safer to remove this fixup. Bug is here for ages and nobody
complained. Let's fix it separately.
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Reported-and-tested-by: Jassi Brar <jassisinghbrar@gmail.com>
---
arch/arm/mm/proc-v7-3level.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 1a24e92..b64e67c 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -146,7 +146,6 @@ ENDPROC(cpu_v7_set_pte_ext)
mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
addls \ttbr1, \ttbr1, #TTBR1_OFFSET
- adcls \tmp, \tmp, #0
mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
WARNING: multiple messages have this Message-ID (diff)
From: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
To: Will Deacon <will.deacon@arm.com>, Jassi Brar <jassisinghbrar@gmail.com>
Cc: Konstantin Khlebnikov <koct9i@gmail.com>,
Russell King <linux@arm.linux.org.uk>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Vitaly Andrianov <vitalya@ti.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1
Date: Thu, 28 Aug 2014 15:50:56 +0400 [thread overview]
Message-ID: <53FF17A0.1030100@samsung.com> (raw)
In-Reply-To: <20140828110300.GJ22580@arm.com>
[-- Attachment #1: Type: text/plain, Size: 1421 bytes --]
On 2014-08-28 15:03, Will Deacon wrote:
> On Wed, Aug 27, 2014 at 04:45:24PM +0100, Jassi Brar wrote:
>> On Wed, Aug 27, 2014 at 9:01 PM, Konstantin Khlebnikov <koct9i@gmail.com> wrote:
>>> On Wed, Aug 27, 2014 at 7:26 PM, Jassi Brar <jassisinghbrar@gmail.com> wrote:
>>>> It seems the patch wasn't tested on any real platform, I did on my
>>>> CA15 based platform - it breaks boot. Simply reverting the patch gets
>>>> it going again. I am happy to try any fix.
>>>>
>>> Please try to remove adcls line.
>>> Seems like this affects only systems where PHYS_OFFSET == PAGE_OFFSET.
>>>
>>> --- a/arch/arm/mm/proc-v7-3level.S
>>> +++ b/arch/arm/mm/proc-v7-3level.S
>>> @@ -146,7 +146,6 @@ ENDPROC(cpu_v7_set_pte_ext)
>>> mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
>>> mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
>>> addls \ttbr1, \ttbr1, #TTBR1_OFFSET
>>> - adcls \tmp, \tmp, #0
>>> mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
>>> mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
>>> mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
>>>
>> Yup, restores boot.
> Can somebody write this up as a proper patch and put it in the patch system
> please?
Ok. Done.
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8132/1
>
> Will
>
[-- Attachment #2: arm-lpae-remove-carry-flag-correction-after-adding-ttbr1_offset --]
[-- Type: text/plain, Size: 1481 bytes --]
ARM: LPAE: drop wrong carry flag correction after adding TTBR1_OFFSET
From: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
In commit 7fb00c2fca4b6c58be521eb3676cf4b4ba8dde3b ("ARM: 8114/1: LPAE:
load upper bits of early TTBR0/TTBR1") part which fixes carrying in adding
TTBR1_OFFSET to TTRR1 was wrong:
addls \ttbr1, \ttbr1, #TTBR1_OFFSET
adcls \tmp, \tmp, #0
addls doesn't update flags, adcls adds carry from cmp above:
cmp \ttbr1, \tmp @ PHYS_OFFSET > PAGE_OFFSET?
Condition 'ls' means carry flag is clear or zero flag is set, thus only one
case is affected: when PHYS_OFFSET == PAGE_OFFSET.
It seems safer to remove this fixup. Bug is here for ages and nobody
complained. Let's fix it separately.
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Reported-and-tested-by: Jassi Brar <jassisinghbrar@gmail.com>
---
arch/arm/mm/proc-v7-3level.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 1a24e92..b64e67c 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -146,7 +146,6 @@ ENDPROC(cpu_v7_set_pte_ext)
mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits
addls \ttbr1, \ttbr1, #TTBR1_OFFSET
- adcls \tmp, \tmp, #0
mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits
mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits
next prev parent reply other threads:[~2014-08-28 11:50 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-22 15:36 [PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1 Konstantin Khlebnikov
2014-07-22 15:36 ` Konstantin Khlebnikov
2014-07-22 15:36 ` [PATCH 2/2] ARM: LPAE: reduce damage caused by idmap to virtual memory layout Konstantin Khlebnikov
2014-07-22 15:36 ` Konstantin Khlebnikov
2014-07-28 18:14 ` Will Deacon
2014-07-28 18:14 ` Will Deacon
2014-07-28 18:25 ` Konstantin Khlebnikov
2014-07-28 18:25 ` Konstantin Khlebnikov
2014-07-28 18:41 ` Will Deacon
2014-07-28 18:41 ` Will Deacon
2014-07-28 18:57 ` Konstantin Khlebnikov
2014-07-28 18:57 ` Konstantin Khlebnikov
2014-07-28 19:06 ` Will Deacon
2014-07-28 19:06 ` Will Deacon
2014-07-28 19:13 ` Russell King - ARM Linux
2014-07-28 19:13 ` Russell King - ARM Linux
2014-07-28 19:29 ` Konstantin Khlebnikov
2014-07-28 19:29 ` Konstantin Khlebnikov
2014-07-28 19:34 ` Konstantin Khlebnikov
2014-07-28 19:34 ` Konstantin Khlebnikov
2014-07-28 19:42 ` Russell King - ARM Linux
2014-07-28 19:42 ` Russell King - ARM Linux
2014-07-28 19:57 ` Konstantin Khlebnikov
2014-07-28 19:57 ` Konstantin Khlebnikov
2014-07-29 10:57 ` Russell King - ARM Linux
2014-07-29 10:57 ` Russell King - ARM Linux
2014-07-29 12:37 ` Konstantin Khlebnikov
2014-07-29 12:37 ` Konstantin Khlebnikov
2014-07-28 18:12 ` [PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1 Will Deacon
2014-07-28 18:12 ` Will Deacon
2014-07-28 18:40 ` Konstantin Khlebnikov
2014-07-28 18:40 ` Konstantin Khlebnikov
2014-07-28 18:47 ` Will Deacon
2014-07-28 18:47 ` Will Deacon
2014-07-29 11:15 ` Will Deacon
2014-07-29 11:15 ` Will Deacon
2014-07-29 12:29 ` Konstantin Khlebnikov
2014-07-29 12:29 ` Konstantin Khlebnikov
2014-08-27 15:26 ` Jassi Brar
2014-08-27 15:26 ` Jassi Brar
2014-08-27 15:31 ` Konstantin Khlebnikov
2014-08-27 15:31 ` Konstantin Khlebnikov
2014-08-27 15:33 ` Konstantin Khlebnikov
2014-08-27 15:33 ` Konstantin Khlebnikov
2014-08-27 15:45 ` Jassi Brar
2014-08-27 15:45 ` Jassi Brar
2014-08-28 11:03 ` Will Deacon
2014-08-28 11:03 ` Will Deacon
2014-08-28 11:50 ` Konstantin Khlebnikov [this message]
2014-08-28 11:50 ` Konstantin Khlebnikov
2014-08-05 15:42 ` Konstantin Khlebnikov
2014-08-05 15:42 ` Konstantin Khlebnikov
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