From: Tomasz Figa <tomasz.figa@gmail.com>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Kukjin Kim <kgene.kim@samsung.com>,
lauraa@codeaurora.org, linux-omap@vger.kernel.org,
linus.walleij@linaro.org, santosh.shilimkar@ti.com,
tony@atomide.com, drake@endlessm.com,
Marek Szyprowski <m.szyprowski@samsung.com>,
loeliger@gmail.com
Subject: Re: [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume
Date: Mon, 15 Sep 2014 23:31:18 +0200 [thread overview]
Message-ID: <54175AA6.3050702@gmail.com> (raw)
In-Reply-To: <20140915090353.GD12379@n2100.arm.linux.org.uk>
On 15.09.2014 11:03, Russell King - ARM Linux wrote:
>> diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
>> index 554b350..71bcfbd 100644
>> --- a/arch/arm/mach-exynos/firmware.c
>> +++ b/arch/arm/mach-exynos/firmware.c
>> @@ -102,7 +102,9 @@ static int exynos_suspend(void)
>> writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
>> writel(virt_to_phys(exynos_cpu_resume_ns),
>> sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
>> -
>> +#ifdef CONFIG_CACHE_L2X0
>> + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
>> +#endif
>
> NAK. Please look at how arch/arm/mm/l2c-l2x0-resume.S gets the address
> of this structure in assembly code. The name of this variable is crap
> in any case. It's not the registers, it's the saved registers. So even
> more reason to kill this abomination, which incidentally, I've already
> killed off once before in the exynos code.
>
Right. The way l2c-l2x0-resume.S does this is much better. Somehow I
overlooked it when implementing this.
Best regards,
Tomasz
WARNING: multiple messages have this Message-ID (diff)
From: tomasz.figa@gmail.com (Tomasz Figa)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume
Date: Mon, 15 Sep 2014 23:31:18 +0200 [thread overview]
Message-ID: <54175AA6.3050702@gmail.com> (raw)
In-Reply-To: <20140915090353.GD12379@n2100.arm.linux.org.uk>
On 15.09.2014 11:03, Russell King - ARM Linux wrote:
>> diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
>> index 554b350..71bcfbd 100644
>> --- a/arch/arm/mach-exynos/firmware.c
>> +++ b/arch/arm/mach-exynos/firmware.c
>> @@ -102,7 +102,9 @@ static int exynos_suspend(void)
>> writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
>> writel(virt_to_phys(exynos_cpu_resume_ns),
>> sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
>> -
>> +#ifdef CONFIG_CACHE_L2X0
>> + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
>> +#endif
>
> NAK. Please look at how arch/arm/mm/l2c-l2x0-resume.S gets the address
> of this structure in assembly code. The name of this variable is crap
> in any case. It's not the registers, it's the saved registers. So even
> more reason to kill this abomination, which incidentally, I've already
> killed off once before in the exynos code.
>
Right. The way l2c-l2x0-resume.S does this is much better. Somehow I
overlooked it when implementing this.
Best regards,
Tomasz
next prev parent reply other threads:[~2014-09-15 21:31 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-26 14:17 [PATCH v4 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 1/7] ARM: l2c: Refactor the driver to use commit-like interface Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 2/7] ARM: l2c: Add interface to ask hypervisor to configure L2C Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 3/7] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-09-19 9:50 ` Alexandre Belloni
2014-09-19 9:50 ` Alexandre Belloni
2014-09-19 16:39 ` Russell King - ARM Linux
2014-09-19 16:39 ` Russell King - ARM Linux
2014-09-19 18:30 ` Alexandre Belloni
2014-09-19 18:30 ` Alexandre Belloni
2014-09-20 8:31 ` Russell King - ARM Linux
2014-09-20 8:31 ` Russell King - ARM Linux
2014-08-26 14:17 ` [PATCH v4 5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-09-15 8:58 ` Russell King - ARM Linux
2014-09-15 8:58 ` Russell King - ARM Linux
2014-09-15 21:27 ` Tomasz Figa
2014-09-15 21:27 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume Tomasz Figa
2014-08-26 14:17 ` Tomasz Figa
2014-09-15 9:03 ` Russell King - ARM Linux
2014-09-15 9:03 ` Russell King - ARM Linux
2014-09-15 21:31 ` Tomasz Figa [this message]
2014-09-15 21:31 ` Tomasz Figa
2014-08-26 14:18 ` [PATCH v4 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Tomasz Figa
2014-08-26 14:18 ` Tomasz Figa
2014-09-14 17:50 ` [PATCH v4 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
2014-09-14 17:50 ` Tomasz Figa
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