* [PATCH] Add support for Nyan
@ 2014-11-23 15:40 Simon Glass
[not found] ` <1416757251-4588-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Simon Glass @ 2014-11-23 15:40 UTC (permalink / raw)
To: linux-tegra-u79uwXL29TY76Z2rM5mHXA; +Cc: Stephen Warren, Simon Glass
Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
change for the reset GPIO.
Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
configs/nyan.board | 198 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 198 insertions(+)
create mode 100644 configs/nyan.board
diff --git a/configs/nyan.board b/configs/nyan.board
new file mode 100644
index 0000000..7da5b4d
--- /dev/null
+++ b/configs/nyan.board
@@ -0,0 +1,198 @@
+soc = 'tegra124'
+
+pins = (
+ #pin, mux, gpio_init, pull, tri, e_inp, od, rcv_sel
+ ('dap_mclk1_pw4', 'extperiph1', None, 'none', False, False, False, False),
+ ('dap_mclk1_req_pee2', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_din_pn1', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_dout_pn2', 'i2s0', None, 'down', True, False, False, False),
+ ('dap1_fs_pn0', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap1_sclk_pn3', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap2_din_pa4', 'i2s1', None, 'none', False, True, False, False),
+ ('dap2_dout_pa5', 'i2s1', None, 'none', False, True, False, False),
+ ('dap2_fs_pa2', 'i2s1', None, 'none', False, True, False, False),
+ ('dap2_sclk_pa3', 'i2s1', None, 'none', False, True, False, False),
+ ('gpio_x4_aud_px4', None, 'in', 'none', False, True, False, False),
+ ('gpio_x5_aud_px5', 'rsvd4', None, 'down', True, False, False, False),
+ ('gpio_x6_aud_px6', 'gmi', None, 'down', True, False, False, False),
+ ('gpio_x7_aud_px7', None, 'out0', 'none', False, False, False, False),
+ ('gpio_w2_aud_pw2', 'rsvd2', None, 'down', True, False, False, False),
+ ('gpio_w3_aud_pw3', None, 'in', 'none', False, True, False, False),
+ ('dvfs_pwm_px0', 'cldvfs', None, 'none', False, False, False, False),
+ ('gpio_x1_aud_px1', None, 'in', 'none', False, True, False, False),
+ ('dvfs_clk_px2', 'cldvfs', None, 'none', False, False, False, False),
+ ('gpio_x3_aud_px3', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap3_din_pp1', 'i2s2', None, 'down', True, False, False, False),
+ ('dap3_dout_pp2', None, 'out0', 'none', False, False, False, False),
+ ('dap3_fs_pp0', 'i2s2', None, 'down', True, False, False, False),
+ ('dap3_sclk_pp3', 'rsvd3', None, 'down', True, False, False, False),
+ ('pv0', None, 'in', 'none', False, True, False, False),
+ ('pv1', 'rsvd1', None, 'down', True, False, False, False),
+ ('ulpi_clk_py0', 'spi1', None, 'none', False, False, False, False),
+ ('ulpi_data0_po1', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data1_po2', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data2_po3', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data3_po4', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data4_po5', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data5_po6', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data6_po7', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_data7_po0', 'ulpi', None, 'down', True, False, False, False),
+ ('ulpi_dir_py1', 'spi1', None, 'none', False, True, False, False),
+ ('ulpi_nxt_py2', 'spi1', None, 'none', False, False, False, False),
+ ('ulpi_stp_py3', 'spi1', None, 'none', False, False, False, False),
+ ('cam_i2c_scl_pbb1', 'rsvd3', None, 'down', True, False, False, False),
+ ('cam_i2c_sda_pbb2', 'rsvd3', None, 'down', True, False, False, False),
+ ('cam_mclk_pcc0', 'vi', None, 'down', True, False, False, False),
+ ('pbb0', 'vgp6', None, 'down', True, False, False, False),
+ ('pbb3', 'vgp3', None, 'down', True, False, False, False),
+ ('pbb4', 'vgp4', None, 'down', True, False, False, False),
+ ('pbb5', 'rsvd3', None, 'down', True, False, False, False),
+ ('pbb6', 'rsvd2', None, 'down', True, False, False, False),
+ ('pbb7', 'rsvd2', None, 'down', True, False, False, False),
+ ('pcc1', 'rsvd2', None, 'down', True, False, False, False),
+ ('pcc2', 'rsvd2', None, 'down', True, False, False, False),
+ ('gen2_i2c_scl_pt5', 'i2c2', None, 'none', False, True, True, False),
+ ('gen2_i2c_sda_pt6', 'i2c2', None, 'none', False, True, True, False),
+ ('pj7', None, 'in', 'none', False, True, False, False),
+ ('pb0', 'rsvd2', None, 'down', True, False, False, False),
+ ('pb1', 'rsvd2', None, 'down', True, False, False, False),
+ ('pk7', None, 'in', 'none', False, True, False, False),
+ ('pg0', None, 'in', 'none', False, True, False, False),
+ ('pg1', None, 'in', 'none', False, True, False, False),
+ ('ph2', None, 'in', 'none', False, True, False, False),
+ ('ph3', 'gmi', None, 'down', True, False, False, False),
+ ('ph4', None, 'in', 'none', False, True, False, False),
+ ('ph5', 'rsvd2', None, 'down', True, False, False, False),
+ ('ph6', None, 'in', 'none', False, True, False, False),
+ ('ph7', None, 'out1', 'none', False, False, False, False),
+ ('pg2', None, 'in', 'none', False, True, False, False),
+ ('pg3', None, 'in', 'none', False, True, False, False),
+ ('pg4', 'spi4', None, 'none', False, False, False, False),
+ ('pg5', 'spi4', None, 'none', False, False, False, False),
+ ('pg6', 'spi4', None, 'none', False, False, False, False),
+ ('pg7', 'spi4', None, 'none', False, True, False, False),
+ ('ph0', 'gmi', None, 'down', True, False, False, False),
+ ('ph1', 'pwm1', None, 'none', False, False, False, False),
+ ('pk0', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk1', None, 'out0', 'none', False, False, False, False),
+ ('pj0', None, 'in', 'up', False, True, False, False),
+ ('pj2', 'rsvd1', None, 'down', True, False, False, False),
+ ('pk3', 'gmi', None, 'down', True, False, False, False),
+ ('pk4', None, 'out0', 'up', False, False, False, False),
+ ('pk2', None, 'in', 'none', False, True, False, False),
+ ('pi3', 'spi4', None, 'none', False, False, False, False),
+ ('pi6', None, 'in', 'none', False, True, False, False),
+ ('pi2', 'rsvd4', None, 'down', True, False, False, False),
+ ('pi5', None, 'out1', 'up', False, False, False, False),
+ ('pi1', None, 'in', 'none', False, True, False, False),
+ ('pi4', 'gmi', None, 'down', True, False, False, False),
+ ('pi7', None, 'in', 'none', False, True, False, False),
+ ('pc7', None, 'in', 'none', False, True, False, False),
+ ('pi0', None, 'in', 'none', False, True, False, False),
+ ('pex_l0_clkreq_n_pdd2', 'rsvd2', None, 'down', True, False, False, False),
+ ('pex_l0_rst_n_pdd1', 'rsvd2', None, 'down', True, False, False, False),
+ ('pex_l1_clkreq_n_pdd6', 'rsvd2', None, 'down', True, False, False, False),
+ ('pex_l1_rst_n_pdd5', 'rsvd2', None, 'down', True, False, False, False),
+ ('pex_wake_n_pdd3', 'rsvd2', None, 'down', True, False, False, False),
+ ('usb_vbus_en2_pff1', 'rsvd2', None, 'down', True, False, False, False),
+ ('pff2', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk2_out_pw5', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk2_req_pcc5', 'rsvd2', None, 'down', True, False, False, False),
+ ('sdmmc1_wp_n_pv3', 'sdmmc1', None, 'down', True, False, False, False),
+ ('sdmmc1_clk_pz0', 'sdmmc1', None, 'none', False, True, False, False),
+ ('sdmmc1_cmd_pz1', 'sdmmc1', None, 'up', False, True, False, False),
+ ('sdmmc1_dat0_py7', 'sdmmc1', None, 'up', False, True, False, False),
+ ('sdmmc1_dat1_py6', 'sdmmc1', None, 'up', False, True, False, False),
+ ('sdmmc1_dat2_py5', 'sdmmc1', None, 'up', False, True, False, False),
+ ('sdmmc1_dat3_py4', 'sdmmc1', None, 'up', False, True, False, False),
+ ('sdmmc3_clk_pa6', 'sdmmc3', None, 'none', False, False, False, False),
+ ('sdmmc3_cmd_pa7', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat0_pb7', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat1_pb6', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat2_pb5', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_dat3_pb4', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc3_clk_lb_out_pee4', 'sdmmc3', None, 'none', False, False, False, False),
+ ('sdmmc3_clk_lb_in_pee5', 'sdmmc3', None, 'up', False, True, False, False),
+ ('sdmmc4_clk_pcc4', 'sdmmc4', None, 'none', False, True, False, False),
+ ('sdmmc4_cmd_pt7', 'sdmmc4', None, 'none', False, True, False, False),
+ ('sdmmc4_dat0_paa0', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat1_paa1', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat2_paa2', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat3_paa3', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat4_paa4', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat5_paa5', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat6_paa6', 'sdmmc4', None, 'up', False, True, False, False),
+ ('sdmmc4_dat7_paa7', 'sdmmc4', None, 'up', False, True, False, False),
+ ('kb_col0_pq0', None, 'in', 'none', False, True, False, False),
+ ('kb_col1_pq1', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col2_pq2', None, 'in', 'none', False, True, False, False),
+ ('kb_col3_pq3', None, 'in', 'none', False, True, False, False),
+ ('kb_col4_pq4', 'sdmmc3', None, 'up', False, True, False, False),
+ ('kb_col5_pq5', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_col6_pq6', None, 'in', 'none', False, True, False, False),
+ ('kb_col7_pq7', None, 'in', 'none', False, True, False, False),
+ ('kb_row0_pr0', None, 'out0', 'none', False, False, False, False),
+ ('kb_row1_pr1', None, 'in', 'none', False, True, False, False),
+ ('kb_row10_ps2', 'uarta', None, 'none', False, True, False, False),
+ ('kb_row11_ps3', None, 'out0', 'none', False, False, False, False),
+ ('kb_row12_ps4', None, 'out0', 'none', False, False, False, False),
+ ('kb_row13_ps5', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row14_ps6', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row15_ps7', None, 'in', 'none', False, True, False, False),
+ ('kb_row16_pt0', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row17_pt1', None, 'in', 'none', False, True, False, False),
+ ('kb_row2_pr2', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row3_pr3', 'kbc', None, 'down', True, False, False, False),
+ ('kb_row4_pr4', None, 'in', 'none', False, True, False, False),
+ ('kb_row5_pr5', 'rsvd3', None, 'down', True, False, False, False),
+ ('kb_row6_pr6', 'kbc', None, 'down', True, False, False, False),
+ ('kb_row7_pr7', None, 'in', 'none', False, True, False, False),
+ ('kb_row8_ps0', 'rsvd2', None, 'down', True, False, False, False),
+ ('kb_row9_ps1', 'uarta', None, 'down', False, False, False, False),
+ ('sdmmc3_cd_n_pv2', 'sdmmc3', None, 'up', False, True, False, False),
+ ('clk_32k_out_pa0', None, 'in', 'none', False, True, False, False),
+ ('pwr_i2c_scl_pz6', 'i2cpwr', None, 'none', False, True, True, False),
+ ('pwr_i2c_sda_pz7', 'i2cpwr', None, 'none', False, True, True, False),
+ ('jtag_rtck', 'rtck', None, 'none', False, False, False, False),
+ ('clk_32k_in', 'clk', None, 'none', False, True, False, False),
+ ('core_pwr_req', 'pwron', None, 'none', False, False, False, False),
+ ('cpu_pwr_req', 'cpu', None, 'none', False, False, False, False),
+ ('pwr_int_n', 'pmi', None, 'none', False, True, False, False),
+ ('reset_out_n', 'reset_out_n', None, 'none', False, False, False, False),
+ ('clk3_out_pee0', 'rsvd2', None, 'down', True, False, False, False),
+ ('clk3_req_pee1', 'rsvd2', None, 'down', True, False, False, False),
+ ('dap4_din_pp5', 'rsvd3', None, 'down', True, False, False, False),
+ ('dap4_dout_pp6', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap4_fs_pp4', 'rsvd4', None, 'down', True, False, False, False),
+ ('dap4_sclk_pp7', 'rsvd3', None, 'down', True, False, False, False),
+ ('gen1_i2c_scl_pc4', 'i2c1', None, 'none', False, True, True, False),
+ ('gen1_i2c_sda_pc5', 'i2c1', None, 'none', False, True, True, False),
+ ('pu0', 'rsvd4', None, 'down', True, False, False, False),
+ ('pu1', 'rsvd1', None, 'down', True, False, False, False),
+ ('pu2', 'rsvd1', None, 'down', True, False, False, False),
+ ('pu3', 'gmi', None, 'down', True, False, False, False),
+ ('pu4', None, 'in', 'none', False, True, False, False),
+ ('pu5', None, 'in', 'up', False, True, False, False),
+ ('pu6', None, 'in', 'up', False, True, False, False),
+ ('uart2_cts_n_pj5', 'gmi', None, 'down', True, False, False, False),
+ ('uart2_rts_n_pj6', 'gmi', None, 'down', True, False, False, False),
+ ('uart2_rxd_pc3', 'irda', None, 'down', True, False, False, False),
+ ('uart2_txd_pc2', 'irda', None, 'down', True, False, False, False),
+ ('uart3_cts_n_pa1', 'gmi', None, 'down', True, False, False, False),
+ ('uart3_rts_n_pc0', 'gmi', None, 'down', True, False, False, False),
+ ('uart3_rxd_pw7', 'rsvd2', None, 'down', True, False, False, False),
+ ('uart3_txd_pw6', 'rsvd2', None, 'down', True, False, False, False),
+ ('owr', 'rsvd2', None, 'down', True, False, False, False),
+ ('hdmi_cec_pee3', 'cec', None, 'none', False, True, True, False),
+ ('hdmi_int_pn7', None, 'in', 'down', False, True, False, False),
+ ('ddc_scl_pv4', 'i2c4', None, 'none', False, True, False, False),
+ ('ddc_sda_pv5', 'i2c4', None, 'none', False, True, False, False),
+ ('spdif_out_pk5', 'rsvd2', None, 'down', True, False, False, False),
+ ('spdif_in_pk6', None, 'out0', 'down', False, False, False, False),
+ ('usb_vbus_en0_pn4', 'usb', None, 'none', False, True, True, False),
+ ('usb_vbus_en1_pn5', 'usb', None, 'none', False, True, True, False),
+ ('dp_hpd_pff0', 'dp', None, 'up', False, True, False, False),
+)
+
+drive_groups = (
+)
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <1416757251-4588-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
@ 2014-11-24 17:08 ` Stephen Warren
[not found] ` <547365FB.7010408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Stephen Warren @ 2014-11-24 17:08 UTC (permalink / raw)
To: Allen Martin; +Cc: Simon Glass, linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 11/23/2014 08:40 AM, Simon Glass wrote:
> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
> change for the reset GPIO.
Allen, can you please confirm the reset GPIO setting for Norrin in the
pinmux patch you sent? It seems as if the two boards truly are this
identical, the reset pin would be too.
Perhaps the issue is that one of these patches assumes
APB_MISC_PP_PINMUX_GLOBAL_0's CLAMP_INPUTS_WHEN_TRISTATED bit is set,
whereas the other assumes it is clear? The latest guidance is that that
bit should always be clear now, although not all pinmux spreadsheets
have been updated to conform with this. Can you both confirm the value
your pinmux settings expect, or were tested with?
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <547365FB.7010408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
@ 2014-11-24 17:10 ` Simon Glass
2014-11-24 19:07 ` Andrew Bresticker
1 sibling, 0 replies; 7+ messages in thread
From: Simon Glass @ 2014-11-24 17:10 UTC (permalink / raw)
To: Stephen Warren
Cc: Allen Martin, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Hi Stephen,
On 24 November 2014 at 10:08, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
> On 11/23/2014 08:40 AM, Simon Glass wrote:
>>
>> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
>> change for the reset GPIO.
>
>
> Allen, can you please confirm the reset GPIO setting for Norrin in the
> pinmux patch you sent? It seems as if the two boards truly are this
> identical, the reset pin would be too.
>
> Perhaps the issue is that one of these patches assumes
> APB_MISC_PP_PINMUX_GLOBAL_0's CLAMP_INPUTS_WHEN_TRISTATED bit is set,
> whereas the other assumes it is clear? The latest guidance is that that bit
> should always be clear now, although not all pinmux spreadsheets have been
> updated to conform with this. Can you both confirm the value your pinmux
> settings expect, or were tested with?
Well I tested with the values in my series, but I admit I don't know
much about the mechanics. Will await Allen's knowledge on this.
Regards,
Simon
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <547365FB.7010408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-11-24 17:10 ` Simon Glass
@ 2014-11-24 19:07 ` Andrew Bresticker
[not found] ` <CAL1qeaG6cvKsrwtLnqWYYzdbe4jhGqGxi-DRxftWGYsHWE+T5A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
1 sibling, 1 reply; 7+ messages in thread
From: Andrew Bresticker @ 2014-11-24 19:07 UTC (permalink / raw)
To: Stephen Warren
Cc: Allen Martin, Simon Glass,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On Mon, Nov 24, 2014 at 9:08 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
> On 11/23/2014 08:40 AM, Simon Glass wrote:
>>
>> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
>> change for the reset GPIO.
>
> Allen, can you please confirm the reset GPIO setting for Norrin in the
> pinmux patch you sent? It seems as if the two boards truly are this
> identical, the reset pin would be too.
Well Nyan and Norrin *are* identical - they're different names for the
same board. It seems from the other patches though that this is for
Big (in which case the name of the config file should reflect that).
Either way, the reset GPIO (PI5) is configured the same across all
Nyan-based boards (Nyan/Norrin, Big, Blaze, Kitty) and I believe what
Simon has here is correct.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <CAL1qeaG6cvKsrwtLnqWYYzdbe4jhGqGxi-DRxftWGYsHWE+T5A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2014-11-24 19:31 ` Stephen Warren
[not found] ` <547387A5.2060500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Stephen Warren @ 2014-11-24 19:31 UTC (permalink / raw)
To: Andrew Bresticker, Allen Martin
Cc: Simon Glass, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On 11/24/2014 12:07 PM, Andrew Bresticker wrote:
> On Mon, Nov 24, 2014 at 9:08 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
>> On 11/23/2014 08:40 AM, Simon Glass wrote:
>>>
>>> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
>>> change for the reset GPIO.
>>
>> Allen, can you please confirm the reset GPIO setting for Norrin in the
>> pinmux patch you sent? It seems as if the two boards truly are this
>> identical, the reset pin would be too.
>
> Well Nyan and Norrin *are* identical - they're different names for the
> same board.
Oh. It's a bit of an epic fail to have multiple names for the exact same
thing:-(
When you say Nyan, are you talking about Nyan the family of boards (of
which Big is one member), or do you consider Nyan to be a single board?
Olof previously told me that Nyan was a family, of which Big was a
member. So, I'm not sure if Norrin is another name for the family, or
another name for a specific member.
> It seems from the other patches though that this is for
> Big (in which case the name of the config file should reflect that).
Yes. All of the kernel, U-Boot, and tegra-pinmux-scripts (and
tegra-uboot-flasher if relevant) should use the exact same name for the
board. If what's currently known as Norrin in tegra-pinmux-scripts
should actually be called Nyan or Nyan-big, we should rename it.
> Either way, the reset GPIO (PI5) is configured the same across all
> Nyan-based boards (Nyan/Norrin, Big, Blaze, Kitty) and I believe what
> Simon has here is correct.
If the entire pinmux identical across all of those boards too, or does
it just happen that's true for this one pin?
Hopefully Allen can comment on why the current Norrin values in
tegra-pinmux-scripts differ then. I do recall that Venice2 had a similar
issue, where the spreadsheet was actually wrong and SW had been fixed
without updating the spreadsheet (grrr...) Perhaps the situation here is
that simple too.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <547387A5.2060500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
@ 2014-11-24 21:13 ` Andrew Bresticker
[not found] ` <CAL1qeaGD9J+p=JoTPX5GuSmcZ2YnqbWExL-o5XuVfCZKdS0Bgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Bresticker @ 2014-11-24 21:13 UTC (permalink / raw)
To: Stephen Warren
Cc: Allen Martin, Simon Glass,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On Mon, Nov 24, 2014 at 11:31 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
> On 11/24/2014 12:07 PM, Andrew Bresticker wrote:
>>
>> On Mon, Nov 24, 2014 at 9:08 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
>> wrote:
>>>
>>> On 11/23/2014 08:40 AM, Simon Glass wrote:
>>>>
>>>>
>>>> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
>>>> change for the reset GPIO.
>>>
>>>
>>> Allen, can you please confirm the reset GPIO setting for Norrin in the
>>> pinmux patch you sent? It seems as if the two boards truly are this
>>> identical, the reset pin would be too.
>>
>>
>> Well Nyan and Norrin *are* identical - they're different names for the
>> same board.
>
>
> Oh. It's a bit of an epic fail to have multiple names for the exact same
> thing:-(
>
> When you say Nyan, are you talking about Nyan the family of boards (of which
> Big is one member), or do you consider Nyan to be a single board? Olof
> previously told me that Nyan was a family, of which Big was a member. So,
> I'm not sure if Norrin is another name for the family, or another name for a
> specific member.
When I said Nyan above, I meant the actual Nyan board (which is also
known as Norrin). The Nyan family of boards is composed of Nyan (aka
Norrin), Big (Acer Chromebook, which I believe this patch is referring
to), Blaze, and Kitty.
>> It seems from the other patches though that this is for
>> Big (in which case the name of the config file should reflect that).
>
>
> Yes. All of the kernel, U-Boot, and tegra-pinmux-scripts (and
> tegra-uboot-flasher if relevant) should use the exact same name for the
> board. If what's currently known as Norrin in tegra-pinmux-scripts should
> actually be called Nyan or Nyan-big, we should rename it.
No, the Norrin one is fine (other than the possible error Simon
mentioned). Calling it Nyan would be fine too.
The file in this patch should be called Big or Nyan-Big, since it is
for the Acer Chromebook.
>> Either way, the reset GPIO (PI5) is configured the same across all
>> Nyan-based boards (Nyan/Norrin, Big, Blaze, Kitty) and I believe what
>> Simon has here is correct.
>
>
> If the entire pinmux identical across all of those boards too, or does it
> just happen that's true for this one pin?
There are slight pinmux differences between the boards. The only one
I'm aware of between Nyan (Norrin) and Nyan-Big is that the sense of
the SD write-protect GPIO (Q4) is reversed. I don't think that the
matters for this config file though, so technically they could share
it. Perhaps it's best to keep them separate though since they are
separate boards.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] Add support for Nyan
[not found] ` <CAL1qeaGD9J+p=JoTPX5GuSmcZ2YnqbWExL-o5XuVfCZKdS0Bgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2014-11-24 21:53 ` Stephen Warren
0 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2014-11-24 21:53 UTC (permalink / raw)
To: Andrew Bresticker
Cc: Allen Martin, Simon Glass,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
On 11/24/2014 02:13 PM, Andrew Bresticker wrote:
> On Mon, Nov 24, 2014 at 11:31 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
>> On 11/24/2014 12:07 PM, Andrew Bresticker wrote:
>>>
>>> On Mon, Nov 24, 2014 at 9:08 AM, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
>>> wrote:
>>>>
>>>> On 11/23/2014 08:40 AM, Simon Glass wrote:
>>>>>
>>>>>
>>>>> Add support for Tegra124 Nyan. Pinmux is based on norrin with a single
>>>>> change for the reset GPIO.
>>>>
>>>>
>>>> Allen, can you please confirm the reset GPIO setting for Norrin in the
>>>> pinmux patch you sent? It seems as if the two boards truly are this
>>>> identical, the reset pin would be too.
>>>
>>>
>>> Well Nyan and Norrin *are* identical - they're different names for the
>>> same board.
>>
>>
>> Oh. It's a bit of an epic fail to have multiple names for the exact same
>> thing:-(
>>
>> When you say Nyan, are you talking about Nyan the family of boards (of which
>> Big is one member), or do you consider Nyan to be a single board? Olof
>> previously told me that Nyan was a family, of which Big was a member. So,
>> I'm not sure if Norrin is another name for the family, or another name for a
>> specific member.
>
> When I said Nyan above, I meant the actual Nyan board (which is also
> known as Norrin). The Nyan family of boards is composed of Nyan (aka
> Norrin), Big (Acer Chromebook, which I believe this patch is referring
> to), Blaze, and Kitty.
>
>>> It seems from the other patches though that this is for
>>> Big (in which case the name of the config file should reflect that).
>>
>>
>> Yes. All of the kernel, U-Boot, and tegra-pinmux-scripts (and
>> tegra-uboot-flasher if relevant) should use the exact same name for the
>> board. If what's currently known as Norrin in tegra-pinmux-scripts should
>> actually be called Nyan or Nyan-big, we should rename it.
>
> No, the Norrin one is fine (other than the possible error Simon
> mentioned). Calling it Nyan would be fine too.
>
> The file in this patch should be called Big or Nyan-Big, since it is
> for the Acer Chromebook.
Please let's call it nyan-big not just big, since the DT file in the
kernel is nyan-big not just nyan.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-11-24 21:53 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-11-23 15:40 [PATCH] Add support for Nyan Simon Glass
[not found] ` <1416757251-4588-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2014-11-24 17:08 ` Stephen Warren
[not found] ` <547365FB.7010408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-11-24 17:10 ` Simon Glass
2014-11-24 19:07 ` Andrew Bresticker
[not found] ` <CAL1qeaG6cvKsrwtLnqWYYzdbe4jhGqGxi-DRxftWGYsHWE+T5A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-24 19:31 ` Stephen Warren
[not found] ` <547387A5.2060500-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-11-24 21:13 ` Andrew Bresticker
[not found] ` <CAL1qeaGD9J+p=JoTPX5GuSmcZ2YnqbWExL-o5XuVfCZKdS0Bgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-24 21:53 ` Stephen Warren
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