[RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Vince Hsu]

Some Tegra drivers might be complied as kernel modules, and
they need the fuse information for initialization. One
example is the GK20A Nouveau driver. It needs the GPU speedo
value to calculate frequency-voltage table. So export
the tegra_sku_info.

Signed-off-by: Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---

v2: add more description why we need this patch

 drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index 11a5043959dc..011a3363c265 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -31,6 +31,7 @@
 static u32 (*fuse_readl)(const unsigned int offset);
 static int fuse_size;
 struct tegra_sku_info tegra_sku_info;
+EXPORT_SYMBOL(tegra_sku_info);
 
 static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
 	[TEGRA_REVISION_UNKNOWN] = "unknown",
-- 
1.9.1

[RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Vince Hsu]

Some Tegra drivers might be complied as kernel modules, and
they need the fuse information for initialization. One
example is the GK20A Nouveau driver. It needs the GPU speedo
value to calculate frequency-voltage table. So export
the tegra_sku_info.

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
---

v2: add more description why we need this patch

 drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index 11a5043959dc..011a3363c265 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -31,6 +31,7 @@
 static u32 (*fuse_readl)(const unsigned int offset);
 static int fuse_size;
 struct tegra_sku_info tegra_sku_info;
+EXPORT_SYMBOL(tegra_sku_info);
 
 static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
 	[TEGRA_REVISION_UNKNOWN] = "unknown",
-- 
1.9.1

[RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Vince Hsu]

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
---

Resend this patch with the fuse change and proper patch prefix
per Thierry's request.

 nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++---------------------
 1 file changed, 38 insertions(+), 29 deletions(-)

diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c
index 32794a999106..26ccd8df193f 100644
--- a/nvkm/subdev/volt/base.c
+++ b/nvkm/subdev/volt/base.c
@@ -101,6 +101,41 @@ nouveau_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
 	return ret;
 }
 
+static void nouveau_volt_parse_bios(struct nouveau_bios *bios,
+		struct nouveau_volt *volt)
+{
+	struct nvbios_volt_entry ivid;
+	struct nvbios_volt info;
+	u8  ver, hdr, cnt, len;
+	u16 data;
+	int i;
+
+	data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info);
+	if (data && info.vidmask && info.base && info.step) {
+		for (i = 0; i < info.vidmask + 1; i++) {
+			if (info.base >= info.min &&
+				info.base <= info.max) {
+				volt->vid[volt->vid_nr].uv = info.base;
+				volt->vid[volt->vid_nr].vid = i;
+				volt->vid_nr++;
+			}
+			info.base += info.step;
+		}
+		volt->vid_mask = info.vidmask;
+	} else if (data && info.vidmask) {
+		for (i = 0; i < cnt; i++) {
+			data = nvbios_volt_entry_parse(bios, i, &ver, &hdr,
+							  &ivid);
+			if (data) {
+				volt->vid[volt->vid_nr].uv = ivid.voltage;
+				volt->vid[volt->vid_nr].vid = ivid.vid;
+				volt->vid_nr++;
+			}
+		}
+		volt->vid_mask = info.vidmask;
+	}
+}
+
 int
 _nouveau_volt_init(struct nouveau_object *object)
 {
@@ -136,10 +171,6 @@ nouveau_volt_create_(struct nouveau_object *parent,
 {
 	struct nouveau_bios *bios = nouveau_bios(parent);
 	struct nouveau_volt *volt;
-	struct nvbios_volt_entry ivid;
-	struct nvbios_volt info;
-	u8  ver, hdr, cnt, len;
-	u16 data;
 	int ret, i;
 
 	ret = nouveau_subdev_create_(parent, engine, oclass, 0, "VOLT",
@@ -152,31 +183,9 @@ nouveau_volt_create_(struct nouveau_object *parent,
 	volt->set = nouveau_volt_set;
 	volt->set_id = nouveau_volt_set_id;
 
-	data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info);
-	if (data && info.vidmask && info.base && info.step) {
-		for (i = 0; i < info.vidmask + 1; i++) {
-			if (info.base >= info.min &&
-			    info.base <= info.max) {
-				volt->vid[volt->vid_nr].uv = info.base;
-				volt->vid[volt->vid_nr].vid = i;
-				volt->vid_nr++;
-			}
-			info.base += info.step;
-		}
-		volt->vid_mask = info.vidmask;
-	} else
-	if (data && info.vidmask) {
-		for (i = 0; i < cnt; i++) {
-			data = nvbios_volt_entry_parse(bios, i, &ver, &hdr,
-						      &ivid);
-			if (data) {
-				volt->vid[volt->vid_nr].uv = ivid.voltage;
-				volt->vid[volt->vid_nr].vid = ivid.vid;
-				volt->vid_nr++;
-			}
-		}
-		volt->vid_mask = info.vidmask;
-	}
+	/* Assuming the non-bios device should build the voltage table later */
+	if (bios)
+		nouveau_volt_parse_bios(bios, volt);
 
 	if (volt->vid_nr) {
 		for (i = 0; i < volt->vid_nr; i++) {
-- 
1.9.1

_______________________________________________
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Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Vince Hsu]

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
---

Resend this patch with the fuse change and proper patch prefix
per Thierry's request.

 nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++---------------------
 1 file changed, 38 insertions(+), 29 deletions(-)

diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c
index 32794a999106..26ccd8df193f 100644
--- a/nvkm/subdev/volt/base.c
+++ b/nvkm/subdev/volt/base.c
@@ -101,6 +101,41 @@ nouveau_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
 	return ret;
 }
 
+static void nouveau_volt_parse_bios(struct nouveau_bios *bios,
+		struct nouveau_volt *volt)
+{
+	struct nvbios_volt_entry ivid;
+	struct nvbios_volt info;
+	u8  ver, hdr, cnt, len;
+	u16 data;
+	int i;
+
+	data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info);
+	if (data && info.vidmask && info.base && info.step) {
+		for (i = 0; i < info.vidmask + 1; i++) {
+			if (info.base >= info.min &&
+				info.base <= info.max) {
+				volt->vid[volt->vid_nr].uv = info.base;
+				volt->vid[volt->vid_nr].vid = i;
+				volt->vid_nr++;
+			}
+			info.base += info.step;
+		}
+		volt->vid_mask = info.vidmask;
+	} else if (data && info.vidmask) {
+		for (i = 0; i < cnt; i++) {
+			data = nvbios_volt_entry_parse(bios, i, &ver, &hdr,
+							  &ivid);
+			if (data) {
+				volt->vid[volt->vid_nr].uv = ivid.voltage;
+				volt->vid[volt->vid_nr].vid = ivid.vid;
+				volt->vid_nr++;
+			}
+		}
+		volt->vid_mask = info.vidmask;
+	}
+}
+
 int
 _nouveau_volt_init(struct nouveau_object *object)
 {
@@ -136,10 +171,6 @@ nouveau_volt_create_(struct nouveau_object *parent,
 {
 	struct nouveau_bios *bios = nouveau_bios(parent);
 	struct nouveau_volt *volt;
-	struct nvbios_volt_entry ivid;
-	struct nvbios_volt info;
-	u8  ver, hdr, cnt, len;
-	u16 data;
 	int ret, i;
 
 	ret = nouveau_subdev_create_(parent, engine, oclass, 0, "VOLT",
@@ -152,31 +183,9 @@ nouveau_volt_create_(struct nouveau_object *parent,
 	volt->set = nouveau_volt_set;
 	volt->set_id = nouveau_volt_set_id;
 
-	data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info);
-	if (data && info.vidmask && info.base && info.step) {
-		for (i = 0; i < info.vidmask + 1; i++) {
-			if (info.base >= info.min &&
-			    info.base <= info.max) {
-				volt->vid[volt->vid_nr].uv = info.base;
-				volt->vid[volt->vid_nr].vid = i;
-				volt->vid_nr++;
-			}
-			info.base += info.step;
-		}
-		volt->vid_mask = info.vidmask;
-	} else
-	if (data && info.vidmask) {
-		for (i = 0; i < cnt; i++) {
-			data = nvbios_volt_entry_parse(bios, i, &ver, &hdr,
-						      &ivid);
-			if (data) {
-				volt->vid[volt->vid_nr].uv = ivid.voltage;
-				volt->vid[volt->vid_nr].vid = ivid.vid;
-				volt->vid_nr++;
-			}
-		}
-		volt->vid_mask = info.vidmask;
-	}
+	/* Assuming the non-bios device should build the voltage table later */
+	if (bios)
+		nouveau_volt_parse_bios(bios, volt);
 
 	if (volt->vid_nr) {
 		for (i = 0; i < volt->vid_nr; i++) {
-- 
1.9.1

Re: [RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Alexandre Courbot]

On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>

Make sure you always write a short summary for your patches, even if
the title sounds sufficient.

At the very least this patch makes the code easier to read, so:

Acked-by: Alexandre Courbot <acourbot@nvidia.com>
_______________________________________________
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Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Alexandre Courbot]

On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>

Make sure you always write a short summary for your patches, even if
the title sounds sufficient.

At the very least this patch makes the code easier to read, so:

Acked-by: Alexandre Courbot <acourbot@nvidia.com>

Re: [RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Martin Peres]

On 29/11/2014 09:22, Alexandre Courbot wrote:
> On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> Make sure you always write a short summary for your patches, even if
> the title sounds sufficient.

I agree. Something like "Move the vbios parsing out of init() and
call it conditionally if the platform has a vbios. Non-vbios platforms
can use the ctor() to init the data structures.".

> At the very least this patch makes the code easier to read, so:
>
> Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Martin Peres <martin.peres@free.fr>
_______________________________________________
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling

[Martin Peres]

On 29/11/2014 09:22, Alexandre Courbot wrote:
> On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> Make sure you always write a short summary for your patches, even if
> the title sounds sufficient.

I agree. Something like "Move the vbios parsing out of init() and
call it conditionally if the platform has a vbios. Non-vbios platforms
can use the ctor() to init the data structures.".

> At the very least this patch makes the code easier to read, so:
>
> Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Martin Peres <martin.peres@free.fr>

[RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Vince Hsu]

The voltage value are calculated by the hardware characterized
result.

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
---

Resend this patch with the fuse change and proper patch prefix
per Thierry's request.

 drm/Kbuild                   |   1 +
 drm/core/subdev/volt/gk20a.c |   1 +
 nvkm/engine/device/nve0.c    |   1 +
 nvkm/include/subdev/volt.h   |   1 +
 nvkm/subdev/clock/gk20a.c    |  15 ++++
 nvkm/subdev/volt/gk20a.c     | 202 +++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 221 insertions(+)
 create mode 120000 drm/core/subdev/volt/gk20a.c
 create mode 100644 nvkm/subdev/volt/gk20a.c

diff --git a/drm/Kbuild b/drm/Kbuild
index 728bc5b66b29..7c49e6655066 100644
--- a/drm/Kbuild
+++ b/drm/Kbuild
@@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
 nouveau-y += core/subdev/volt/base.o
 nouveau-y += core/subdev/volt/gpio.o
 nouveau-y += core/subdev/volt/nv40.o
+nouveau-y += core/subdev/volt/gk20a.o
 
 nouveau-y += core/engine/falcon.o
 nouveau-y += core/engine/xtensa.o
diff --git a/drm/core/subdev/volt/gk20a.c b/drm/core/subdev/volt/gk20a.c
new file mode 120000
index 000000000000..2894eb1ede13
--- /dev/null
+++ b/drm/core/subdev/volt/gk20a.c
@@ -0,0 +1 @@
+../../../../nvkm/subdev/volt/gk20a.c
\ No newline at end of file
diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
index b1b2e484ecfa..674da1f095b2 100644
--- a/nvkm/engine/device/nve0.c
+++ b/nvkm/engine/device/nve0.c
@@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
 		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_graph_oclass;
 		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
 		device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
+		device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
 		break;
 	case 0xf0:
 		device->cname = "GK110";
diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
index 820b62ffd75b..67db5e58880d 100644
--- a/nvkm/include/subdev/volt.h
+++ b/nvkm/include/subdev/volt.h
@@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
 #define _nouveau_volt_fini _nouveau_subdev_fini
 
 extern struct nouveau_oclass nv40_volt_oclass;
+extern struct nouveau_oclass gk20a_volt_oclass;
 
 int nouveau_voltgpio_init(struct nouveau_volt *);
 int nouveau_voltgpio_get(struct nouveau_volt *);
diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
index 82abbea2be12..fb4fad374bdd 100644
--- a/nvkm/subdev/clock/gk20a.c
+++ b/nvkm/subdev/clock/gk20a.c
@@ -470,76 +470,91 @@ gk20a_pstates[] = {
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 72000,
+			.voltage = 0,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 108000,
+			.voltage = 1,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 180000,
+			.voltage = 2,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 252000,
+			.voltage = 3,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 324000,
+			.voltage = 4,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 396000,
+			.voltage = 5,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 468000,
+			.voltage = 6,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 540000,
+			.voltage = 7,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 612000,
+			.voltage = 8,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 648000,
+			.voltage = 9,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 684000,
+			.voltage = 10,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 708000,
+			.voltage = 11,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 756000,
+			.voltage = 12,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 804000,
+			.voltage = 13,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 852000,
+			.voltage = 14,
 		},
 	},
 };
diff --git a/nvkm/subdev/volt/gk20a.c b/nvkm/subdev/volt/gk20a.c
new file mode 100644
index 000000000000..87385966e67f
--- /dev/null
+++ b/nvkm/subdev/volt/gk20a.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/regulator/consumer.h>
+#include <soc/tegra/fuse.h>
+
+#include <nouveau_platform.h>
+#include <subdev/volt.h>
+
+struct cvb_coef {
+	int c0;
+	int c1;
+	int c2;
+	int c3;
+	int c4;
+	int c5;
+};
+
+struct gk20a_volt_priv {
+	struct nouveau_volt base;
+	struct regulator *vdd;
+};
+
+const struct cvb_coef gk20a_cvb_coef[] = {
+	/* MHz,        c0,     c1,   c2,    c3,     c4,   c5 */
+	/*  72 */ { 1209886, -36468,  515,   417, -13123,  203},
+	/* 108 */ { 1130804, -27659,  296,   298, -10834,  221},
+	/* 180 */ { 1162871, -27110,  247,   238, -10681,  268},
+	/* 252 */ { 1220458, -28654,  247,   179, -10376,  298},
+	/* 324 */ { 1280953, -30204,  247,   119,  -9766,  304},
+	/* 396 */ { 1344547, -31777,  247,   119,  -8545,  292},
+	/* 468 */ { 1420168, -34227,  269,    60,  -7172,  256},
+	/* 540 */ { 1490757, -35955,  274,    60,  -5188,  197},
+	/* 612 */ { 1599112, -42583,  398,     0,  -1831,  119},
+	/* 648 */ { 1366986, -16459, -274,     0,  -3204,   72},
+	/* 684 */ { 1391884, -17078, -274,   -60,  -1526,   30},
+	/* 708 */ { 1415522, -17497, -274,   -60,   -458,    0},
+	/* 756 */ { 1464061, -18331, -274,  -119,   1831,  -72},
+	/* 804 */ { 1524225, -20064, -254,  -119,   4272, -155},
+	/* 852 */ { 1608418, -21643, -269,     0,    763,  -48},
+};
+
+/**
+ * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
+ */
+static inline int
+gk20a_volt_get_cvb_voltage(int speedo, int s_scale,
+		const struct cvb_coef *coef)
+{
+	int mv;
+
+	mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale);
+	mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0;
+	return mv;
+}
+
+/**
+ * cvb_t_mv =
+ * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
+ * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
+ */
+static inline int
+gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int t_scale,
+		const struct cvb_coef *coef)
+{
+	int cvb_mv, mv;
+
+	cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef);
+
+	mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 +
+		DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale);
+	mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv;
+	return mv;
+}
+
+static int
+gk20a_volt_calc_voltage(const struct cvb_coef *coef)
+{
+	int speedo, mv;
+
+	speedo = tegra_sku_info.gpu_speedo_value;
+
+	mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef);
+	mv = DIV_ROUND_UP(mv, 1000);
+
+	return mv * 1000;
+}
+
+static int
+gk20a_volt_vid_get(struct nouveau_volt *volt)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+	int i, uv;
+
+	uv = regulator_get_voltage(priv->vdd);
+
+	for (i = 0; i < volt->vid_nr; i++)
+		if (volt->vid[i].uv >= uv)
+			return i;
+
+	return -EINVAL;
+}
+
+static int
+gk20a_volt_vid_set(struct nouveau_volt *volt, u8 vid)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+
+	nv_debug(volt, "set voltage as %duv\n", volt->vid[vid].uv);
+	return regulator_set_voltage(priv->vdd, volt->vid[vid].uv, 1200000);
+}
+
+static int
+gk20a_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+	int prev_uv = regulator_get_voltage(priv->vdd);
+	int target_uv = volt->vid[id].uv;
+	int ret;
+
+	nv_debug(volt, "prev=%d, target=%d, condition=%d\n",
+			prev_uv, target_uv, condition);
+	if (!condition ||
+		(condition < 0 && target_uv < prev_uv) ||
+		(condition > 0 && target_uv > prev_uv)) {
+		ret = gk20a_volt_vid_set(volt, volt->vid[id].vid);
+	} else {
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static int
+gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+	       struct nouveau_oclass *oclass, void *data, u32 size,
+	       struct nouveau_object **pobject)
+{
+	struct gk20a_volt_priv *priv;
+	struct nouveau_volt *volt;
+	struct nouveau_platform_device *plat;
+	int i, ret, uv;
+
+	ret = nouveau_volt_create(parent, engine, oclass, &priv);
+	*pobject = nv_object(priv);
+	if (ret)
+		return ret;
+
+	volt = &priv->base;
+
+	plat = nv_device_to_platform(nv_device(parent));
+
+	uv = regulator_get_voltage(plat->gpu->vdd);
+	nv_info(priv, "The default voltage is %duV\n", uv);
+
+	priv->vdd = plat->gpu->vdd;
+	priv->base.vid_get = gk20a_volt_vid_get;
+	priv->base.vid_set = gk20a_volt_vid_set;
+	priv->base.set_id = gk20a_volt_set_id;
+
+	volt->vid_nr = ARRAY_SIZE(gk20a_cvb_coef);
+	nv_debug(priv, "%s - vid_nr = %d\n", __func__, volt->vid_nr);
+	for (i = 0; i < volt->vid_nr; i++) {
+		volt->vid[i].vid = i;
+		volt->vid[i].uv = gk20a_volt_calc_voltage(&gk20a_cvb_coef[i]);
+		nv_debug(priv, "%2d: vid=%d, uv=%d\n", i, volt->vid[i].vid,
+					volt->vid[i].uv);
+	}
+
+	return 0;
+}
+
+struct nouveau_oclass
+gk20a_volt_oclass = {
+	.handle = NV_SUBDEV(VOLT, 0xea),
+	.ofuncs = &(struct nouveau_ofuncs) {
+		.ctor = gk20a_volt_ctor,
+		.dtor = _nouveau_volt_dtor,
+		.init = _nouveau_volt_init,
+		.fini = _nouveau_volt_fini,
+	},
+};
-- 
1.9.1

_______________________________________________
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Vince Hsu]

The voltage value are calculated by the hardware characterized
result.

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
---

Resend this patch with the fuse change and proper patch prefix
per Thierry's request.

 drm/Kbuild                   |   1 +
 drm/core/subdev/volt/gk20a.c |   1 +
 nvkm/engine/device/nve0.c    |   1 +
 nvkm/include/subdev/volt.h   |   1 +
 nvkm/subdev/clock/gk20a.c    |  15 ++++
 nvkm/subdev/volt/gk20a.c     | 202 +++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 221 insertions(+)
 create mode 120000 drm/core/subdev/volt/gk20a.c
 create mode 100644 nvkm/subdev/volt/gk20a.c

diff --git a/drm/Kbuild b/drm/Kbuild
index 728bc5b66b29..7c49e6655066 100644
--- a/drm/Kbuild
+++ b/drm/Kbuild
@@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
 nouveau-y += core/subdev/volt/base.o
 nouveau-y += core/subdev/volt/gpio.o
 nouveau-y += core/subdev/volt/nv40.o
+nouveau-y += core/subdev/volt/gk20a.o
 
 nouveau-y += core/engine/falcon.o
 nouveau-y += core/engine/xtensa.o
diff --git a/drm/core/subdev/volt/gk20a.c b/drm/core/subdev/volt/gk20a.c
new file mode 120000
index 000000000000..2894eb1ede13
--- /dev/null
+++ b/drm/core/subdev/volt/gk20a.c
@@ -0,0 +1 @@
+../../../../nvkm/subdev/volt/gk20a.c
\ No newline at end of file
diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
index b1b2e484ecfa..674da1f095b2 100644
--- a/nvkm/engine/device/nve0.c
+++ b/nvkm/engine/device/nve0.c
@@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
 		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_graph_oclass;
 		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
 		device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
+		device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
 		break;
 	case 0xf0:
 		device->cname = "GK110";
diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
index 820b62ffd75b..67db5e58880d 100644
--- a/nvkm/include/subdev/volt.h
+++ b/nvkm/include/subdev/volt.h
@@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
 #define _nouveau_volt_fini _nouveau_subdev_fini
 
 extern struct nouveau_oclass nv40_volt_oclass;
+extern struct nouveau_oclass gk20a_volt_oclass;
 
 int nouveau_voltgpio_init(struct nouveau_volt *);
 int nouveau_voltgpio_get(struct nouveau_volt *);
diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
index 82abbea2be12..fb4fad374bdd 100644
--- a/nvkm/subdev/clock/gk20a.c
+++ b/nvkm/subdev/clock/gk20a.c
@@ -470,76 +470,91 @@ gk20a_pstates[] = {
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 72000,
+			.voltage = 0,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 108000,
+			.voltage = 1,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 180000,
+			.voltage = 2,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 252000,
+			.voltage = 3,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 324000,
+			.voltage = 4,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 396000,
+			.voltage = 5,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 468000,
+			.voltage = 6,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 540000,
+			.voltage = 7,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 612000,
+			.voltage = 8,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 648000,
+			.voltage = 9,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 684000,
+			.voltage = 10,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 708000,
+			.voltage = 11,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 756000,
+			.voltage = 12,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 804000,
+			.voltage = 13,
 		},
 	},
 	{
 		.base = {
 			.domain[nv_clk_src_gpc] = 852000,
+			.voltage = 14,
 		},
 	},
 };
diff --git a/nvkm/subdev/volt/gk20a.c b/nvkm/subdev/volt/gk20a.c
new file mode 100644
index 000000000000..87385966e67f
--- /dev/null
+++ b/nvkm/subdev/volt/gk20a.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/regulator/consumer.h>
+#include <soc/tegra/fuse.h>
+
+#include <nouveau_platform.h>
+#include <subdev/volt.h>
+
+struct cvb_coef {
+	int c0;
+	int c1;
+	int c2;
+	int c3;
+	int c4;
+	int c5;
+};
+
+struct gk20a_volt_priv {
+	struct nouveau_volt base;
+	struct regulator *vdd;
+};
+
+const struct cvb_coef gk20a_cvb_coef[] = {
+	/* MHz,        c0,     c1,   c2,    c3,     c4,   c5 */
+	/*  72 */ { 1209886, -36468,  515,   417, -13123,  203},
+	/* 108 */ { 1130804, -27659,  296,   298, -10834,  221},
+	/* 180 */ { 1162871, -27110,  247,   238, -10681,  268},
+	/* 252 */ { 1220458, -28654,  247,   179, -10376,  298},
+	/* 324 */ { 1280953, -30204,  247,   119,  -9766,  304},
+	/* 396 */ { 1344547, -31777,  247,   119,  -8545,  292},
+	/* 468 */ { 1420168, -34227,  269,    60,  -7172,  256},
+	/* 540 */ { 1490757, -35955,  274,    60,  -5188,  197},
+	/* 612 */ { 1599112, -42583,  398,     0,  -1831,  119},
+	/* 648 */ { 1366986, -16459, -274,     0,  -3204,   72},
+	/* 684 */ { 1391884, -17078, -274,   -60,  -1526,   30},
+	/* 708 */ { 1415522, -17497, -274,   -60,   -458,    0},
+	/* 756 */ { 1464061, -18331, -274,  -119,   1831,  -72},
+	/* 804 */ { 1524225, -20064, -254,  -119,   4272, -155},
+	/* 852 */ { 1608418, -21643, -269,     0,    763,  -48},
+};
+
+/**
+ * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
+ */
+static inline int
+gk20a_volt_get_cvb_voltage(int speedo, int s_scale,
+		const struct cvb_coef *coef)
+{
+	int mv;
+
+	mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale);
+	mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0;
+	return mv;
+}
+
+/**
+ * cvb_t_mv =
+ * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
+ * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
+ */
+static inline int
+gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int t_scale,
+		const struct cvb_coef *coef)
+{
+	int cvb_mv, mv;
+
+	cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef);
+
+	mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 +
+		DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale);
+	mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv;
+	return mv;
+}
+
+static int
+gk20a_volt_calc_voltage(const struct cvb_coef *coef)
+{
+	int speedo, mv;
+
+	speedo = tegra_sku_info.gpu_speedo_value;
+
+	mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef);
+	mv = DIV_ROUND_UP(mv, 1000);
+
+	return mv * 1000;
+}
+
+static int
+gk20a_volt_vid_get(struct nouveau_volt *volt)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+	int i, uv;
+
+	uv = regulator_get_voltage(priv->vdd);
+
+	for (i = 0; i < volt->vid_nr; i++)
+		if (volt->vid[i].uv >= uv)
+			return i;
+
+	return -EINVAL;
+}
+
+static int
+gk20a_volt_vid_set(struct nouveau_volt *volt, u8 vid)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+
+	nv_debug(volt, "set voltage as %duv\n", volt->vid[vid].uv);
+	return regulator_set_voltage(priv->vdd, volt->vid[vid].uv, 1200000);
+}
+
+static int
+gk20a_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
+{
+	struct gk20a_volt_priv *priv = (void *)volt;
+	int prev_uv = regulator_get_voltage(priv->vdd);
+	int target_uv = volt->vid[id].uv;
+	int ret;
+
+	nv_debug(volt, "prev=%d, target=%d, condition=%d\n",
+			prev_uv, target_uv, condition);
+	if (!condition ||
+		(condition < 0 && target_uv < prev_uv) ||
+		(condition > 0 && target_uv > prev_uv)) {
+		ret = gk20a_volt_vid_set(volt, volt->vid[id].vid);
+	} else {
+		ret = 0;
+	}
+
+	return ret;
+}
+
+static int
+gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+	       struct nouveau_oclass *oclass, void *data, u32 size,
+	       struct nouveau_object **pobject)
+{
+	struct gk20a_volt_priv *priv;
+	struct nouveau_volt *volt;
+	struct nouveau_platform_device *plat;
+	int i, ret, uv;
+
+	ret = nouveau_volt_create(parent, engine, oclass, &priv);
+	*pobject = nv_object(priv);
+	if (ret)
+		return ret;
+
+	volt = &priv->base;
+
+	plat = nv_device_to_platform(nv_device(parent));
+
+	uv = regulator_get_voltage(plat->gpu->vdd);
+	nv_info(priv, "The default voltage is %duV\n", uv);
+
+	priv->vdd = plat->gpu->vdd;
+	priv->base.vid_get = gk20a_volt_vid_get;
+	priv->base.vid_set = gk20a_volt_vid_set;
+	priv->base.set_id = gk20a_volt_set_id;
+
+	volt->vid_nr = ARRAY_SIZE(gk20a_cvb_coef);
+	nv_debug(priv, "%s - vid_nr = %d\n", __func__, volt->vid_nr);
+	for (i = 0; i < volt->vid_nr; i++) {
+		volt->vid[i].vid = i;
+		volt->vid[i].uv = gk20a_volt_calc_voltage(&gk20a_cvb_coef[i]);
+		nv_debug(priv, "%2d: vid=%d, uv=%d\n", i, volt->vid[i].vid,
+					volt->vid[i].uv);
+	}
+
+	return 0;
+}
+
+struct nouveau_oclass
+gk20a_volt_oclass = {
+	.handle = NV_SUBDEV(VOLT, 0xea),
+	.ofuncs = &(struct nouveau_ofuncs) {
+		.ctor = gk20a_volt_ctor,
+		.dtor = _nouveau_volt_dtor,
+		.init = _nouveau_volt_init,
+		.fini = _nouveau_volt_fini,
+	},
+};
-- 
1.9.1

Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Roy Spliet]

Hello Vince,

One minor question inline.

Op 28-11-14 om 12:13 schreef Vince Hsu:
> The voltage value are calculated by the hardware characterized
> result.
>
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> ---
>
> Resend this patch with the fuse change and proper patch prefix
> per Thierry's request.
>
>   drm/Kbuild                   |   1 +
>   drm/core/subdev/volt/gk20a.c |   1 +
>   nvkm/engine/device/nve0.c    |   1 +
>   nvkm/include/subdev/volt.h   |   1 +
>   nvkm/subdev/clock/gk20a.c    |  15 ++++
>   nvkm/subdev/volt/gk20a.c     | 202 +++++++++++++++++++++++++++++++++++++++++++
>   6 files changed, 221 insertions(+)
>   create mode 120000 drm/core/subdev/volt/gk20a.c
>   create mode 100644 nvkm/subdev/volt/gk20a.c
>
> diff --git a/drm/Kbuild b/drm/Kbuild
> index 728bc5b66b29..7c49e6655066 100644
> --- a/drm/Kbuild
> +++ b/drm/Kbuild
> @@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
>   nouveau-y += core/subdev/volt/base.o
>   nouveau-y += core/subdev/volt/gpio.o
>   nouveau-y += core/subdev/volt/nv40.o
> +nouveau-y += core/subdev/volt/gk20a.o
>   
>   nouveau-y += core/engine/falcon.o
>   nouveau-y += core/engine/xtensa.o
> diff --git a/drm/core/subdev/volt/gk20a.c b/drm/core/subdev/volt/gk20a.c
> new file mode 120000
> index 000000000000..2894eb1ede13
> --- /dev/null
> +++ b/drm/core/subdev/volt/gk20a.c
> @@ -0,0 +1 @@
> +../../../../nvkm/subdev/volt/gk20a.c
> \ No newline at end of file
> diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
> index b1b2e484ecfa..674da1f095b2 100644
> --- a/nvkm/engine/device/nve0.c
> +++ b/nvkm/engine/device/nve0.c
> @@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
>   		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_graph_oclass;
>   		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
>   		device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
> +		device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
>   		break;
>   	case 0xf0:
>   		device->cname = "GK110";
> diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
> index 820b62ffd75b..67db5e58880d 100644
> --- a/nvkm/include/subdev/volt.h
> +++ b/nvkm/include/subdev/volt.h
> @@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
>   #define _nouveau_volt_fini _nouveau_subdev_fini
>   
>   extern struct nouveau_oclass nv40_volt_oclass;
> +extern struct nouveau_oclass gk20a_volt_oclass;
>   
>   int nouveau_voltgpio_init(struct nouveau_volt *);
>   int nouveau_voltgpio_get(struct nouveau_volt *);
> diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
> index 82abbea2be12..fb4fad374bdd 100644
> --- a/nvkm/subdev/clock/gk20a.c
> +++ b/nvkm/subdev/clock/gk20a.c
> @@ -470,76 +470,91 @@ gk20a_pstates[] = {
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 72000,
> +			.voltage = 0,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 108000,
> +			.voltage = 1,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 180000,
> +			.voltage = 2,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 252000,
> +			.voltage = 3,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 324000,
> +			.voltage = 4,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 396000,
> +			.voltage = 5,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 468000,
> +			.voltage = 6,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 540000,
> +			.voltage = 7,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 612000,
> +			.voltage = 8,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 648000,
> +			.voltage = 9,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 684000,
> +			.voltage = 10,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 708000,
> +			.voltage = 11,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 756000,
> +			.voltage = 12,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 804000,
> +			.voltage = 13,
>   		},
>   	},
>   	{
>   		.base = {
>   			.domain[nv_clk_src_gpc] = 852000,
> +			.voltage = 14,
>   		},
>   	},
>   };

Is there a particular reason why this table is hard-coded rather than 
stored in the device tree? It doesn't seem to differ much between 
different gk20a's (but this might change with the denver-core version?), 
but I do anticipate a lot of "code" duplication when post-K1 cores are 
released and supported.

> diff --git a/nvkm/subdev/volt/gk20a.c b/nvkm/subdev/volt/gk20a.c
> new file mode 100644
> index 000000000000..87385966e67f
> --- /dev/null
> +++ b/nvkm/subdev/volt/gk20a.c
> @@ -0,0 +1,202 @@
> +/*
> + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> + * DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/regulator/consumer.h>
> +#include <soc/tegra/fuse.h>
> +
> +#include <nouveau_platform.h>
> +#include <subdev/volt.h>
> +
> +struct cvb_coef {
> +	int c0;
> +	int c1;
> +	int c2;
> +	int c3;
> +	int c4;
> +	int c5;
> +};
> +
> +struct gk20a_volt_priv {
> +	struct nouveau_volt base;
> +	struct regulator *vdd;
> +};
> +
> +const struct cvb_coef gk20a_cvb_coef[] = {
> +	/* MHz,        c0,     c1,   c2,    c3,     c4,   c5 */
> +	/*  72 */ { 1209886, -36468,  515,   417, -13123,  203},
> +	/* 108 */ { 1130804, -27659,  296,   298, -10834,  221},
> +	/* 180 */ { 1162871, -27110,  247,   238, -10681,  268},
> +	/* 252 */ { 1220458, -28654,  247,   179, -10376,  298},
> +	/* 324 */ { 1280953, -30204,  247,   119,  -9766,  304},
> +	/* 396 */ { 1344547, -31777,  247,   119,  -8545,  292},
> +	/* 468 */ { 1420168, -34227,  269,    60,  -7172,  256},
> +	/* 540 */ { 1490757, -35955,  274,    60,  -5188,  197},
> +	/* 612 */ { 1599112, -42583,  398,     0,  -1831,  119},
> +	/* 648 */ { 1366986, -16459, -274,     0,  -3204,   72},
> +	/* 684 */ { 1391884, -17078, -274,   -60,  -1526,   30},
> +	/* 708 */ { 1415522, -17497, -274,   -60,   -458,    0},
> +	/* 756 */ { 1464061, -18331, -274,  -119,   1831,  -72},
> +	/* 804 */ { 1524225, -20064, -254,  -119,   4272, -155},
> +	/* 852 */ { 1608418, -21643, -269,     0,    763,  -48},
> +};
> +
> +/**
> + * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
> + */
> +static inline int
> +gk20a_volt_get_cvb_voltage(int speedo, int s_scale,
> +		const struct cvb_coef *coef)
> +{
> +	int mv;
> +
> +	mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale);
> +	mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0;
> +	return mv;
> +}
> +
> +/**
> + * cvb_t_mv =
> + * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
> + * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
> + */
> +static inline int
> +gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int t_scale,
> +		const struct cvb_coef *coef)
> +{
> +	int cvb_mv, mv;
> +
> +	cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef);
> +
> +	mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 +
> +		DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale);
> +	mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv;
> +	return mv;
> +}
> +
> +static int
> +gk20a_volt_calc_voltage(const struct cvb_coef *coef)
> +{
> +	int speedo, mv;
> +
> +	speedo = tegra_sku_info.gpu_speedo_value;
> +
> +	mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef);
> +	mv = DIV_ROUND_UP(mv, 1000);
> +
> +	return mv * 1000;
> +}
> +
> +static int
> +gk20a_volt_vid_get(struct nouveau_volt *volt)
> +{
> +	struct gk20a_volt_priv *priv = (void *)volt;
> +	int i, uv;
> +
> +	uv = regulator_get_voltage(priv->vdd);
> +
> +	for (i = 0; i < volt->vid_nr; i++)
> +		if (volt->vid[i].uv >= uv)
> +			return i;
> +
> +	return -EINVAL;
> +}
> +
> +static int
> +gk20a_volt_vid_set(struct nouveau_volt *volt, u8 vid)
> +{
> +	struct gk20a_volt_priv *priv = (void *)volt;
> +
> +	nv_debug(volt, "set voltage as %duv\n", volt->vid[vid].uv);
> +	return regulator_set_voltage(priv->vdd, volt->vid[vid].uv, 1200000);
> +}
> +
> +static int
> +gk20a_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
> +{
> +	struct gk20a_volt_priv *priv = (void *)volt;
> +	int prev_uv = regulator_get_voltage(priv->vdd);
> +	int target_uv = volt->vid[id].uv;
> +	int ret;
> +
> +	nv_debug(volt, "prev=%d, target=%d, condition=%d\n",
> +			prev_uv, target_uv, condition);
> +	if (!condition ||
> +		(condition < 0 && target_uv < prev_uv) ||
> +		(condition > 0 && target_uv > prev_uv)) {
> +		ret = gk20a_volt_vid_set(volt, volt->vid[id].vid);
> +	} else {
> +		ret = 0;
> +	}
> +
> +	return ret;
> +}
> +
> +static int
> +gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
> +	       struct nouveau_oclass *oclass, void *data, u32 size,
> +	       struct nouveau_object **pobject)
> +{
> +	struct gk20a_volt_priv *priv;
> +	struct nouveau_volt *volt;
> +	struct nouveau_platform_device *plat;
> +	int i, ret, uv;
> +
> +	ret = nouveau_volt_create(parent, engine, oclass, &priv);
> +	*pobject = nv_object(priv);
> +	if (ret)
> +		return ret;
> +
> +	volt = &priv->base;
> +
> +	plat = nv_device_to_platform(nv_device(parent));
> +
> +	uv = regulator_get_voltage(plat->gpu->vdd);
> +	nv_info(priv, "The default voltage is %duV\n", uv);
> +
> +	priv->vdd = plat->gpu->vdd;
> +	priv->base.vid_get = gk20a_volt_vid_get;
> +	priv->base.vid_set = gk20a_volt_vid_set;
> +	priv->base.set_id = gk20a_volt_set_id;
> +
> +	volt->vid_nr = ARRAY_SIZE(gk20a_cvb_coef);
> +	nv_debug(priv, "%s - vid_nr = %d\n", __func__, volt->vid_nr);
> +	for (i = 0; i < volt->vid_nr; i++) {
> +		volt->vid[i].vid = i;
> +		volt->vid[i].uv = gk20a_volt_calc_voltage(&gk20a_cvb_coef[i]);
> +		nv_debug(priv, "%2d: vid=%d, uv=%d\n", i, volt->vid[i].vid,
> +					volt->vid[i].uv);
> +	}
> +
> +	return 0;
> +}
> +
> +struct nouveau_oclass
> +gk20a_volt_oclass = {
> +	.handle = NV_SUBDEV(VOLT, 0xea),
> +	.ofuncs = &(struct nouveau_ofuncs) {
> +		.ctor = gk20a_volt_ctor,
> +		.dtor = _nouveau_volt_dtor,
> +		.init = _nouveau_volt_init,
> +		.fini = _nouveau_volt_fini,
> +	},
> +};

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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Vince Hsu]

Hi Roy,

On 11/28/2014 07:25 PM, Roy Spliet wrote:
> Hello Vince,
>
> One minor question inline.
>
> Op 28-11-14 om 12:13 schreef Vince Hsu:
>> The voltage value are calculated by the hardware characterized
>> result.
>>
>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
>> ---
>>
>> Resend this patch with the fuse change and proper patch prefix
>> per Thierry's request.
>>
>>   drm/Kbuild                   |   1 +
>>   drm/core/subdev/volt/gk20a.c |   1 +
>>   nvkm/engine/device/nve0.c    |   1 +
>>   nvkm/include/subdev/volt.h   |   1 +
>>   nvkm/subdev/clock/gk20a.c    |  15 ++++
>>   nvkm/subdev/volt/gk20a.c     | 202 
>> +++++++++++++++++++++++++++++++++++++++++++
>>   6 files changed, 221 insertions(+)
>>   create mode 120000 drm/core/subdev/volt/gk20a.c
>>   create mode 100644 nvkm/subdev/volt/gk20a.c
>>
>> diff --git a/drm/Kbuild b/drm/Kbuild
>> index 728bc5b66b29..7c49e6655066 100644
>> --- a/drm/Kbuild
>> +++ b/drm/Kbuild
>> @@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
>>   nouveau-y += core/subdev/volt/base.o
>>   nouveau-y += core/subdev/volt/gpio.o
>>   nouveau-y += core/subdev/volt/nv40.o
>> +nouveau-y += core/subdev/volt/gk20a.o
>>     nouveau-y += core/engine/falcon.o
>>   nouveau-y += core/engine/xtensa.o
>> diff --git a/drm/core/subdev/volt/gk20a.c b/drm/core/subdev/volt/gk20a.c
>> new file mode 120000
>> index 000000000000..2894eb1ede13
>> --- /dev/null
>> +++ b/drm/core/subdev/volt/gk20a.c
>> @@ -0,0 +1 @@
>> +../../../../nvkm/subdev/volt/gk20a.c
>> \ No newline at end of file
>> diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
>> index b1b2e484ecfa..674da1f095b2 100644
>> --- a/nvkm/engine/device/nve0.c
>> +++ b/nvkm/engine/device/nve0.c
>> @@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
>>           device->oclass[NVDEV_ENGINE_GR     ] = gk20a_graph_oclass;
>>           device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
>>           device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
>> +        device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
>>           break;
>>       case 0xf0:
>>           device->cname = "GK110";
>> diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
>> index 820b62ffd75b..67db5e58880d 100644
>> --- a/nvkm/include/subdev/volt.h
>> +++ b/nvkm/include/subdev/volt.h
>> @@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
>>   #define _nouveau_volt_fini _nouveau_subdev_fini
>>     extern struct nouveau_oclass nv40_volt_oclass;
>> +extern struct nouveau_oclass gk20a_volt_oclass;
>>     int nouveau_voltgpio_init(struct nouveau_volt *);
>>   int nouveau_voltgpio_get(struct nouveau_volt *);
>> diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
>> index 82abbea2be12..fb4fad374bdd 100644
>> --- a/nvkm/subdev/clock/gk20a.c
>> +++ b/nvkm/subdev/clock/gk20a.c
>> @@ -470,76 +470,91 @@ gk20a_pstates[] = {
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 72000,
>> +            .voltage = 0,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 108000,
>> +            .voltage = 1,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 180000,
>> +            .voltage = 2,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 252000,
>> +            .voltage = 3,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 324000,
>> +            .voltage = 4,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 396000,
>> +            .voltage = 5,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 468000,
>> +            .voltage = 6,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 540000,
>> +            .voltage = 7,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 612000,
>> +            .voltage = 8,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 648000,
>> +            .voltage = 9,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 684000,
>> +            .voltage = 10,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 708000,
>> +            .voltage = 11,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 756000,
>> +            .voltage = 12,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 804000,
>> +            .voltage = 13,
>>           },
>>       },
>>       {
>>           .base = {
>>               .domain[nv_clk_src_gpc] = 852000,
>> +            .voltage = 14,
>>           },
>>       },
>>   };
>
> Is there a particular reason why this table is hard-coded rather than 
> stored in the device tree? It doesn't seem to differ much between 
> different gk20a's (but this might change with the denver-core 
> version?), but I do anticipate a lot of "code" duplication when 
> post-K1 cores are released and supported.
Hmmm.. That's probably because I just realized we have some other 
example like the bios subdev is using the device tress stuff. The table 
is chip specific, not board specific. Should we put it in device tree?
And the table should be the same between all the gk20a's although there 
is no guarantee. If the post-K1 cores also integrate the gk20a, they 
should use the same driver including this file. If not, I believe we 
will have some clever way to handle that. That's unlikely to happen 
though. :)

Thanks,
Vince

>
>> diff --git a/nvkm/subdev/volt/gk20a.c b/nvkm/subdev/volt/gk20a.c
>> new file mode 100644
>> index 000000000000..87385966e67f
>> --- /dev/null
>> +++ b/nvkm/subdev/volt/gk20a.c
>> @@ -0,0 +1,202 @@
>> +/*
>> + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
>> + *
>> + * Permission is hereby granted, free of charge, to any person 
>> obtaining a
>> + * copy of this software and associated documentation files (the 
>> "Software"),
>> + * to deal in the Software without restriction, including without 
>> limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, 
>> sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom 
>> the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be 
>> included in
>> + * all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
>> EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
>> MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO 
>> EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES 
>> OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
>> ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
>> + * DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/regulator/consumer.h>
>> +#include <soc/tegra/fuse.h>
>> +
>> +#include <nouveau_platform.h>
>> +#include <subdev/volt.h>
>> +
>> +struct cvb_coef {
>> +    int c0;
>> +    int c1;
>> +    int c2;
>> +    int c3;
>> +    int c4;
>> +    int c5;
>> +};
>> +
>> +struct gk20a_volt_priv {
>> +    struct nouveau_volt base;
>> +    struct regulator *vdd;
>> +};
>> +
>> +const struct cvb_coef gk20a_cvb_coef[] = {
>> +    /* MHz,        c0,     c1,   c2,    c3,     c4,   c5 */
>> +    /*  72 */ { 1209886, -36468,  515,   417, -13123,  203},
>> +    /* 108 */ { 1130804, -27659,  296,   298, -10834,  221},
>> +    /* 180 */ { 1162871, -27110,  247,   238, -10681,  268},
>> +    /* 252 */ { 1220458, -28654,  247,   179, -10376,  298},
>> +    /* 324 */ { 1280953, -30204,  247,   119,  -9766,  304},
>> +    /* 396 */ { 1344547, -31777,  247,   119,  -8545,  292},
>> +    /* 468 */ { 1420168, -34227,  269,    60,  -7172,  256},
>> +    /* 540 */ { 1490757, -35955,  274,    60,  -5188,  197},
>> +    /* 612 */ { 1599112, -42583,  398,     0,  -1831,  119},
>> +    /* 648 */ { 1366986, -16459, -274,     0,  -3204,   72},
>> +    /* 684 */ { 1391884, -17078, -274,   -60,  -1526,   30},
>> +    /* 708 */ { 1415522, -17497, -274,   -60,   -458,    0},
>> +    /* 756 */ { 1464061, -18331, -274,  -119,   1831,  -72},
>> +    /* 804 */ { 1524225, -20064, -254,  -119,   4272, -155},
>> +    /* 852 */ { 1608418, -21643, -269,     0,    763,  -48},
>> +};
>> +
>> +/**
>> + * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
>> + */
>> +static inline int
>> +gk20a_volt_get_cvb_voltage(int speedo, int s_scale,
>> +        const struct cvb_coef *coef)
>> +{
>> +    int mv;
>> +
>> +    mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale);
>> +    mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + 
>> coef->c0;
>> +    return mv;
>> +}
>> +
>> +/**
>> + * cvb_t_mv =
>> + * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
>> + * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
>> + */
>> +static inline int
>> +gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int 
>> t_scale,
>> +        const struct cvb_coef *coef)
>> +{
>> +    int cvb_mv, mv;
>> +
>> +    cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef);
>> +
>> +    mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 +
>> +        DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale);
>> +    mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv;
>> +    return mv;
>> +}
>> +
>> +static int
>> +gk20a_volt_calc_voltage(const struct cvb_coef *coef)
>> +{
>> +    int speedo, mv;
>> +
>> +    speedo = tegra_sku_info.gpu_speedo_value;
>> +
>> +    mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef);
>> +    mv = DIV_ROUND_UP(mv, 1000);
>> +
>> +    return mv * 1000;
>> +}
>> +
>> +static int
>> +gk20a_volt_vid_get(struct nouveau_volt *volt)
>> +{
>> +    struct gk20a_volt_priv *priv = (void *)volt;
>> +    int i, uv;
>> +
>> +    uv = regulator_get_voltage(priv->vdd);
>> +
>> +    for (i = 0; i < volt->vid_nr; i++)
>> +        if (volt->vid[i].uv >= uv)
>> +            return i;
>> +
>> +    return -EINVAL;
>> +}
>> +
>> +static int
>> +gk20a_volt_vid_set(struct nouveau_volt *volt, u8 vid)
>> +{
>> +    struct gk20a_volt_priv *priv = (void *)volt;
>> +
>> +    nv_debug(volt, "set voltage as %duv\n", volt->vid[vid].uv);
>> +    return regulator_set_voltage(priv->vdd, volt->vid[vid].uv, 
>> 1200000);
>> +}
>> +
>> +static int
>> +gk20a_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
>> +{
>> +    struct gk20a_volt_priv *priv = (void *)volt;
>> +    int prev_uv = regulator_get_voltage(priv->vdd);
>> +    int target_uv = volt->vid[id].uv;
>> +    int ret;
>> +
>> +    nv_debug(volt, "prev=%d, target=%d, condition=%d\n",
>> +            prev_uv, target_uv, condition);
>> +    if (!condition ||
>> +        (condition < 0 && target_uv < prev_uv) ||
>> +        (condition > 0 && target_uv > prev_uv)) {
>> +        ret = gk20a_volt_vid_set(volt, volt->vid[id].vid);
>> +    } else {
>> +        ret = 0;
>> +    }
>> +
>> +    return ret;
>> +}
>> +
>> +static int
>> +gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object 
>> *engine,
>> +           struct nouveau_oclass *oclass, void *data, u32 size,
>> +           struct nouveau_object **pobject)
>> +{
>> +    struct gk20a_volt_priv *priv;
>> +    struct nouveau_volt *volt;
>> +    struct nouveau_platform_device *plat;
>> +    int i, ret, uv;
>> +
>> +    ret = nouveau_volt_create(parent, engine, oclass, &priv);
>> +    *pobject = nv_object(priv);
>> +    if (ret)
>> +        return ret;
>> +
>> +    volt = &priv->base;
>> +
>> +    plat = nv_device_to_platform(nv_device(parent));
>> +
>> +    uv = regulator_get_voltage(plat->gpu->vdd);
>> +    nv_info(priv, "The default voltage is %duV\n", uv);
>> +
>> +    priv->vdd = plat->gpu->vdd;
>> +    priv->base.vid_get = gk20a_volt_vid_get;
>> +    priv->base.vid_set = gk20a_volt_vid_set;
>> +    priv->base.set_id = gk20a_volt_set_id;
>> +
>> +    volt->vid_nr = ARRAY_SIZE(gk20a_cvb_coef);
>> +    nv_debug(priv, "%s - vid_nr = %d\n", __func__, volt->vid_nr);
>> +    for (i = 0; i < volt->vid_nr; i++) {
>> +        volt->vid[i].vid = i;
>> +        volt->vid[i].uv = gk20a_volt_calc_voltage(&gk20a_cvb_coef[i]);
>> +        nv_debug(priv, "%2d: vid=%d, uv=%d\n", i, volt->vid[i].vid,
>> +                    volt->vid[i].uv);
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>> +struct nouveau_oclass
>> +gk20a_volt_oclass = {
>> +    .handle = NV_SUBDEV(VOLT, 0xea),
>> +    .ofuncs = &(struct nouveau_ofuncs) {
>> +        .ctor = gk20a_volt_ctor,
>> +        .dtor = _nouveau_volt_dtor,
>> +        .init = _nouveau_volt_init,
>> +        .fini = _nouveau_volt_fini,
>> +    },
>> +};
>
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> Nouveau@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/nouveau


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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Roy Spliet]

Hello Vince,

Op 28-11-14 om 12:57 schreef Vince Hsu:
> Hi Roy,
>
> On 11/28/2014 07:25 PM, Roy Spliet wrote:
>> Hello Vince,
>>
>> One minor question inline.
>>
>> Op 28-11-14 om 12:13 schreef Vince Hsu:
>>> The voltage value are calculated by the hardware characterized
>>> result.
>>>
>>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
>>> ---
>>>
>>> Resend this patch with the fuse change and proper patch prefix
>>> per Thierry's request.
>>>
>>>   drm/Kbuild                   |   1 +
>>>   drm/core/subdev/volt/gk20a.c |   1 +
>>>   nvkm/engine/device/nve0.c    |   1 +
>>>   nvkm/include/subdev/volt.h   |   1 +
>>>   nvkm/subdev/clock/gk20a.c    |  15 ++++
>>>   nvkm/subdev/volt/gk20a.c     | 202 
>>> +++++++++++++++++++++++++++++++++++++++++++
>>>   6 files changed, 221 insertions(+)
>>>   create mode 120000 drm/core/subdev/volt/gk20a.c
>>>   create mode 100644 nvkm/subdev/volt/gk20a.c
>>>
>>> diff --git a/drm/Kbuild b/drm/Kbuild
>>> index 728bc5b66b29..7c49e6655066 100644
>>> --- a/drm/Kbuild
>>> +++ b/drm/Kbuild
>>> @@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
>>>   nouveau-y += core/subdev/volt/base.o
>>>   nouveau-y += core/subdev/volt/gpio.o
>>>   nouveau-y += core/subdev/volt/nv40.o
>>> +nouveau-y += core/subdev/volt/gk20a.o
>>>     nouveau-y += core/engine/falcon.o
>>>   nouveau-y += core/engine/xtensa.o
>>> diff --git a/drm/core/subdev/volt/gk20a.c 
>>> b/drm/core/subdev/volt/gk20a.c
>>> new file mode 120000
>>> index 000000000000..2894eb1ede13
>>> --- /dev/null
>>> +++ b/drm/core/subdev/volt/gk20a.c
>>> @@ -0,0 +1 @@
>>> +../../../../nvkm/subdev/volt/gk20a.c
>>> \ No newline at end of file
>>> diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
>>> index b1b2e484ecfa..674da1f095b2 100644
>>> --- a/nvkm/engine/device/nve0.c
>>> +++ b/nvkm/engine/device/nve0.c
>>> @@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
>>>           device->oclass[NVDEV_ENGINE_GR     ] = gk20a_graph_oclass;
>>>           device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
>>>           device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
>>> +        device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
>>>           break;
>>>       case 0xf0:
>>>           device->cname = "GK110";
>>> diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
>>> index 820b62ffd75b..67db5e58880d 100644
>>> --- a/nvkm/include/subdev/volt.h
>>> +++ b/nvkm/include/subdev/volt.h
>>> @@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
>>>   #define _nouveau_volt_fini _nouveau_subdev_fini
>>>     extern struct nouveau_oclass nv40_volt_oclass;
>>> +extern struct nouveau_oclass gk20a_volt_oclass;
>>>     int nouveau_voltgpio_init(struct nouveau_volt *);
>>>   int nouveau_voltgpio_get(struct nouveau_volt *);
>>> diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
>>> index 82abbea2be12..fb4fad374bdd 100644
>>> --- a/nvkm/subdev/clock/gk20a.c
>>> +++ b/nvkm/subdev/clock/gk20a.c
>>> @@ -470,76 +470,91 @@ gk20a_pstates[] = {
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 72000,
>>> +            .voltage = 0,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 108000,
>>> +            .voltage = 1,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 180000,
>>> +            .voltage = 2,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 252000,
>>> +            .voltage = 3,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 324000,
>>> +            .voltage = 4,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 396000,
>>> +            .voltage = 5,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 468000,
>>> +            .voltage = 6,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 540000,
>>> +            .voltage = 7,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 612000,
>>> +            .voltage = 8,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 648000,
>>> +            .voltage = 9,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 684000,
>>> +            .voltage = 10,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 708000,
>>> +            .voltage = 11,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 756000,
>>> +            .voltage = 12,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 804000,
>>> +            .voltage = 13,
>>>           },
>>>       },
>>>       {
>>>           .base = {
>>>               .domain[nv_clk_src_gpc] = 852000,
>>> +            .voltage = 14,
>>>           },
>>>       },
>>>   };
>>
>> Is there a particular reason why this table is hard-coded rather than 
>> stored in the device tree? It doesn't seem to differ much between 
>> different gk20a's (but this might change with the denver-core 
>> version?), but I do anticipate a lot of "code" duplication when 
>> post-K1 cores are released and supported.
> Hmmm.. That's probably because I just realized we have some other 
> example like the bios subdev is using the device tress stuff. The 
> table is chip specific, not board specific. Should we put it in device 
> tree?
> And the table should be the same between all the gk20a's although 
> there is no guarantee. If the post-K1 cores also integrate the gk20a, 
> they should use the same driver including this file. If not, I believe 
> we will have some clever way to handle that. That's unlikely to happen 
> though. :)
>
> Thanks,
> Vince

I'm not sure if I completely understand your reply, so forgive me if I 
am stating some obvious things:
The reason why I brought this up is because, the way I see it, DTS is 
the replacement for (V)BIOS on ARM platforms, giving a set of parameters 
that drivers (nouveau) can use for that particular instance (the Tegra 
K1 SoC) of some more generic IP (gk20a). All the other devices nouveau 
supports have a VBIOS to describe this kind of information to us, hence 
we haven't seen this before. For CPUs there are plenty of examples 
though of such params defined in DT: in arch/arm/boot/dts/ : 
imx6qdl.dtsi documents the min and max volt for regulators, while the 
CPUs have a little freq<->volt mapping in imx6q.dtsi. GPUs are new in a 
sense that NVIDIA is the first to actively support upstream development 
(thanks!)
Secondly, we should keep in mind that DT is not tied to Linux; I believe 
Linaro's long term goal is to take the DT from the Linux tree and 
maintain it as a separate tree, to be used with U-boot, *BSD, maybe even 
Windows. These kind of parameters are not very platform-dependent and 
although they seem like a little detail that's easy to reproduce on 
every platform, looking at the sheer size of the VBIOS data that could 
mean a *lot* of duplication.
I bring this up not because I think I know better, but rather because I 
believe it's a good discussion to have now that there still is little 
legacy on ARM SoCs in nouveau. DTS is still a work-in-progress, and at 
this moment we have the opportunity to consider what needs to be 
documented in there and what doesn't. I would actually love to hear 
other, more experienced developers chime in as well (Rob Clark? Ben 
Skeggs? Linaro folks?) and see how they feel.
Cheers,

Roy
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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Alexandre Courbot]

Hi Roy,

On Fri, Nov 28, 2014 at 9:09 PM, Roy Spliet <seven@nimrod-online.com> wrote:
> Hello Vince,
>
> Op 28-11-14 om 12:57 schreef Vince Hsu:
>
>> Hi Roy,
>>
>> On 11/28/2014 07:25 PM, Roy Spliet wrote:
>>>
>>> Hello Vince,
>>>
>>> One minor question inline.
>>>
>>> Op 28-11-14 om 12:13 schreef Vince Hsu:
>>>>
>>>> The voltage value are calculated by the hardware characterized
>>>> result.
>>>>
>>>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
>>>> ---
>>>>
>>>> Resend this patch with the fuse change and proper patch prefix
>>>> per Thierry's request.
>>>>
>>>>   drm/Kbuild                   |   1 +
>>>>   drm/core/subdev/volt/gk20a.c |   1 +
>>>>   nvkm/engine/device/nve0.c    |   1 +
>>>>   nvkm/include/subdev/volt.h   |   1 +
>>>>   nvkm/subdev/clock/gk20a.c    |  15 ++++
>>>>   nvkm/subdev/volt/gk20a.c     | 202
>>>> +++++++++++++++++++++++++++++++++++++++++++
>>>>   6 files changed, 221 insertions(+)
>>>>   create mode 120000 drm/core/subdev/volt/gk20a.c
>>>>   create mode 100644 nvkm/subdev/volt/gk20a.c
>>>>
>>>> diff --git a/drm/Kbuild b/drm/Kbuild
>>>> index 728bc5b66b29..7c49e6655066 100644
>>>> --- a/drm/Kbuild
>>>> +++ b/drm/Kbuild
>>>> @@ -225,6 +225,7 @@ nouveau-y += core/subdev/vm/nvc0.o
>>>>   nouveau-y += core/subdev/volt/base.o
>>>>   nouveau-y += core/subdev/volt/gpio.o
>>>>   nouveau-y += core/subdev/volt/nv40.o
>>>> +nouveau-y += core/subdev/volt/gk20a.o
>>>>     nouveau-y += core/engine/falcon.o
>>>>   nouveau-y += core/engine/xtensa.o
>>>> diff --git a/drm/core/subdev/volt/gk20a.c b/drm/core/subdev/volt/gk20a.c
>>>> new file mode 120000
>>>> index 000000000000..2894eb1ede13
>>>> --- /dev/null
>>>> +++ b/drm/core/subdev/volt/gk20a.c
>>>> @@ -0,0 +1 @@
>>>> +../../../../nvkm/subdev/volt/gk20a.c
>>>> \ No newline at end of file
>>>> diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c
>>>> index b1b2e484ecfa..674da1f095b2 100644
>>>> --- a/nvkm/engine/device/nve0.c
>>>> +++ b/nvkm/engine/device/nve0.c
>>>> @@ -179,6 +179,7 @@ nve0_identify(struct nouveau_device *device)
>>>>           device->oclass[NVDEV_ENGINE_GR     ] = gk20a_graph_oclass;
>>>>           device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
>>>>           device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
>>>> +        device->oclass[NVDEV_SUBDEV_VOLT   ] = &gk20a_volt_oclass;
>>>>           break;
>>>>       case 0xf0:
>>>>           device->cname = "GK110";
>>>> diff --git a/nvkm/include/subdev/volt.h b/nvkm/include/subdev/volt.h
>>>> index 820b62ffd75b..67db5e58880d 100644
>>>> --- a/nvkm/include/subdev/volt.h
>>>> +++ b/nvkm/include/subdev/volt.h
>>>> @@ -52,6 +52,7 @@ int  _nouveau_volt_init(struct nouveau_object *);
>>>>   #define _nouveau_volt_fini _nouveau_subdev_fini
>>>>     extern struct nouveau_oclass nv40_volt_oclass;
>>>> +extern struct nouveau_oclass gk20a_volt_oclass;
>>>>     int nouveau_voltgpio_init(struct nouveau_volt *);
>>>>   int nouveau_voltgpio_get(struct nouveau_volt *);
>>>> diff --git a/nvkm/subdev/clock/gk20a.c b/nvkm/subdev/clock/gk20a.c
>>>> index 82abbea2be12..fb4fad374bdd 100644
>>>> --- a/nvkm/subdev/clock/gk20a.c
>>>> +++ b/nvkm/subdev/clock/gk20a.c
>>>> @@ -470,76 +470,91 @@ gk20a_pstates[] = {
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 72000,
>>>> +            .voltage = 0,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 108000,
>>>> +            .voltage = 1,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 180000,
>>>> +            .voltage = 2,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 252000,
>>>> +            .voltage = 3,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 324000,
>>>> +            .voltage = 4,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 396000,
>>>> +            .voltage = 5,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 468000,
>>>> +            .voltage = 6,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 540000,
>>>> +            .voltage = 7,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 612000,
>>>> +            .voltage = 8,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 648000,
>>>> +            .voltage = 9,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 684000,
>>>> +            .voltage = 10,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 708000,
>>>> +            .voltage = 11,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 756000,
>>>> +            .voltage = 12,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 804000,
>>>> +            .voltage = 13,
>>>>           },
>>>>       },
>>>>       {
>>>>           .base = {
>>>>               .domain[nv_clk_src_gpc] = 852000,
>>>> +            .voltage = 14,
>>>>           },
>>>>       },
>>>>   };
>>>
>>>
>>> Is there a particular reason why this table is hard-coded rather than
>>> stored in the device tree? It doesn't seem to differ much between different
>>> gk20a's (but this might change with the denver-core version?), but I do
>>> anticipate a lot of "code" duplication when post-K1 cores are released and
>>> supported.
>>
>> Hmmm.. That's probably because I just realized we have some other example
>> like the bios subdev is using the device tress stuff. The table is chip
>> specific, not board specific. Should we put it in device tree?
>> And the table should be the same between all the gk20a's although there is
>> no guarantee. If the post-K1 cores also integrate the gk20a, they should use
>> the same driver including this file. If not, I believe we will have some
>> clever way to handle that. That's unlikely to happen though. :)
>>
>> Thanks,
>> Vince
>
>
> I'm not sure if I completely understand your reply, so forgive me if I am
> stating some obvious things:
> The reason why I brought this up is because, the way I see it, DTS is the
> replacement for (V)BIOS on ARM platforms, giving a set of parameters that
> drivers (nouveau) can use for that particular instance (the Tegra K1 SoC) of
> some more generic IP (gk20a). All the other devices nouveau supports have a
> VBIOS to describe this kind of information to us, hence we haven't seen this
> before. For CPUs there are plenty of examples though of such params defined
> in DT: in arch/arm/boot/dts/ : imx6qdl.dtsi documents the min and max volt
> for regulators, while the CPUs have a little freq<->volt mapping in
> imx6q.dtsi. GPUs are new in a sense that NVIDIA is the first to actively
> support upstream development (thanks!)
> Secondly, we should keep in mind that DT is not tied to Linux; I believe
> Linaro's long term goal is to take the DT from the Linux tree and maintain
> it as a separate tree, to be used with U-boot, *BSD, maybe even Windows.
> These kind of parameters are not very platform-dependent and although they
> seem like a little detail that's easy to reproduce on every platform,
> looking at the sheer size of the VBIOS data that could mean a *lot* of
> duplication.
> I bring this up not because I think I know better, but rather because I
> believe it's a good discussion to have now that there still is little legacy
> on ARM SoCs in nouveau. DTS is still a work-in-progress, and at this moment
> we have the opportunity to consider what needs to be documented in there and
> what doesn't. I would actually love to hear other, more experienced
> developers chime in as well (Rob Clark? Ben Skeggs? Linaro folks?) and see
> how they feel.

Thanks for raising this point. I agree with your interpretation that
DT is comparable to the VBIOS in desktop GPUs. The question then
becomes whether this data can vary between different GK20A-using
boards (and in this case this should probably be part of DT) or not
(in which case I would advocate having this static information in the
driver itself). Since I don't expect different GK20A-using chips to
require different voltage for given frequencies, my gut feeling for
the moment is that having this information in the driver is fine. I
have added a few other NVIDIA people to gather thoughts.

IIUC this question also applies to other tables in this patch that
depend on frequency, like gk20a_cvb_coef. Huge tables of data are
generally frowned-upon by the DT folks, but there are already examples
of this (see for instance
http://article.gmane.org/gmane.linux.kernel/1831719 ).
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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Terje Bergström]

On 29.11.2014 10:44, Alexandre Courbot wrote:
> On Fri, Nov 28, 2014 at 9:09 PM, Roy Spliet <seven@nimrod-online.com> wrote:
>> I'm not sure if I completely understand your reply, so forgive me if I am
>> stating some obvious things:
>> The reason why I brought this up is because, the way I see it, DTS is the
>> replacement for (V)BIOS on ARM platforms, giving a set of parameters that
>> drivers (nouveau) can use for that particular instance (the Tegra K1 SoC) of
>> some more generic IP (gk20a). All the other devices nouveau supports have a
>> VBIOS to describe this kind of information to us, hence we haven't seen this
>> before. For CPUs there are plenty of examples though of such params defined
>> in DT: in arch/arm/boot/dts/ : imx6qdl.dtsi documents the min and max volt
>> for regulators, while the CPUs have a little freq<->volt mapping in
>> imx6q.dtsi. GPUs are new in a sense that NVIDIA is the first to actively
>> support upstream development (thanks!)
> Thanks for raising this point. I agree with your interpretation that
> DT is comparable to the VBIOS in desktop GPUs. The question then
> becomes whether this data can vary between different GK20A-using
> boards (and in this case this should probably be part of DT) or not
> (in which case I would advocate having this static information in the
> driver itself). Since I don't expect different GK20A-using chips to
> require different voltage for given frequencies, my gut feeling for
> the moment is that having this information in the driver is fine. I
> have added a few other NVIDIA people to gather thoughts.

The voltage<->frequency relationship is per chip, not per board. We read
the chip id at runtime, and programmatically determine the DVFS steps
based on that. CVB table contains the parameters for the algorithm.

I think the table belongs in the driver. The table is not per board, and
the values in CVB table do not describe hardware, but parameters to an
algorithm.

Terje

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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Alexandre Courbot]

On Mon, Dec 1, 2014 at 3:38 PM, Terje Bergström <tbergstrom@nvidia.com> wrote:
> On 29.11.2014 10:44, Alexandre Courbot wrote:
>> On Fri, Nov 28, 2014 at 9:09 PM, Roy Spliet <seven@nimrod-online.com> wrote:
>>> I'm not sure if I completely understand your reply, so forgive me if I am
>>> stating some obvious things:
>>> The reason why I brought this up is because, the way I see it, DTS is the
>>> replacement for (V)BIOS on ARM platforms, giving a set of parameters that
>>> drivers (nouveau) can use for that particular instance (the Tegra K1 SoC) of
>>> some more generic IP (gk20a). All the other devices nouveau supports have a
>>> VBIOS to describe this kind of information to us, hence we haven't seen this
>>> before. For CPUs there are plenty of examples though of such params defined
>>> in DT: in arch/arm/boot/dts/ : imx6qdl.dtsi documents the min and max volt
>>> for regulators, while the CPUs have a little freq<->volt mapping in
>>> imx6q.dtsi. GPUs are new in a sense that NVIDIA is the first to actively
>>> support upstream development (thanks!)
>> Thanks for raising this point. I agree with your interpretation that
>> DT is comparable to the VBIOS in desktop GPUs. The question then
>> becomes whether this data can vary between different GK20A-using
>> boards (and in this case this should probably be part of DT) or not
>> (in which case I would advocate having this static information in the
>> driver itself). Since I don't expect different GK20A-using chips to
>> require different voltage for given frequencies, my gut feeling for
>> the moment is that having this information in the driver is fine. I
>> have added a few other NVIDIA people to gather thoughts.
>
> The voltage<->frequency relationship is per chip, not per board. We read
> the chip id at runtime, and programmatically determine the DVFS steps
> based on that. CVB table contains the parameters for the algorithm.
>
> I think the table belongs in the driver. The table is not per board, and
> the values in CVB table do not describe hardware, but parameters to an
> algorithm.

In that case I also think it would make more sense (and make things
easier) to have these tables in the driver. Roy, do you have any
objection?
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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Alexandre Courbot]

On Mon, Dec 1, 2014 at 3:48 PM, Alexandre Courbot <gnurou@gmail.com> wrote:
> On Mon, Dec 1, 2014 at 3:38 PM, Terje Bergström <tbergstrom@nvidia.com> wrote:
>> On 29.11.2014 10:44, Alexandre Courbot wrote:
>>> On Fri, Nov 28, 2014 at 9:09 PM, Roy Spliet <seven@nimrod-online.com> wrote:
>>>> I'm not sure if I completely understand your reply, so forgive me if I am
>>>> stating some obvious things:
>>>> The reason why I brought this up is because, the way I see it, DTS is the
>>>> replacement for (V)BIOS on ARM platforms, giving a set of parameters that
>>>> drivers (nouveau) can use for that particular instance (the Tegra K1 SoC) of
>>>> some more generic IP (gk20a). All the other devices nouveau supports have a
>>>> VBIOS to describe this kind of information to us, hence we haven't seen this
>>>> before. For CPUs there are plenty of examples though of such params defined
>>>> in DT: in arch/arm/boot/dts/ : imx6qdl.dtsi documents the min and max volt
>>>> for regulators, while the CPUs have a little freq<->volt mapping in
>>>> imx6q.dtsi. GPUs are new in a sense that NVIDIA is the first to actively
>>>> support upstream development (thanks!)
>>> Thanks for raising this point. I agree with your interpretation that
>>> DT is comparable to the VBIOS in desktop GPUs. The question then
>>> becomes whether this data can vary between different GK20A-using
>>> boards (and in this case this should probably be part of DT) or not
>>> (in which case I would advocate having this static information in the
>>> driver itself). Since I don't expect different GK20A-using chips to
>>> require different voltage for given frequencies, my gut feeling for
>>> the moment is that having this information in the driver is fine. I
>>> have added a few other NVIDIA people to gather thoughts.
>>
>> The voltage<->frequency relationship is per chip, not per board. We read
>> the chip id at runtime, and programmatically determine the DVFS steps
>> based on that. CVB table contains the parameters for the algorithm.
>>
>> I think the table belongs in the driver. The table is not per board, and
>> the values in CVB table do not describe hardware, but parameters to an
>> algorithm.
>
> In that case I also think it would make more sense (and make things
> easier) to have these tables in the driver. Roy, do you have any
> objection?

Mmm, re-reading your reply I realize you only mention the CVB table.
But since the CVB and frequencies must match anyway, I suppose it
applies to the frequencies table as well, am I correct?
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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Terje Bergström]

On 01.12.2014 08:52, Alexandre Courbot wrote:
> On Mon, Dec 1, 2014 at 3:48 PM, Alexandre Courbot <gnurou@gmail.com> wrote:
>> On Mon, Dec 1, 2014 at 3:38 PM, Terje Bergström <tbergstrom@nvidia.com> wrote:
>>> On 29.11.2014 10:44, Alexandre Courbot wrote:
>>> The voltage<->frequency relationship is per chip, not per board. We read
>>> the chip id at runtime, and programmatically determine the DVFS steps
>>> based on that. CVB table contains the parameters for the algorithm.
>>>
>>> I think the table belongs in the driver. The table is not per board, and
>>> the values in CVB table do not describe hardware, but parameters to an
>>> algorithm.
>>
>> In that case I also think it would make more sense (and make things
>> easier) to have these tables in the driver. Roy, do you have any
>> objection?
> 
> Mmm, re-reading your reply I realize you only mention the CVB table.
> But since the CVB and frequencies must match anyway, I suppose it
> applies to the frequencies table as well, am I correct?

Yes, freq<->voltage relationships are per chip, so I meant all
parameters used for figuring out DVFS steps.

Terje

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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Roy Spliet]

Op 01-12-14 om 07:48 schreef Alexandre Courbot:
> On Mon, Dec 1, 2014 at 3:38 PM, Terje Bergström <tbergstrom@nvidia.com> wrote:
>> On 29.11.2014 10:44, Alexandre Courbot wrote:
>>> On Fri, Nov 28, 2014 at 9:09 PM, Roy Spliet <seven@nimrod-online.com> wrote:
>>>> I'm not sure if I completely understand your reply, so forgive me if I am
>>>> stating some obvious things:
>>>> The reason why I brought this up is because, the way I see it, DTS is the
>>>> replacement for (V)BIOS on ARM platforms, giving a set of parameters that
>>>> drivers (nouveau) can use for that particular instance (the Tegra K1 SoC) of
>>>> some more generic IP (gk20a). All the other devices nouveau supports have a
>>>> VBIOS to describe this kind of information to us, hence we haven't seen this
>>>> before. For CPUs there are plenty of examples though of such params defined
>>>> in DT: in arch/arm/boot/dts/ : imx6qdl.dtsi documents the min and max volt
>>>> for regulators, while the CPUs have a little freq<->volt mapping in
>>>> imx6q.dtsi. GPUs are new in a sense that NVIDIA is the first to actively
>>>> support upstream development (thanks!)
>>> Thanks for raising this point. I agree with your interpretation that
>>> DT is comparable to the VBIOS in desktop GPUs. The question then
>>> becomes whether this data can vary between different GK20A-using
>>> boards (and in this case this should probably be part of DT) or not
>>> (in which case I would advocate having this static information in the
>>> driver itself). Since I don't expect different GK20A-using chips to
>>> require different voltage for given frequencies, my gut feeling for
>>> the moment is that having this information in the driver is fine. I
>>> have added a few other NVIDIA people to gather thoughts.
>> The voltage<->frequency relationship is per chip, not per board. We read
>> the chip id at runtime, and programmatically determine the DVFS steps
>> based on that. CVB table contains the parameters for the algorithm.
>>
>> I think the table belongs in the driver. The table is not per board, and
>> the values in CVB table do not describe hardware, but parameters to an
>> algorithm.
> In that case I also think it would make more sense (and make things
> easier) to have these tables in the driver. Roy, do you have any
> objection?
>
If the table is per-chip, then I certainly agree!
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Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Martin Peres]

On 28/11/2014 12:13, Vince Hsu wrote:
> The voltage value are calculated by the hardware characterized
> result.
>
> Signed-off-by: Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>
> Resend this patch with the fuse change and proper patch prefix
> per Thierry's request.
Since the voltage table really is per-chipset, it would be insane
to add that to the DT. If it was not the case, it is still easier to
move to the DT instead of doing the opposite.

Acked-by: Martin Peres <martin.peres-GANU6spQydw@public.gmane.org>

Re: [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Martin Peres]

On 28/11/2014 12:13, Vince Hsu wrote:
> The voltage value are calculated by the hardware characterized
> result.
>
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> ---
>
> Resend this patch with the fuse change and proper patch prefix
> per Thierry's request.
Since the voltage table really is per-chipset, it would be insane
to add that to the DT. If it was not the case, it is still easier to
move to the DT instead of doing the opposite.

Acked-by: Martin Peres <martin.peres@free.fr>

Re: [Nouveau] [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Ben Skeggs]

On Tue, Dec 2, 2014 at 9:00 AM, Martin Peres <martin.peres-GANU6spQydw@public.gmane.org> wrote:
> On 28/11/2014 12:13, Vince Hsu wrote:
>>
>> The voltage value are calculated by the hardware characterized
>> result.
>>
>> Signed-off-by: Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>
>> Resend this patch with the fuse change and proper patch prefix
>> per Thierry's request.
>
> Since the voltage table really is per-chipset, it would be insane
> to add that to the DT. If it was not the case, it is still easier to
> move to the DT instead of doing the opposite.
>
One thing that needs fixing is that this breaks the build on non-tegra arches.

> Acked-by: Martin Peres <martin.peres-GANU6spQydw@public.gmane.org>
>
> _______________________________________________
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> http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [Nouveau] [RESEND PATCH nouveau 3/3] volt: add support for GK20A

[Ben Skeggs]

On Tue, Dec 2, 2014 at 9:00 AM, Martin Peres <martin.peres@free.fr> wrote:
> On 28/11/2014 12:13, Vince Hsu wrote:
>>
>> The voltage value are calculated by the hardware characterized
>> result.
>>
>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
>> ---
>>
>> Resend this patch with the fuse change and proper patch prefix
>> per Thierry's request.
>
> Since the voltage table really is per-chipset, it would be insane
> to add that to the DT. If it was not the case, it is still easier to
> move to the DT instead of doing the opposite.
>
One thing that needs fixing is that this breaks the build on non-tegra arches.

> Acked-by: Martin Peres <martin.peres@free.fr>
>
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> Nouveau@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Alexandre Courbot]

On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
> Some Tegra drivers might be complied as kernel modules, and
> they need the fuse information for initialization. One
> example is the GK20A Nouveau driver. It needs the GPU speedo
> value to calculate frequency-voltage table. So export
> the tegra_sku_info.

Acked-by: Alexandre Courbot <acourbot@nvidia.com>

This is required for setting the optimal GPU voltage in Nouveau.
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Re: [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Alexandre Courbot]

On Fri, Nov 28, 2014 at 8:12 PM, Vince Hsu <vinceh@nvidia.com> wrote:
> Some Tegra drivers might be complied as kernel modules, and
> they need the fuse information for initialization. One
> example is the GK20A Nouveau driver. It needs the GPU speedo
> value to calculate frequency-voltage table. So export
> the tegra_sku_info.

Acked-by: Alexandre Courbot <acourbot@nvidia.com>

This is required for setting the optimal GPU voltage in Nouveau.

Re: [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 1222 bytes --]

I think the subject doesn't need "for module use" because that's
implicit in exporting a symbol.

On Fri, Nov 28, 2014 at 07:12:58PM +0800, Vince Hsu wrote:
> Some Tegra drivers might be complied as kernel modules, and

"compiled"

> they need the fuse information for initialization. One
> example is the GK20A Nouveau driver. It needs the GPU speedo
> value to calculate frequency-voltage table. So export
> the tegra_sku_info.

Also please wrap the commit message at around 72 characters. If you make
the lines too short it becomes almost as difficult to readable as if
they're too long.

Other than these small nitpicks this looks like a reasonable change to
me.

> 
> Signed-off-by: Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> 
> v2: add more description why we need this patch
> 
>  drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
>  1 file changed, 1 insertion(+)

Ben, patch 3/3 has a dependency on this one. Would you prefer to merge
this as part of the Nouveau tree or do you want me to provide a stable
branch that you can pull in to resolve the dependency?

In case of the former:

Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

[-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --]

Re: [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 1164 bytes --]

I think the subject doesn't need "for module use" because that's
implicit in exporting a symbol.

On Fri, Nov 28, 2014 at 07:12:58PM +0800, Vince Hsu wrote:
> Some Tegra drivers might be complied as kernel modules, and

"compiled"

> they need the fuse information for initialization. One
> example is the GK20A Nouveau driver. It needs the GPU speedo
> value to calculate frequency-voltage table. So export
> the tegra_sku_info.

Also please wrap the commit message at around 72 characters. If you make
the lines too short it becomes almost as difficult to readable as if
they're too long.

Other than these small nitpicks this looks like a reasonable change to
me.

> 
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> ---
> 
> v2: add more description why we need this patch
> 
>  drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
>  1 file changed, 1 insertion(+)

Ben, patch 3/3 has a dependency on this one. Would you prefer to merge
this as part of the Nouveau tree or do you want me to provide a stable
branch that you can pull in to resolve the dependency?

In case of the former:

Acked-by: Thierry Reding <treding@nvidia.com>

[-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --]

Re: [Nouveau] [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Ben Skeggs]

On Mon, Dec 1, 2014 at 8:01 PM, Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> I think the subject doesn't need "for module use" because that's
> implicit in exporting a symbol.
>
> On Fri, Nov 28, 2014 at 07:12:58PM +0800, Vince Hsu wrote:
>> Some Tegra drivers might be complied as kernel modules, and
>
> "compiled"
>
>> they need the fuse information for initialization. One
>> example is the GK20A Nouveau driver. It needs the GPU speedo
>> value to calculate frequency-voltage table. So export
>> the tegra_sku_info.
>
> Also please wrap the commit message at around 72 characters. If you make
> the lines too short it becomes almost as difficult to readable as if
> they're too long.
>
> Other than these small nitpicks this looks like a reasonable change to
> me.
>
>>
>> Signed-off-by: Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>
>> v2: add more description why we need this patch
>>
>>  drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
>>  1 file changed, 1 insertion(+)
>
> Ben, patch 3/3 has a dependency on this one. Would you prefer to merge
> this as part of the Nouveau tree or do you want me to provide a stable
> branch that you can pull in to resolve the dependency?
I'll take the patch, seems the simplest option :)

Thanks,
Ben.

>
> In case of the former:
>
> Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> _______________________________________________
> Nouveau mailing list
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> http://lists.freedesktop.org/mailman/listinfo/nouveau
>

Re: [Nouveau] [RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use

[Ben Skeggs]

On Mon, Dec 1, 2014 at 8:01 PM, Thierry Reding <thierry.reding@gmail.com> wrote:
> I think the subject doesn't need "for module use" because that's
> implicit in exporting a symbol.
>
> On Fri, Nov 28, 2014 at 07:12:58PM +0800, Vince Hsu wrote:
>> Some Tegra drivers might be complied as kernel modules, and
>
> "compiled"
>
>> they need the fuse information for initialization. One
>> example is the GK20A Nouveau driver. It needs the GPU speedo
>> value to calculate frequency-voltage table. So export
>> the tegra_sku_info.
>
> Also please wrap the commit message at around 72 characters. If you make
> the lines too short it becomes almost as difficult to readable as if
> they're too long.
>
> Other than these small nitpicks this looks like a reasonable change to
> me.
>
>>
>> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
>> ---
>>
>> v2: add more description why we need this patch
>>
>>  drivers/soc/tegra/fuse/fuse-tegra.c | 1 +
>>  1 file changed, 1 insertion(+)
>
> Ben, patch 3/3 has a dependency on this one. Would you prefer to merge
> this as part of the Nouveau tree or do you want me to provide a stable
> branch that you can pull in to resolve the dependency?
I'll take the patch, seems the simplest option :)

Thanks,
Ben.

>
> In case of the former:
>
> Acked-by: Thierry Reding <treding@nvidia.com>
>
> _______________________________________________
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>