[ath9k-devel] AR9271 Clock rate

[ath9k-devel] AR9271 Clock rate

[Adrian Nicolau]

Hello,

I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271 and I
obtained the ath9k_htc source code via backports version 3.17.1-1. For ToF
measurements, the higher the clock rate of the SOC, the better, and I know
that AR9271 has a 117 MHz one.
Reading through the code, in file ath/ath9k/hw.c, function
ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving the
clockrate to be 44MHz in the common structure and throughout execution.
The 117MHz setting is done later in the code by writing to a registry [2].

I am wondering why the writing to the registry is not reflected in the
common structure as well.

[1]
https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
[2]
https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864

Thanks,
Adrian
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20141219/13703bad/attachment.htm 

[ath9k-devel] AR9271 Clock rate

[Oleksij Rempel]

Am 19.12.2014 um 10:21 schrieb Adrian Nicolau:
> Hello,
> 
> I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271 and I
> obtained the ath9k_htc source code via backports version 3.17.1-1. For
> ToF measurements, the higher the clock rate of the SOC, the better, and
> I know that AR9271 has a 117 MHz one.
> Reading through the code, in file ath/ath9k/hw.c, function
> ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving
> the clockrate to be 44MHz in the common structure and throughout execution. 
> The 117MHz setting is done later in the code by writing to a registry [2].
> 
> I am wondering why the writing to the registry is not reflected in the
> common structure as well.
> 
> [1] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
> [2] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864

Because you are writing to wrong offset.

REG_WRITE will do it to a memory region mapped to mac core for this SoC.
-- 
Regards,
Oleksij

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 213 bytes
Desc: OpenPGP digital signature
Url : http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20141219/af5237d3/attachment.pgp 

[ath9k-devel] AR9271 Clock rate

[Adrian Nicolau]

I understand this, and neither was I expecting that the REG_WRITE would
overwrite the common->clockrate value. My question can be rephrased: Why
are there two different clock rate values defined for AR9271: one of 117
MHz which is written in the registry, and the other of 44 MHz which is set
in the ath9k_hw_set_clockrate function? There is no checking done in this
function for AR_SREV_9271 like the one made for AR_SREV_9287 [1] which sets
the clock at 117MHz as well.

[1]
https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L46

Thank you,
Adrian

On Fri, Dec 19, 2014 at 3:25 PM, Oleksij Rempel <linux@rempel-privat.de>
wrote:
>
> Am 19.12.2014 um 10:21 schrieb Adrian Nicolau:
> > Hello,
> >
> > I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271 and I
> > obtained the ath9k_htc source code via backports version 3.17.1-1. For
> > ToF measurements, the higher the clock rate of the SOC, the better, and
> > I know that AR9271 has a 117 MHz one.
> > Reading through the code, in file ath/ath9k/hw.c, function
> > ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving
> > the clockrate to be 44MHz in the common structure and throughout
> execution.
> > The 117MHz setting is done later in the code by writing to a registry
> [2].
> >
> > I am wondering why the writing to the registry is not reflected in the
> > common structure as well.
> >
> > [1]
> https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
> > [2]
> https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864
>
> Because you are writing to wrong offset.
>
> REG_WRITE will do it to a memory region mapped to mac core for this SoC.
> --
> Regards,
> Oleksij
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20141219/61fca309/attachment.htm 

[ath9k-devel] AR9271 Clock rate

[Oleksij Rempel]

Am 19.12.2014 um 14:53 schrieb Adrian Nicolau:
> I understand this, and neither was I expecting that the REG_WRITE would
> overwrite the common->clockrate value. My question can be rephrased: Why
> are there two different clock rate values defined for AR9271: one of 117
> MHz which is written in the registry, and the other of 44 MHz which is
> set in the ath9k_hw_set_clockrate function? There is no checking done in
> this function for AR_SREV_9271 like the one made for AR_SREV_9287 [1]
> which sets the clock at 117MHz as well.
> 
> [1] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L46

Ach... ok. you right.

pll related changes from the host are ignored:
https://github.com/olerem/open-ath9k-htc-firmware/blob/master/target_firmware/wlan/if_ath.c#L1456

> Thank you,
> Adrian
> 
> On Fri, Dec 19, 2014 at 3:25 PM, Oleksij Rempel <linux@rempel-privat.de
> <mailto:linux@rempel-privat.de>> wrote:
> 
>     Am 19.12.2014 um 10:21 schrieb Adrian Nicolau:
>     > Hello,
>     >
>     > I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271
>     and I
>     > obtained the ath9k_htc source code via backports version 3.17.1-1. For
>     > ToF measurements, the higher the clock rate of the SOC, the
>     better, and
>     > I know that AR9271 has a 117 MHz one.
>     > Reading through the code, in file ath/ath9k/hw.c, function
>     > ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving
>     > the clockrate to be 44MHz in the common structure and throughout
>     execution.
>     > The 117MHz setting is done later in the code by writing to a
>     registry [2].
>     >
>     > I am wondering why the writing to the registry is not reflected in the
>     > common structure as well.
>     >
>     > [1]
>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
>     > [2]
>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864
> 
>     Because you are writing to wrong offset.
> 
>     REG_WRITE will do it to a memory region mapped to mac core for this SoC.
>     --
>     Regards,
>     Oleksij
> 


-- 
Regards,
Oleksij

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 213 bytes
Desc: OpenPGP digital signature
Url : http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20141219/13de4bd6/attachment.pgp 

[ath9k-devel] AR9271 Clock rate

[Oleksij Rempel]

Am 19.12.2014 um 16:10 schrieb Oleksij Rempel:
> Am 19.12.2014 um 14:53 schrieb Adrian Nicolau:
>> I understand this, and neither was I expecting that the REG_WRITE would
>> overwrite the common->clockrate value. My question can be rephrased: Why
>> are there two different clock rate values defined for AR9271: one of 117
>> MHz which is written in the registry, and the other of 44 MHz which is
>> set in the ath9k_hw_set_clockrate function? There is no checking done in
>> this function for AR_SREV_9271 like the one made for AR_SREV_9287 [1]
>> which sets the clock at 117MHz as well.
>>
>> [1] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L46
> 
> Ach... ok. you right.
> 
> pll related changes from the host are ignored:
> https://github.com/olerem/open-ath9k-htc-firmware/blob/master/target_firmware/wlan/if_ath.c#L1456

Note about this FW... not all functions do what they actually should do,
so always check the source.

>> Thank you,
>> Adrian
>>
>> On Fri, Dec 19, 2014 at 3:25 PM, Oleksij Rempel <linux@rempel-privat.de
>> <mailto:linux@rempel-privat.de>> wrote:
>>
>>     Am 19.12.2014 um 10:21 schrieb Adrian Nicolau:
>>     > Hello,
>>     >
>>     > I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271
>>     and I
>>     > obtained the ath9k_htc source code via backports version 3.17.1-1. For
>>     > ToF measurements, the higher the clock rate of the SOC, the
>>     better, and
>>     > I know that AR9271 has a 117 MHz one.
>>     > Reading through the code, in file ath/ath9k/hw.c, function
>>     > ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving
>>     > the clockrate to be 44MHz in the common structure and throughout
>>     execution.
>>     > The 117MHz setting is done later in the code by writing to a
>>     registry [2].
>>     >
>>     > I am wondering why the writing to the registry is not reflected in the
>>     > common structure as well.
>>     >
>>     > [1]
>>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
>>     > [2]
>>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864
>>
>>     Because you are writing to wrong offset.
>>
>>     REG_WRITE will do it to a memory region mapped to mac core for this SoC.
>>     --
>>     Regards,
>>     Oleksij
>>
> 
> 
> 
> 
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> 


-- 
Regards,
Oleksij

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 213 bytes
Desc: OpenPGP digital signature
Url : http://lists.ath9k.org/pipermail/ath9k-devel/attachments/20141219/44539c46/attachment.pgp