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* [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
@ 2015-03-18 13:05 Alexander Sverdlin
  2015-03-18 13:11 ` Jiri Kosina
  2015-03-18 16:11   ` David Daney
  0 siblings, 2 replies; 8+ messages in thread
From: Alexander Sverdlin @ 2015-03-18 13:05 UTC (permalink / raw)
  To: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David
  Cc: Rob Herring, Jiri Kosina, Randy Dunlap, Masanari Iida,
	Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
platforms because these operations are called from PCI_OP_READ() and
PCI_OP_WRITE() under raw_spin_lock_irqsave().

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
---
 arch/mips/include/asm/octeon/pci-octeon.h |    3 ---
 arch/mips/pci/pci-octeon.c                |    6 ------
 arch/mips/pci/pcie-octeon.c               |    8 --------
 3 files changed, 0 insertions(+), 17 deletions(-)

diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
index 64ba56a..1884609 100644
--- a/arch/mips/include/asm/octeon/pci-octeon.h
+++ b/arch/mips/include/asm/octeon/pci-octeon.h
@@ -11,9 +11,6 @@
 
 #include <linux/pci.h>
 
-/* Some PCI cards require delays when accessing config space. */
-#define PCI_CONFIG_SPACE_DELAY 10000
-
 /*
  * The physical memory base mapped by BAR1.  256MB at the end of the
  * first 4GB.
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index a04af55..01c604a 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -271,9 +271,6 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
 	pci_addr.s.func = devfn & 0x7;
 	pci_addr.s.reg = reg;
 
-#if PCI_CONFIG_SPACE_DELAY
-	udelay(PCI_CONFIG_SPACE_DELAY);
-#endif
 	switch (size) {
 	case 4:
 		*val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
@@ -308,9 +305,6 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
 	pci_addr.s.func = devfn & 0x7;
 	pci_addr.s.reg = reg;
 
-#if PCI_CONFIG_SPACE_DELAY
-	udelay(PCI_CONFIG_SPACE_DELAY);
-#endif
 	switch (size) {
 	case 4:
 		cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index 1bb0b2b..99f3db4 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -1762,14 +1762,6 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
 	default:
 		return PCIBIOS_FUNC_NOT_SUPPORTED;
 	}
-#if PCI_CONFIG_SPACE_DELAY
-	/*
-	 * Delay on writes so that devices have time to come up. Some
-	 * bridges need this to allow time for the secondary busses to
-	 * work
-	 */
-	udelay(PCI_CONFIG_SPACE_DELAY);
-#endif
 	return PCIBIOS_SUCCESSFUL;
 }
 

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
  2015-03-18 13:05 [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency Alexander Sverdlin
@ 2015-03-18 13:11 ` Jiri Kosina
  2015-03-18 14:15   ` Alexander Sverdlin
  2015-03-18 16:11   ` David Daney
  1 sibling, 1 reply; 8+ messages in thread
From: Jiri Kosina @ 2015-03-18 13:11 UTC (permalink / raw)
  To: Alexander Sverdlin
  Cc: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David, Rob Herring, Randy Dunlap, Masanari Iida,
	Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

On Wed, 18 Mar 2015, Alexander Sverdlin wrote:

> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
> platforms because these operations are called from PCI_OP_READ() and
> PCI_OP_WRITE() under raw_spin_lock_irqsave().
> 
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>

I have no idea about the octeon platform, but how do you deal with the 
fact that is stated by the comment you are removing? I.e.

	/* Some PCI cards require delays when accessing config space. */

Is that not the case any more for some reason? If not, it really needs to 
be explained in the changelog.

-- 
Jiri Kosina
SUSE Labs

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
  2015-03-18 13:11 ` Jiri Kosina
@ 2015-03-18 14:15   ` Alexander Sverdlin
  0 siblings, 0 replies; 8+ messages in thread
From: Alexander Sverdlin @ 2015-03-18 14:15 UTC (permalink / raw)
  To: ext Jiri Kosina
  Cc: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David, Rob Herring, Randy Dunlap, Masanari Iida,
	Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

Hi!

On 18/03/15 14:11, ext Jiri Kosina wrote:
>> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
>> > platforms because these operations are called from PCI_OP_READ() and
>> > PCI_OP_WRITE() under raw_spin_lock_irqsave().
>> > 
>> > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> I have no idea about the octeon platform, but how do you deal with the 
> fact that is stated by the comment you are removing? I.e.
> 
> 	/* Some PCI cards require delays when accessing config space. */
> 
> Is that not the case any more for some reason? If not, it really needs to 
> be explained in the changelog.

This udelay() should not have made its way upstream, someone overseen it during
code review. This is simply not allowed to have delayed read/write in the current
Linux PCI subsystem. And maybe there is no place for it at all.

-- 
Best regards,
Alexander Sverdlin.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
@ 2015-03-18 16:11   ` David Daney
  0 siblings, 0 replies; 8+ messages in thread
From: David Daney @ 2015-03-18 16:11 UTC (permalink / raw)
  To: Alexander Sverdlin
  Cc: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David, Rob Herring, Jiri Kosina, Randy Dunlap,
	Masanari Iida, Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

On 03/18/2015 06:05 AM, Alexander Sverdlin wrote:
> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
> platforms because these operations are called from PCI_OP_READ() and
> PCI_OP_WRITE() under raw_spin_lock_irqsave().
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>

Can you say how it was tested.  In principle I have no objections, but 
it would be nice to know how it was validated.

Thanks,
David Daney


> ---
>   arch/mips/include/asm/octeon/pci-octeon.h |    3 ---
>   arch/mips/pci/pci-octeon.c                |    6 ------
>   arch/mips/pci/pcie-octeon.c               |    8 --------
>   3 files changed, 0 insertions(+), 17 deletions(-)
>
> diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
> index 64ba56a..1884609 100644
> --- a/arch/mips/include/asm/octeon/pci-octeon.h
> +++ b/arch/mips/include/asm/octeon/pci-octeon.h
> @@ -11,9 +11,6 @@
>
>   #include <linux/pci.h>
>
> -/* Some PCI cards require delays when accessing config space. */
> -#define PCI_CONFIG_SPACE_DELAY 10000
> -
>   /*
>    * The physical memory base mapped by BAR1.  256MB at the end of the
>    * first 4GB.
> diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
> index a04af55..01c604a 100644
> --- a/arch/mips/pci/pci-octeon.c
> +++ b/arch/mips/pci/pci-octeon.c
> @@ -271,9 +271,6 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
>   	pci_addr.s.func = devfn & 0x7;
>   	pci_addr.s.reg = reg;
>
> -#if PCI_CONFIG_SPACE_DELAY
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	switch (size) {
>   	case 4:
>   		*val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
> @@ -308,9 +305,6 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
>   	pci_addr.s.func = devfn & 0x7;
>   	pci_addr.s.reg = reg;
>
> -#if PCI_CONFIG_SPACE_DELAY
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	switch (size) {
>   	case 4:
>   		cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
> diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
> index 1bb0b2b..99f3db4 100644
> --- a/arch/mips/pci/pcie-octeon.c
> +++ b/arch/mips/pci/pcie-octeon.c
> @@ -1762,14 +1762,6 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
>   	default:
>   		return PCIBIOS_FUNC_NOT_SUPPORTED;
>   	}
> -#if PCI_CONFIG_SPACE_DELAY
> -	/*
> -	 * Delay on writes so that devices have time to come up. Some
> -	 * bridges need this to allow time for the secondary busses to
> -	 * work
> -	 */
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	return PCIBIOS_SUCCESSFUL;
>   }
>
>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
@ 2015-03-18 16:11   ` David Daney
  0 siblings, 0 replies; 8+ messages in thread
From: David Daney @ 2015-03-18 16:11 UTC (permalink / raw)
  To: Alexander Sverdlin
  Cc: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David, Rob Herring, Jiri Kosina, Randy Dunlap,
	Masanari Iida, Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

On 03/18/2015 06:05 AM, Alexander Sverdlin wrote:
> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
> platforms because these operations are called from PCI_OP_READ() and
> PCI_OP_WRITE() under raw_spin_lock_irqsave().
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>

Can you say how it was tested.  In principle I have no objections, but 
it would be nice to know how it was validated.

Thanks,
David Daney


> ---
>   arch/mips/include/asm/octeon/pci-octeon.h |    3 ---
>   arch/mips/pci/pci-octeon.c                |    6 ------
>   arch/mips/pci/pcie-octeon.c               |    8 --------
>   3 files changed, 0 insertions(+), 17 deletions(-)
>
> diff --git a/arch/mips/include/asm/octeon/pci-octeon.h b/arch/mips/include/asm/octeon/pci-octeon.h
> index 64ba56a..1884609 100644
> --- a/arch/mips/include/asm/octeon/pci-octeon.h
> +++ b/arch/mips/include/asm/octeon/pci-octeon.h
> @@ -11,9 +11,6 @@
>
>   #include <linux/pci.h>
>
> -/* Some PCI cards require delays when accessing config space. */
> -#define PCI_CONFIG_SPACE_DELAY 10000
> -
>   /*
>    * The physical memory base mapped by BAR1.  256MB at the end of the
>    * first 4GB.
> diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
> index a04af55..01c604a 100644
> --- a/arch/mips/pci/pci-octeon.c
> +++ b/arch/mips/pci/pci-octeon.c
> @@ -271,9 +271,6 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
>   	pci_addr.s.func = devfn & 0x7;
>   	pci_addr.s.reg = reg;
>
> -#if PCI_CONFIG_SPACE_DELAY
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	switch (size) {
>   	case 4:
>   		*val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
> @@ -308,9 +305,6 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
>   	pci_addr.s.func = devfn & 0x7;
>   	pci_addr.s.reg = reg;
>
> -#if PCI_CONFIG_SPACE_DELAY
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	switch (size) {
>   	case 4:
>   		cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
> diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
> index 1bb0b2b..99f3db4 100644
> --- a/arch/mips/pci/pcie-octeon.c
> +++ b/arch/mips/pci/pcie-octeon.c
> @@ -1762,14 +1762,6 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
>   	default:
>   		return PCIBIOS_FUNC_NOT_SUPPORTED;
>   	}
> -#if PCI_CONFIG_SPACE_DELAY
> -	/*
> -	 * Delay on writes so that devices have time to come up. Some
> -	 * bridges need this to allow time for the secondary busses to
> -	 * work
> -	 */
> -	udelay(PCI_CONFIG_SPACE_DELAY);
> -#endif
>   	return PCIBIOS_SUCCESSFUL;
>   }
>
>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
  2015-03-18 16:11   ` David Daney
  (?)
@ 2015-03-18 16:17   ` Alexander Sverdlin
  2015-03-18 18:06     ` Aaro Koskinen
  -1 siblings, 1 reply; 8+ messages in thread
From: Alexander Sverdlin @ 2015-03-18 16:17 UTC (permalink / raw)
  To: ext David Daney
  Cc: Ralf Baechle, linux-mips, David Daney, ddaney.cavm,
	ext Daney, David, Rob Herring, Jiri Kosina, Randy Dunlap,
	Masanari Iida, Bjorn Helgaas, Rulf, Mathias (Nokia - DE/Ulm)

Hello David,

On 18/03/15 17:11, ext David Daney wrote:
>> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
>> platforms because these operations are called from PCI_OP_READ() and
>> PCI_OP_WRITE() under raw_spin_lock_irqsave().
>>
>> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> 
> Can you say how it was tested.  In principle I have no objections, but it would be nice to know how it was validated.

What do you want to know, how we've debugged IRQ latency and found the root cause or how we figured out
that delay is not necessary? I'm pretty sure that there is HW which requires it. Maybe it's even Octeon itself...
But putting udelay() in this callbacks is wrong wrong wrong. 

-- 
Best regards,
Alexander Sverdlin.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
  2015-03-18 16:17   ` Alexander Sverdlin
@ 2015-03-18 18:06     ` Aaro Koskinen
  2015-03-19 14:55       ` Alexander Sverdlin
  0 siblings, 1 reply; 8+ messages in thread
From: Aaro Koskinen @ 2015-03-18 18:06 UTC (permalink / raw)
  To: Alexander Sverdlin
  Cc: ext David Daney, Ralf Baechle, linux-mips, David Daney,
	ddaney.cavm, ext Daney, David, Rob Herring, Jiri Kosina,
	Randy Dunlap, Masanari Iida, Bjorn Helgaas,
	Rulf, Mathias (Nokia - DE/Ulm)

Hi,

On Wed, Mar 18, 2015 at 05:17:04PM +0100, Alexander Sverdlin wrote:
> On 18/03/15 17:11, ext David Daney wrote:
> >> udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
> >> platforms because these operations are called from PCI_OP_READ() and
> >> PCI_OP_WRITE() under raw_spin_lock_irqsave().
> >>
> >> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> > 
> > Can you say how it was tested.  In principle I have no objections, but it
> > would be nice to know how it was validated.
> 
> What do you want to know, how we've debugged IRQ latency and found the
> root cause or how we figured out that delay is not necessary?

You could at least say on which OCTEON platforms (e.g. OCTEON II
or older) you tested the patch on, and tell about tested PCI bus
topology and devices.

> I'm pretty sure that there is HW which requires it. Maybe it's
> even Octeon itself... But putting udelay() in this callbacks is
> wrong wrong wrong.

Still, you should not break HW that works with current kernel.

A.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency
  2015-03-18 18:06     ` Aaro Koskinen
@ 2015-03-19 14:55       ` Alexander Sverdlin
  0 siblings, 0 replies; 8+ messages in thread
From: Alexander Sverdlin @ 2015-03-19 14:55 UTC (permalink / raw)
  To: ext Aaro Koskinen
  Cc: ext David Daney, Ralf Baechle, linux-mips, David Daney,
	ddaney.cavm, ext Daney, David, Rob Herring, Jiri Kosina,
	Randy Dunlap, Masanari Iida, Bjorn Helgaas,
	Rulf, Mathias (Nokia - DE/Ulm)

Hi!

On 18/03/15 19:06, ext Aaro Koskinen wrote:
> You could at least say on which OCTEON platforms (e.g. OCTEON II
> or older) you tested the patch on, and tell about tested PCI bus
> topology and devices.

Octeon II CN68xx with Marvell XGE switch connected to PCIe.

-- 
Best regards,
Alexander Sverdlin.

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2015-03-19 14:56 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-03-18 13:05 [PATCH] pci: octeon: Remove udelay() causing huge IRQ latency Alexander Sverdlin
2015-03-18 13:11 ` Jiri Kosina
2015-03-18 14:15   ` Alexander Sverdlin
2015-03-18 16:11 ` David Daney
2015-03-18 16:11   ` David Daney
2015-03-18 16:17   ` Alexander Sverdlin
2015-03-18 18:06     ` Aaro Koskinen
2015-03-19 14:55       ` Alexander Sverdlin

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