From: "Andreas Färber" <afaerber@suse.de>
To: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>,
qemu-devel@nongnu.org, pbonzini@redhat.com, ehabkost@redhat.com
Cc: chen.fan.fnst@cn.fujitsu.com, imammedo@redhat.com,
izumi.taku@jp.fujitsu.com
Subject: Re: [Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space
Date: Thu, 25 Jun 2015 18:00:03 +0200 [thread overview]
Message-ID: <558C2583.1040501@suse.de> (raw)
In-Reply-To: <4b8fc4d985de6c4f44509b9c47a6152add36d832.1435195913.git.zhugh.fnst@cn.fujitsu.com>
Am 25.06.2015 um 04:17 schrieb Zhu Guihua:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>
> Replace mapping APIC at global system address space with
> mapping it at per-CPU address spaces.
>
> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> exec.c | 5 +++++
> hw/i386/pc.c | 7 -------
> hw/intc/apic_common.c | 14 ++++++++------
> include/exec/memory.h | 5 +++++
> target-i386/cpu.c | 2 ++
> 5 files changed, 20 insertions(+), 13 deletions(-)
Eduardo, is this for you?
> diff --git a/exec.c b/exec.c
> index f7883d2..1cd2e74 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -2710,6 +2710,11 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
> cpu_notify_map_clients();
> }
>
> +MemoryRegion *address_space_root_memory_region(AddressSpace *as)
> +{
> + return as->root;
> +}
> +
> void *cpu_physical_memory_map(hwaddr addr,
> hwaddr *plen,
> int is_write)
This looks trivial and could've been a separate preparatory patch.
Paolo, is this part okay with you?
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 7072930..9f16128 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1076,13 +1076,6 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
> object_unref(OBJECT(cpu));
> }
>
> - /* map APIC MMIO area if CPU has APIC */
> - if (cpu && cpu->apic_state) {
> - /* XXX: what if the base changes? */
> - sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
> - APIC_DEFAULT_ADDRESS, 0x1000);
> - }
> -
> /* tell smbios about cpuid version and features */
> smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
> }
> diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
> index 0032b97..cf105f5 100644
> --- a/hw/intc/apic_common.c
> +++ b/hw/intc/apic_common.c
> @@ -296,7 +296,8 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
> APICCommonClass *info;
> static DeviceState *vapic;
> static int apic_no;
> - static bool mmio_registered;
> + CPUState *cpu = CPU(s->cpu);
> + MemoryRegion *root;
Nit: These variables were sorted by non-static vs. static, so the new
ones should've gone before vapic.
>
> if (apic_no >= MAX_APICS) {
> error_setg(errp, "%s initialization failed.",
> @@ -307,11 +308,12 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
>
> info = APIC_COMMON_GET_CLASS(s);
> info->realize(dev, errp);
> - if (!mmio_registered) {
> - ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
> - memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
> - mmio_registered = true;
> - }
> +
> + root = address_space_root_memory_region(cpu->as);
> + memory_region_add_subregion_overlap(root,
> + s->apicbase & MSR_IA32_APICBASE_BASE,
> + &s->io_memory,
> + 0x1000);
>
> /* Note: We need at least 1M to map the VAPIC option ROM */
> if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 8ae004e..811f027 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -1308,6 +1308,11 @@ void *address_space_map(AddressSpace *as, hwaddr addr,
> void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,
> int is_write, hwaddr access_len);
>
> +/* address_space_root_memory_region: get root memory region
> + *
> + * @as: #AddressSpace to be accessed
> + */
> +MemoryRegion *address_space_root_memory_region(AddressSpace *as);
>
> #endif
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 36b07f9..1fb88f6 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2741,6 +2741,8 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
> /* TODO: convert to link<> */
> apic = APIC_COMMON(cpu->apic_state);
> apic->cpu = cpu;
> + cpu_set_apic_base(cpu->apic_state,
> + APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE);
> }
>
> static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
Otherwise, if it works now, LGTM.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Dilip Upmanyu, Graham Norton; HRB
21284 (AG Nürnberg)
next prev parent reply other threads:[~2015-06-25 16:00 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-25 2:17 [Qemu-devel] [RESEND PATCH v8 0/4] remove icc bus/bridge Zhu Guihua
2015-06-25 2:17 ` [Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space Zhu Guihua
2015-06-25 16:00 ` Andreas Färber [this message]
2015-06-25 16:02 ` Paolo Bonzini
2015-06-25 16:10 ` Andreas Färber
2015-06-25 17:02 ` Paolo Bonzini
2015-06-25 17:08 ` Andreas Färber
2015-06-25 17:27 ` Paolo Bonzini
2015-06-25 17:32 ` Peter Maydell
2015-06-25 17:39 ` Paolo Bonzini
2015-06-26 9:01 ` Igor Mammedov
2015-06-26 9:05 ` Paolo Bonzini
2015-06-25 2:17 ` [Qemu-devel] [RESEND PATCH v8 2/4] hw: add a wrapper for registering reset handler Zhu Guihua
2015-06-25 16:57 ` Andreas Färber
2015-06-25 17:00 ` Paolo Bonzini
2015-06-25 17:28 ` Andreas Färber
2015-06-26 9:19 ` Igor Mammedov
2015-06-26 10:05 ` Paolo Bonzini
2015-06-30 6:31 ` Zhu Guihua
2015-06-30 9:21 ` Igor Mammedov
2015-06-30 10:50 ` Zhu Guihua
2015-06-30 10:55 ` Peter Maydell
2015-06-30 18:38 ` Eduardo Habkost
2015-06-30 10:24 ` Andreas Färber
2015-06-30 18:30 ` Eduardo Habkost
2015-06-25 2:17 ` [Qemu-devel] [RESEND PATCH v8 3/4] cpu/apic: drop icc bus/bridge Zhu Guihua
2015-06-25 16:44 ` Andreas Färber
2015-06-25 2:17 ` [Qemu-devel] [RESEND PATCH v8 4/4] icc_bus: drop the unused files Zhu Guihua
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