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From: michal.simek@xilinx.com (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
Date: Thu, 6 Aug 2015 06:54:23 +0200	[thread overview]
Message-ID: <55C2E87F.7060502@xilinx.com> (raw)
In-Reply-To: <CAAtXAHfJF-5PAgCc4ZC71omc_ye6L4qa2ks2E1BdoSXxDzZu1A@mail.gmail.com>

On 08/05/2015 09:43 PM, Moritz Fischer wrote:
> Michal,
> 
> On Tue, Aug 4, 2015 at 8:10 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> Hi Moritz,
>>
>> Am Dienstag, den 04.08.2015, 08:05 -0700 schrieb Moritz Fischer:
>>> Hi Philip,
>>>
>>> On Tue, Aug 4, 2015 at 1:09 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>>>> Hi Moritz,
>>>>
>>>> Am Donnerstag, den 30.07.2015, 18:13 -0700 schrieb Moritz Fischer:
>> [...]
>>>>> +Required properties:
>>>>> +- compatible: "xlnx,zynq-reset"
>>>>> +- reg: SLCR offset and size taken via syscon <0x200 0x48>
>>>>> +- syscon: <&slcr>
>>>>> +  This should be a phandle to the Zynq's SLCR register.
>>>>
>>>>                                                  ^ register singular?
>>> Do you want me to resend the entire set, or are you cool with just git
>>> amending the 's' for registers?
>>
>> Amended and applied, thanks.
> 
> Will you take 4/4 and 2/4 via your tree?

Applied to zynq/dt and zynq/soc.

Thanks,
Michal

WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
To: Moritz Fischer
	<moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org>,
	Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"Michal Simek"
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"Sören Brinkmann"
	<soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
Date: Thu, 6 Aug 2015 06:54:23 +0200	[thread overview]
Message-ID: <55C2E87F.7060502@xilinx.com> (raw)
In-Reply-To: <CAAtXAHfJF-5PAgCc4ZC71omc_ye6L4qa2ks2E1BdoSXxDzZu1A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On 08/05/2015 09:43 PM, Moritz Fischer wrote:
> Michal,
> 
> On Tue, Aug 4, 2015 at 8:10 AM, Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> wrote:
>> Hi Moritz,
>>
>> Am Dienstag, den 04.08.2015, 08:05 -0700 schrieb Moritz Fischer:
>>> Hi Philip,
>>>
>>> On Tue, Aug 4, 2015 at 1:09 AM, Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> wrote:
>>>> Hi Moritz,
>>>>
>>>> Am Donnerstag, den 30.07.2015, 18:13 -0700 schrieb Moritz Fischer:
>> [...]
>>>>> +Required properties:
>>>>> +- compatible: "xlnx,zynq-reset"
>>>>> +- reg: SLCR offset and size taken via syscon <0x200 0x48>
>>>>> +- syscon: <&slcr>
>>>>> +  This should be a phandle to the Zynq's SLCR register.
>>>>
>>>>                                                  ^ register singular?
>>> Do you want me to resend the entire set, or are you cool with just git
>>> amending the 's' for registers?
>>
>> Amended and applied, thanks.
> 
> Will you take 4/4 and 2/4 via your tree?

Applied to zynq/dt and zynq/soc.

Thanks,
Michal

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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <michal.simek@xilinx.com>
To: Moritz Fischer <moritz.fischer@ettus.com>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk,
	"Kumar Gala" <galak@codeaurora.org>,
	"Michal Simek" <michal.simek@xilinx.com>,
	"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
	linux@arm.linux.org.uk, devicetree@vger.kernel.org,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
Date: Thu, 6 Aug 2015 06:54:23 +0200	[thread overview]
Message-ID: <55C2E87F.7060502@xilinx.com> (raw)
In-Reply-To: <CAAtXAHfJF-5PAgCc4ZC71omc_ye6L4qa2ks2E1BdoSXxDzZu1A@mail.gmail.com>

On 08/05/2015 09:43 PM, Moritz Fischer wrote:
> Michal,
> 
> On Tue, Aug 4, 2015 at 8:10 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>> Hi Moritz,
>>
>> Am Dienstag, den 04.08.2015, 08:05 -0700 schrieb Moritz Fischer:
>>> Hi Philip,
>>>
>>> On Tue, Aug 4, 2015 at 1:09 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
>>>> Hi Moritz,
>>>>
>>>> Am Donnerstag, den 30.07.2015, 18:13 -0700 schrieb Moritz Fischer:
>> [...]
>>>>> +Required properties:
>>>>> +- compatible: "xlnx,zynq-reset"
>>>>> +- reg: SLCR offset and size taken via syscon <0x200 0x48>
>>>>> +- syscon: <&slcr>
>>>>> +  This should be a phandle to the Zynq's SLCR register.
>>>>
>>>>                                                  ^ register singular?
>>> Do you want me to resend the entire set, or are you cool with just git
>>> amending the 's' for registers?
>>
>> Amended and applied, thanks.
> 
> Will you take 4/4 and 2/4 via your tree?

Applied to zynq/dt and zynq/soc.

Thanks,
Michal


  reply	other threads:[~2015-08-06  4:54 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-31  1:13 [RFCv3 0/4] Adding support for Zynq Reset Controller Moritz Fischer
2015-07-31  1:13 ` Moritz Fischer
2015-07-31  1:13 ` [RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings Moritz Fischer
2015-07-31  1:13   ` Moritz Fischer
2015-08-04  8:09   ` Philipp Zabel
2015-08-04  8:09     ` Philipp Zabel
2015-08-04  8:09     ` Philipp Zabel
2015-08-04  8:18     ` Michal Simek
2015-08-04  8:18       ` Michal Simek
2015-08-04  8:18       ` Michal Simek
2015-08-04 15:05     ` Moritz Fischer
2015-08-04 15:05       ` Moritz Fischer
2015-08-04 15:10       ` Philipp Zabel
2015-08-04 15:10         ` Philipp Zabel
2015-08-05 19:43         ` Moritz Fischer
2015-08-05 19:43           ` Moritz Fischer
2015-08-05 19:43           ` Moritz Fischer
2015-08-06  4:54           ` Michal Simek [this message]
2015-08-06  4:54             ` Michal Simek
2015-08-06  4:54             ` Michal Simek
2015-07-31  1:13 ` [RFCv3 2/4] dts: zynq: Add devicetree entry for Xilinx Zynq reset controller Moritz Fischer
2015-07-31  1:13   ` Moritz Fischer
2015-08-04  8:13   ` Michal Simek
2015-08-04  8:13     ` Michal Simek
2015-08-04  8:13     ` Michal Simek
2015-07-31  1:13 ` [RFCv3 3/4] reset: reset-zynq: Adding support " Moritz Fischer
2015-07-31  1:13   ` Moritz Fischer
2015-07-31  1:13 ` [RFCv3 4/4] ARM: zynq: Select ARCH_HAS_RESET_CONTROLLER Moritz Fischer
2015-07-31  1:13   ` Moritz Fischer
2015-07-31  8:09   ` Michal Simek
2015-07-31  8:09     ` Michal Simek
2015-07-31  8:09     ` Michal Simek
2015-07-31 16:47     ` Sören Brinkmann
2015-07-31 16:47       ` Sören Brinkmann
2015-07-31 16:47       ` Sören Brinkmann
2015-08-04  8:38       ` Philipp Zabel
2015-08-04  8:38         ` Philipp Zabel
2015-08-04  8:38         ` Philipp Zabel
2015-08-04 14:11         ` Sören Brinkmann
2015-08-04 14:11           ` Sören Brinkmann
2015-08-04 14:11           ` Sören Brinkmann

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