* [PATCH 1/2] drm/i915: Adding break for one case
@ 2015-08-13 10:00 Xiong Zhang
2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Xiong Zhang @ 2015-08-13 10:00 UTC (permalink / raw)
To: intel-gfx; +Cc: rodrigo.vivi
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 65cc5b1..801187c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv,
break;
case PORT_E:
bit = SDE_PORTE_HOTPLUG_SPT;
+ break;
default:
return true;
}
--
2.1.4
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain 2015-08-13 10:00 [PATCH 1/2] drm/i915: Adding break for one case Xiong Zhang @ 2015-08-13 10:00 ` Xiong Zhang 2015-08-14 22:22 ` Rodrigo Vivi 2015-08-31 15:48 ` Jani Nikula 2015-08-13 10:36 ` [PATCH 1/2] drm/i915: Adding break for one case Timo Aaltonen 2015-08-14 7:12 ` Jani Nikula 2 siblings, 2 replies; 11+ messages in thread From: Xiong Zhang @ 2015-08-13 10:00 UTC (permalink / raw) To: intel-gfx; +Cc: rodrigo.vivi From B spec, DDI_E port belong to PowerWell 2, but DDI_E share the powerwell_req/staus register bit with DDI_A which belong to DDI_A_E_POWER_WELL. In order to communicate with the connector on DDI-E, both DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. Currently intel_dp_power_get(DDI_E) only enable DDI_A_E_POWER_WELL, this patch will not only enable DDI_a_E_POWER_WELL but also enable POWER_WELL_2. This patch also fix the DDI-E hotplug function. Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 3 ++- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++ 4 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 86734be..5523b6e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain) return "PORT_DDI_D_2_LANES"; case POWER_DOMAIN_PORT_DDI_D_4_LANES: return "PORT_DDI_D_4_LANES"; + case POWER_DOMAIN_PORT_DDI_E_2_LANES: + return "PORT_DDI_E_2_LANES"; case POWER_DOMAIN_PORT_DSI: return "PORT_DSI"; case POWER_DOMAIN_PORT_CRT: diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b157865..ee71f90 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -182,6 +182,7 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_DDI_C_4_LANES, POWER_DOMAIN_PORT_DDI_D_2_LANES, POWER_DOMAIN_PORT_DDI_D_4_LANES, + POWER_DOMAIN_PORT_DDI_E_2_LANES, POWER_DOMAIN_PORT_DSI, POWER_DOMAIN_PORT_CRT, POWER_DOMAIN_PORT_OTHER, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 801187c..ccd3f0b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) { switch (port) { case PORT_A: - case PORT_E: return POWER_DOMAIN_PORT_DDI_A_4_LANES; case PORT_B: return POWER_DOMAIN_PORT_DDI_B_4_LANES; @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) return POWER_DOMAIN_PORT_DDI_C_4_LANES; case PORT_D: return POWER_DOMAIN_PORT_DDI_D_4_LANES; + case PORT_E: + return POWER_DOMAIN_PORT_DDI_E_2_LANES; default: WARN_ON_ONCE(1); return POWER_DOMAIN_PORT_OTHER; diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 821644d..af7fdb3 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ BIT(POWER_DOMAIN_AUX_B) | \ BIT(POWER_DOMAIN_AUX_C) | \ BIT(POWER_DOMAIN_AUX_D) | \ @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ BIT(POWER_DOMAIN_INIT)) #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ -- 2.1.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain 2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang @ 2015-08-14 22:22 ` Rodrigo Vivi 2015-08-17 1:50 ` Zhang, Xiong Y 2015-08-31 15:48 ` Jani Nikula 1 sibling, 1 reply; 11+ messages in thread From: Rodrigo Vivi @ 2015-08-14 22:22 UTC (permalink / raw) To: Xiong Zhang, intel-gfx; +Cc: rodrigo.vivi [-- Attachment #1.1: Type: text/plain, Size: 4586 bytes --] Sorry, but I don't get how this enables power_well_2 as well. I just see it enabling ddi A/E as the other. Maybe Paulo or Imre are the best one to review this. On Thu, Aug 13, 2015 at 2:54 AM Xiong Zhang <xiong.y.zhang@intel.com> wrote: > From B spec, DDI_E port belong to PowerWell 2, but > DDI_E share the powerwell_req/staus register bit with > DDI_A which belong to DDI_A_E_POWER_WELL. > > In order to communicate with the connector on DDI-E, both > DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. > > Currently intel_dp_power_get(DDI_E) only enable > DDI_A_E_POWER_WELL, this patch will not only enable > DDI_a_E_POWER_WELL but also enable POWER_WELL_2. > > This patch also fix the DDI-E hotplug function. > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 3 ++- > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++ > 4 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index 86734be..5523b6e 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum > intel_display_power_domain domain) > return "PORT_DDI_D_2_LANES"; > case POWER_DOMAIN_PORT_DDI_D_4_LANES: > return "PORT_DDI_D_4_LANES"; > + case POWER_DOMAIN_PORT_DDI_E_2_LANES: > + return "PORT_DDI_E_2_LANES"; > case POWER_DOMAIN_PORT_DSI: > return "PORT_DSI"; > case POWER_DOMAIN_PORT_CRT: > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index b157865..ee71f90 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -182,6 +182,7 @@ enum intel_display_power_domain { > POWER_DOMAIN_PORT_DDI_C_4_LANES, > POWER_DOMAIN_PORT_DDI_D_2_LANES, > POWER_DOMAIN_PORT_DDI_D_4_LANES, > + POWER_DOMAIN_PORT_DDI_E_2_LANES, > POWER_DOMAIN_PORT_DSI, > POWER_DOMAIN_PORT_CRT, > POWER_DOMAIN_PORT_OTHER, > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 801187c..ccd3f0b 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain > port_to_power_domain(enum port port) > { > switch (port) { > case PORT_A: > - case PORT_E: > return POWER_DOMAIN_PORT_DDI_A_4_LANES; > case PORT_B: > return POWER_DOMAIN_PORT_DDI_B_4_LANES; > @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain > port_to_power_domain(enum port port) > return POWER_DOMAIN_PORT_DDI_C_4_LANES; > case PORT_D: > return POWER_DOMAIN_PORT_DDI_D_4_LANES; > + case PORT_E: > + return POWER_DOMAIN_PORT_DDI_E_2_LANES; > default: > WARN_ON_ONCE(1); > return POWER_DOMAIN_PORT_OTHER; > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 821644d..af7fdb3 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct drm_i915_private > *dev_priv, > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ > BIT(POWER_DOMAIN_AUX_B) | \ > BIT(POWER_DOMAIN_AUX_C) | \ > BIT(POWER_DOMAIN_AUX_D) | \ > @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct drm_i915_private > *dev_priv, > #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ > BIT(POWER_DOMAIN_INIT)) > #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > [-- Attachment #1.2: Type: text/html, Size: 5723 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain 2015-08-14 22:22 ` Rodrigo Vivi @ 2015-08-17 1:50 ` Zhang, Xiong Y 2015-08-24 23:59 ` Vivi, Rodrigo 0 siblings, 1 reply; 11+ messages in thread From: Zhang, Xiong Y @ 2015-08-17 1:50 UTC (permalink / raw) To: Rodrigo Vivi, intel-gfx@lists.freedesktop.org; +Cc: Vivi, Rodrigo [-- Attachment #1.1: Type: text/plain, Size: 4800 bytes --] Sorry, but I don't get how this enables power_well_2 as well. I just see it enabling ddi A/E as the other. Maybe Paulo or Imre are the best one to review this. On Thu, Aug 13, 2015 at 2:54 AM Xiong Zhang <xiong.y.zhang@intel.com<mailto:xiong.y.zhang@intel.com>> wrote: From B spec, DDI_E port belong to PowerWell 2, but DDI_E share the powerwell_req/staus register bit with DDI_A which belong to DDI_A_E_POWER_WELL. In order to communicate with the connector on DDI-E, both DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. Currently intel_dp_power_get(DDI_E) only enable DDI_A_E_POWER_WELL, this patch will not only enable DDI_a_E_POWER_WELL but also enable POWER_WELL_2. This patch also fix the DDI-E hotplug function. Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com<mailto:xiong.y.zhang@intel.com>> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 3 ++- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++ 4 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 86734be..5523b6e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain) return "PORT_DDI_D_2_LANES"; case POWER_DOMAIN_PORT_DDI_D_4_LANES: return "PORT_DDI_D_4_LANES"; + case POWER_DOMAIN_PORT_DDI_E_2_LANES: + return "PORT_DDI_E_2_LANES"; case POWER_DOMAIN_PORT_DSI: return "PORT_DSI"; case POWER_DOMAIN_PORT_CRT: diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b157865..ee71f90 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -182,6 +182,7 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_DDI_C_4_LANES, POWER_DOMAIN_PORT_DDI_D_2_LANES, POWER_DOMAIN_PORT_DDI_D_4_LANES, + POWER_DOMAIN_PORT_DDI_E_2_LANES, POWER_DOMAIN_PORT_DSI, POWER_DOMAIN_PORT_CRT, POWER_DOMAIN_PORT_OTHER, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 801187c..ccd3f0b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) { switch (port) { case PORT_A: - case PORT_E: return POWER_DOMAIN_PORT_DDI_A_4_LANES; case PORT_B: return POWER_DOMAIN_PORT_DDI_B_4_LANES; @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) return POWER_DOMAIN_PORT_DDI_C_4_LANES; case PORT_D: return POWER_DOMAIN_PORT_DDI_D_4_LANES; + case PORT_E: + return POWER_DOMAIN_PORT_DDI_E_2_LANES; default: WARN_ON_ONCE(1); return POWER_DOMAIN_PORT_OTHER; diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 821644d..af7fdb3 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) [Zhang, Xiong Y] this line put DDI_E_2_LANES into SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS, but the git format-patch doesn’t show #define SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS. So it isn’t easy to review this. | \ BIT(POWER_DOMAIN_AUX_B) | \ BIT(POWER_DOMAIN_AUX_C) | \ BIT(POWER_DOMAIN_AUX_D) | \ @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ BIT(POWER_DOMAIN_INIT)) #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ -- 2.1.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org<mailto:Intel-gfx@lists.freedesktop.org> http://lists.freedesktop.org/mailman/listinfo/intel-gfx [-- Attachment #1.2: Type: text/html, Size: 10010 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain 2015-08-17 1:50 ` Zhang, Xiong Y @ 2015-08-24 23:59 ` Vivi, Rodrigo 0 siblings, 0 replies; 11+ messages in thread From: Vivi, Rodrigo @ 2015-08-24 23:59 UTC (permalink / raw) To: intel-gfx@lists.freedesktop.org, Zhang, Xiong Y, rodrigo.vivi@gmail.com On Mon, 2015-08-17 at 01:50 +0000, Zhang, Xiong Y wrote: > Sorry, but I don't get how this enables power_well_2 as well. I just > see it enabling ddi A/E as the other. > > Maybe Paulo or Imre are the best one to review this. > > On Thu, Aug 13, 2015 at 2:54 AM Xiong Zhang <xiong.y.zhang@intel.com> > wrote: > From B spec, DDI_E port belong to PowerWell 2, but > DDI_E share the powerwell_req/staus register bit with > DDI_A which belong to DDI_A_E_POWER_WELL. > > In order to communicate with the connector on DDI-E, both > DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. > > Currently intel_dp_power_get(DDI_E) only enable > DDI_A_E_POWER_WELL, this patch will not only enable > DDI_a_E_POWER_WELL but also enable POWER_WELL_2. > > This patch also fix the DDI-E hotplug function. > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 3 ++- > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++ > 4 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index 86734be..5523b6e 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum > intel_display_power_domain domain) > return "PORT_DDI_D_2_LANES"; > case POWER_DOMAIN_PORT_DDI_D_4_LANES: > return "PORT_DDI_D_4_LANES"; > + case POWER_DOMAIN_PORT_DDI_E_2_LANES: > + return "PORT_DDI_E_2_LANES"; > case POWER_DOMAIN_PORT_DSI: > return "PORT_DSI"; > case POWER_DOMAIN_PORT_CRT: > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index b157865..ee71f90 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -182,6 +182,7 @@ enum intel_display_power_domain { > POWER_DOMAIN_PORT_DDI_C_4_LANES, > POWER_DOMAIN_PORT_DDI_D_2_LANES, > POWER_DOMAIN_PORT_DDI_D_4_LANES, > + POWER_DOMAIN_PORT_DDI_E_2_LANES, > POWER_DOMAIN_PORT_DSI, > POWER_DOMAIN_PORT_CRT, > POWER_DOMAIN_PORT_OTHER, > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 801187c..ccd3f0b 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain > port_to_power_domain(enum port port) > { > switch (port) { > case PORT_A: > - case PORT_E: > return POWER_DOMAIN_PORT_DDI_A_4_LANES; > case PORT_B: > return POWER_DOMAIN_PORT_DDI_B_4_LANES; > @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain > port_to_power_domain(enum port port) > return POWER_DOMAIN_PORT_DDI_C_4_LANES; > case PORT_D: > return POWER_DOMAIN_PORT_DDI_D_4_LANES; > + case PORT_E: > + return POWER_DOMAIN_PORT_DDI_E_2_LANES; > default: > WARN_ON_ONCE(1); > return POWER_DOMAIN_PORT_OTHER; > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 821644d..af7fdb3 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct > drm_i915_private *dev_priv, > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) > [Zhang, Xiong Y] this line put DDI_E_2_LANES into > SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS, but the git format-patch > doesn’t show > #define SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS. So it isn’t easy to > review this. ops, sorry, I had missed that indeed. looks the right thing to do so, Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > | \ > BIT(POWER_DOMAIN_AUX_B) | \ > BIT(POWER_DOMAIN_AUX_C) | \ > BIT(POWER_DOMAIN_AUX_D) | \ > @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct > drm_i915_private *dev_priv, > #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ > BIT(POWER_DOMAIN_INIT)) > #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain 2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang 2015-08-14 22:22 ` Rodrigo Vivi @ 2015-08-31 15:48 ` Jani Nikula 1 sibling, 0 replies; 11+ messages in thread From: Jani Nikula @ 2015-08-31 15:48 UTC (permalink / raw) To: Xiong Zhang, intel-gfx; +Cc: rodrigo.vivi On Thu, 13 Aug 2015, Xiong Zhang <xiong.y.zhang@intel.com> wrote: > From B spec, DDI_E port belong to PowerWell 2, but > DDI_E share the powerwell_req/staus register bit with > DDI_A which belong to DDI_A_E_POWER_WELL. > > In order to communicate with the connector on DDI-E, both > DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. > > Currently intel_dp_power_get(DDI_E) only enable > DDI_A_E_POWER_WELL, this patch will not only enable > DDI_a_E_POWER_WELL but also enable POWER_WELL_2. > > This patch also fix the DDI-E hotplug function. > > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Pushed to drm-intel-next-fixes. BR, Jani. > --- > drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_display.c | 3 ++- > drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++ > 4 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 86734be..5523b6e 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain) > return "PORT_DDI_D_2_LANES"; > case POWER_DOMAIN_PORT_DDI_D_4_LANES: > return "PORT_DDI_D_4_LANES"; > + case POWER_DOMAIN_PORT_DDI_E_2_LANES: > + return "PORT_DDI_E_2_LANES"; > case POWER_DOMAIN_PORT_DSI: > return "PORT_DSI"; > case POWER_DOMAIN_PORT_CRT: > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index b157865..ee71f90 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -182,6 +182,7 @@ enum intel_display_power_domain { > POWER_DOMAIN_PORT_DDI_C_4_LANES, > POWER_DOMAIN_PORT_DDI_D_2_LANES, > POWER_DOMAIN_PORT_DDI_D_4_LANES, > + POWER_DOMAIN_PORT_DDI_E_2_LANES, > POWER_DOMAIN_PORT_DSI, > POWER_DOMAIN_PORT_CRT, > POWER_DOMAIN_PORT_OTHER, > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 801187c..ccd3f0b 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) > { > switch (port) { > case PORT_A: > - case PORT_E: > return POWER_DOMAIN_PORT_DDI_A_4_LANES; > case PORT_B: > return POWER_DOMAIN_PORT_DDI_B_4_LANES; > @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) > return POWER_DOMAIN_PORT_DDI_C_4_LANES; > case PORT_D: > return POWER_DOMAIN_PORT_DDI_D_4_LANES; > + case PORT_E: > + return POWER_DOMAIN_PORT_DDI_E_2_LANES; > default: > WARN_ON_ONCE(1); > return POWER_DOMAIN_PORT_OTHER; > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 821644d..af7fdb3 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ > BIT(POWER_DOMAIN_AUX_B) | \ > BIT(POWER_DOMAIN_AUX_C) | \ > BIT(POWER_DOMAIN_AUX_D) | \ > @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, > #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) | \ > + BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) | \ > BIT(POWER_DOMAIN_INIT)) > #define SKL_DISPLAY_DDI_B_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915: Adding break for one case 2015-08-13 10:00 [PATCH 1/2] drm/i915: Adding break for one case Xiong Zhang 2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang @ 2015-08-13 10:36 ` Timo Aaltonen 2015-08-13 10:37 ` Timo Aaltonen 2015-08-14 7:12 ` Jani Nikula 2 siblings, 1 reply; 11+ messages in thread From: Timo Aaltonen @ 2015-08-13 10:36 UTC (permalink / raw) To: Xiong Zhang, intel-gfx; +Cc: rodrigo.vivi On 13.08.2015 13:00, Xiong Zhang wrote: > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 65cc5b1..801187c 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, > break; > case PORT_E: > bit = SDE_PORTE_HOTPLUG_SPT; > + break; > default: > return true; > } > shouldn't this belong to [5/6]? -- t _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915: Adding break for one case 2015-08-13 10:36 ` [PATCH 1/2] drm/i915: Adding break for one case Timo Aaltonen @ 2015-08-13 10:37 ` Timo Aaltonen 2015-08-14 9:25 ` Daniel Vetter 0 siblings, 1 reply; 11+ messages in thread From: Timo Aaltonen @ 2015-08-13 10:37 UTC (permalink / raw) To: Xiong Zhang, intel-gfx; +Cc: rodrigo.vivi On 13.08.2015 13:36, Timo Aaltonen wrote: > On 13.08.2015 13:00, Xiong Zhang wrote: >> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> >> --- >> drivers/gpu/drm/i915/intel_display.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c >> index 65cc5b1..801187c 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, >> break; >> case PORT_E: >> bit = SDE_PORTE_HOTPLUG_SPT; >> + break; >> default: >> return true; >> } >> > > shouldn't this belong to [5/6]? Nevermind, I see now that it got merged already. -- t _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915: Adding break for one case 2015-08-13 10:37 ` Timo Aaltonen @ 2015-08-14 9:25 ` Daniel Vetter 2015-08-14 10:41 ` Zhang, Xiong Y 0 siblings, 1 reply; 11+ messages in thread From: Daniel Vetter @ 2015-08-14 9:25 UTC (permalink / raw) To: Timo Aaltonen; +Cc: intel-gfx, rodrigo.vivi On Thu, Aug 13, 2015 at 01:37:49PM +0300, Timo Aaltonen wrote: > On 13.08.2015 13:36, Timo Aaltonen wrote: > > On 13.08.2015 13:00, Xiong Zhang wrote: > >> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > >> --- > >> drivers/gpu/drm/i915/intel_display.c | 1 + > >> 1 file changed, 1 insertion(+) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > >> index 65cc5b1..801187c 100644 > >> --- a/drivers/gpu/drm/i915/intel_display.c > >> +++ b/drivers/gpu/drm/i915/intel_display.c > >> @@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, > >> break; > >> case PORT_E: > >> bit = SDE_PORTE_HOTPLUG_SPT; > >> + break; > >> default: > >> return true; > >> } > >> > > > > shouldn't this belong to [5/6]? > > Nevermind, I see now that it got merged already. I dropped that patch again so that we can rectify this properly. Jani's complaint about the sub-par commit message still holds though, like why was this not caught in testing? -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915: Adding break for one case 2015-08-14 9:25 ` Daniel Vetter @ 2015-08-14 10:41 ` Zhang, Xiong Y 0 siblings, 0 replies; 11+ messages in thread From: Zhang, Xiong Y @ 2015-08-14 10:41 UTC (permalink / raw) To: Daniel Vetter, Timo Aaltonen Cc: intel-gfx@lists.freedesktop.org, Vivi, Rodrigo > On Thu, Aug 13, 2015 at 01:37:49PM +0300, Timo Aaltonen wrote: > > On 13.08.2015 13:36, Timo Aaltonen wrote: > > > On 13.08.2015 13:00, Xiong Zhang wrote: > > >> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> > > >> --- > > >> drivers/gpu/drm/i915/intel_display.c | 1 + > > >> 1 file changed, 1 insertion(+) > > >> > > >> diff --git a/drivers/gpu/drm/i915/intel_display.c > > >> b/drivers/gpu/drm/i915/intel_display.c > > >> index 65cc5b1..801187c 100644 > > >> --- a/drivers/gpu/drm/i915/intel_display.c > > >> +++ b/drivers/gpu/drm/i915/intel_display.c > > >> @@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct > drm_i915_private *dev_priv, > > >> break; > > >> case PORT_E: > > >> bit = SDE_PORTE_HOTPLUG_SPT; > > >> + break; > > >> default: > > >> return true; > > >> } > > >> > > > > > > shouldn't this belong to [5/6]? > > > > Nevermind, I see now that it got merged already. > > I dropped that patch again so that we can rectify this properly. Jani's complaint > about the sub-par commit message still holds though, like why was this not > caught in testing? [Zhang, Xiong Y] Yes, it's better to drop it. I will explain it the commit message and resent the patch. > -Daniel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/2] drm/i915: Adding break for one case 2015-08-13 10:00 [PATCH 1/2] drm/i915: Adding break for one case Xiong Zhang 2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang 2015-08-13 10:36 ` [PATCH 1/2] drm/i915: Adding break for one case Timo Aaltonen @ 2015-08-14 7:12 ` Jani Nikula 2 siblings, 0 replies; 11+ messages in thread From: Jani Nikula @ 2015-08-14 7:12 UTC (permalink / raw) To: Xiong Zhang, intel-gfx; +Cc: rodrigo.vivi On Thu, 13 Aug 2015, Xiong Zhang <xiong.y.zhang@intel.com> wrote: > Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com> Even for a small patch like this, your commit message is inadequate. First, it's obvious from the code that you're adding a break for one case. Instead, you should explain what bug you fix. If someone hits this bug and is looking for a fix, he's not going to find your patch with this title. Second, that break was omitted from or removed by some commit, and you should find out which one it was, and reference it in your commit message. It's helpful for everyone, and particularly for maintainers and backporters who need to find that out anyway to decide where this fix should be applied. Thanks, Jani. > --- > drivers/gpu/drm/i915/intel_display.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 65cc5b1..801187c 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1100,6 +1100,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, > break; > case PORT_E: > bit = SDE_PORTE_HOTPLUG_SPT; > + break; > default: > return true; > } > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2015-08-31 15:48 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-08-13 10:00 [PATCH 1/2] drm/i915: Adding break for one case Xiong Zhang 2015-08-13 10:00 ` [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain Xiong Zhang 2015-08-14 22:22 ` Rodrigo Vivi 2015-08-17 1:50 ` Zhang, Xiong Y 2015-08-24 23:59 ` Vivi, Rodrigo 2015-08-31 15:48 ` Jani Nikula 2015-08-13 10:36 ` [PATCH 1/2] drm/i915: Adding break for one case Timo Aaltonen 2015-08-13 10:37 ` Timo Aaltonen 2015-08-14 9:25 ` Daniel Vetter 2015-08-14 10:41 ` Zhang, Xiong Y 2015-08-14 7:12 ` Jani Nikula
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