All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	barebox@lists.infradead.org,
	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Subject: Re: [PATCH 07/17] mtd: nand_mrvl_nfc: Use Auto Read Status on program/erase
Date: Sat, 10 Oct 2015 11:36:31 +0200	[thread overview]
Message-ID: <5618DC1F.90800@gmail.com> (raw)
In-Reply-To: <87a8rr864c.fsf@belgarion.home>

On 10.10.2015 10:44, Robert Jarzmik wrote:
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> writes:
>
>> Marvell NAND controller allows to enable an Auto Read Status feature
>> that will monitor NAND status during Erase and Program operations.
>
> Okay, I seem to remember barebox nand core code does read it after erase and
> write anyway by issuing a status read command. Could you tell me what this
> brings I don't see ?

The Auto RS feature makes the controller poll NAND status and holds
the READY bit until it is sure the NAND has finished erase/pageprog
command.

I have timeout issues without it and I am pretty sure it just hides
some timing misconfiguration on my side. _But_ at this point I think
it is better than reworking timing setup now. I will have a deeper look
at timing configuration for sure but this involves in-depth PXA vs
Armada (vs Berlin) timing register comparison.

And the reason why I didn't do any timing rework is that DT
infrastructure for passing timing information, ONFI parsing, aso
is still very vague. I really need more time to think about the
best way to deal with it.

For example, ONFI timings give you a set of timings but they do
not specify tPROG, tERASE and friends. Those have to be parsed
from some other ONFI commands. I really want to do this step
by step and it has to be in-sync with Linux mtd... something
that would stall NAND support on Armada a little while.

Bottom-line: If the Auto RS feature doesn't break PXA, I'd
appreciate if it is enabled at least until I can confirm
proper timings are being read for the device I have.

Sebastian



_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  reply	other threads:[~2015-10-10  9:36 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-08 22:06 [PATCH 00/17] Armada 370/XP NAND driver Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 01/17] arm: pxa: Prepare for NAND clkdev lookup on PXA3xx Sebastian Hesselbarth
2015-10-09 19:11   ` Robert Jarzmik
2015-10-09 19:13     ` Robert Jarzmik
2015-10-10  8:34   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 02/17] mtd: nand_mrvl_nfc: Use common clock for core clock Sebastian Hesselbarth
2015-10-10  8:35   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 03/17] mtd: nand: Clarify Marvell Orion Kconfig prompt Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 04/17] arm: pxa: Remove pxa_get_nandclk() Sebastian Hesselbarth
2015-10-10  8:35   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 05/17] mtd: nand_mrvl_nfc: Remove keep_config Sebastian Hesselbarth
2015-10-09 19:16   ` Robert Jarzmik
2015-10-09 19:32     ` Sebastian Hesselbarth
2015-10-09 21:14       ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 06/17] mtd: nand_mrvl_nfc: Clear OOB data with 0xff instead of 0x00 Sebastian Hesselbarth
2015-10-10  8:38   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 07/17] mtd: nand_mrvl_nfc: Use Auto Read Status on program/erase Sebastian Hesselbarth
2015-10-10  8:44   ` Robert Jarzmik
2015-10-10  9:36     ` Sebastian Hesselbarth [this message]
2015-10-10  9:49       ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 08/17] mtd: nand_mrvl_nfc: Fix num-cs property parsing Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 09/17] mtd: nand_mrvl_nfc: Get ecc parameters from DT Sebastian Hesselbarth
2015-10-11 20:39   ` Robert Jarzmik
2015-10-12  6:28     ` Sascha Hauer
2015-10-12  7:32       ` Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 10/17] mtd: nand_mrvl_nfc: Prepare for different HW ECC strengths Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 11/17] mtd: nand_mrvl_nfc: Add hwflags to distinguish different HW versions Sebastian Hesselbarth
2015-10-12  6:33   ` Sascha Hauer
2015-10-08 22:06 ` [PATCH 12/17] mtd: nand_mrvl_nfc: Add support for 4bit BCH HW ECC Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 13/17] mtd: nand_mrvl_nfc: Add support for 8bit " Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 14/17] mtd: nand_mrvl_nfc: Add support for HW BCH ECC Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 15/17] mtd: nand_mrvl_nfc: Add support for NDCB3 register Sebastian Hesselbarth
2015-10-10  8:48   ` Robert Jarzmik
2015-10-10 17:17     ` Sebastian Hesselbarth
2015-10-08 22:06 ` [PATCH 16/17] mtd: nand_mrvl_nfc: Add support for Marvell Armada 370/XP Sebastian Hesselbarth
2015-10-10  8:48   ` Robert Jarzmik
2015-10-08 22:06 ` [PATCH 17/17] mtd: nand_mrvl_nfc: Add optimized timings for Samsung K9K8G08U Sebastian Hesselbarth
2015-10-12 10:38 ` [PATCH 00/17] Armada 370/XP NAND driver Robert Jarzmik
2015-10-12 18:41   ` Sebastian Hesselbarth
2015-10-12 19:16     ` Robert Jarzmik
2015-10-12 19:59       ` Sebastian Hesselbarth
2015-10-13  9:35         ` Robert Jarzmik
2015-10-13  9:53           ` Sebastian Hesselbarth
2015-10-13 10:27             ` Sascha Hauer
2015-10-13 10:38               ` Robert Jarzmik
2015-10-13 10:54                 ` Sascha Hauer
2015-10-15 21:17                 ` Sebastian Hesselbarth
2015-10-16 18:40                   ` Robert Jarzmik
2015-10-16 19:32                     ` Sebastian Hesselbarth
2015-10-20 19:25                     ` Robert Jarzmik
2015-11-19 23:16                       ` Sebastian Hesselbarth
2015-11-20  7:18                         ` Robert Jarzmik
2015-10-12 17:55 ` [PATCH] of: mtd: Import of_get_nand_ecc_{step_size, strength} from Linux Sebastian Hesselbarth

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5618DC1F.90800@gmail.com \
    --to=sebastian.hesselbarth@gmail.com \
    --cc=barebox@lists.infradead.org \
    --cc=ezequiel@vanguardiasur.com.ar \
    --cc=robert.jarzmik@free.fr \
    --cc=thomas.petazzoni@free-electrons.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.