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From: Laxman Dewangan <ldewangan@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: swarren@wwwdotorg.org, linus.walleij@linaro.org,
	gnurou@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
	jonathanh@nvidia.com, linux-tegra@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition
Date: Tue, 12 Apr 2016 22:28:10 +0530	[thread overview]
Message-ID: <570D2922.7050403@nvidia.com> (raw)
In-Reply-To: <20160412152642.GA30211@ulmo.ba.sec>


On Tuesday 12 April 2016 08:56 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Tue, Apr 12, 2016 at 08:26:41PM +0530, Laxman Dewangan wrote:
>> Use BIT macro for register field definition and make constant as
>> unsigned when using in shift operator like instead of (3 << 30),
>> make it to (3U << 30).
>>
>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>> ---
>>   drivers/soc/tegra/pmc.c | 42 +++++++++++++++++++++---------------------
>>   1 file changed, 21 insertions(+), 21 deletions(-)
> Does this matter at all? We use the explicit notation in quite a number
> of places and it works great. I'd like to avoid needless churn unless
> there is a very good reason to switch.

When I run the checkpatch, I got the error and thought that better to 
fix and cleanup some warning/error from checkpatch.
This is just part of cleanups and properly defining constant like 3U 
instead of 3 to avoid any issue.




WARNING: multiple messages have this Message-ID (diff)
From: Laxman Dewangan <ldewangan@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: <swarren@wwwdotorg.org>, <linus.walleij@linaro.org>,
	<gnurou@gmail.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<jonathanh@nvidia.com>, <linux-tegra@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-gpio@vger.kernel.org>
Subject: Re: [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition
Date: Tue, 12 Apr 2016 22:28:10 +0530	[thread overview]
Message-ID: <570D2922.7050403@nvidia.com> (raw)
In-Reply-To: <20160412152642.GA30211@ulmo.ba.sec>


On Tuesday 12 April 2016 08:56 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Tue, Apr 12, 2016 at 08:26:41PM +0530, Laxman Dewangan wrote:
>> Use BIT macro for register field definition and make constant as
>> unsigned when using in shift operator like instead of (3 << 30),
>> make it to (3U << 30).
>>
>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>> ---
>>   drivers/soc/tegra/pmc.c | 42 +++++++++++++++++++++---------------------
>>   1 file changed, 21 insertions(+), 21 deletions(-)
> Does this matter at all? We use the explicit notation in quite a number
> of places and it works great. I'd like to avoid needless churn unless
> there is a very good reason to switch.

When I run the checkpatch, I got the error and thought that better to 
fix and cleanup some warning/error from checkpatch.
This is just part of cleanups and properly defining constant like 3U 
instead of 3 to avoid any issue.

  reply	other threads:[~2016-04-12 17:09 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-12 14:56 [PATCH 0/7] pinctrl: soc/tegra: Add support to configure IO rail voltage and pad power states Laxman Dewangan
2016-04-12 14:56 ` Laxman Dewangan
     [not found] ` <1460473007-11535-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 14:56   ` [PATCH 1/7] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
2016-04-12 14:56     ` Laxman Dewangan
     [not found]     ` <1460473007-11535-2-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:26       ` Thierry Reding
2016-04-12 15:26         ` Thierry Reding
2016-04-12 16:58         ` Laxman Dewangan [this message]
2016-04-12 16:58           ` Laxman Dewangan
2016-04-15  7:44         ` Linus Walleij
2016-04-12 14:56 ` [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
     [not found]   ` <1460473007-11535-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 15:28     ` Thierry Reding
2016-04-12 15:28       ` Thierry Reding
     [not found]       ` <20160412152830.GB30211-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-04-12 16:59         ` Laxman Dewangan
2016-04-12 16:59           ` Laxman Dewangan
2016-04-12 18:03           ` Jon Hunter
2016-04-12 18:03             ` Jon Hunter
2016-04-12 17:57             ` Laxman Dewangan
2016-04-12 17:57               ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 3/7] soc/tegra: pmc: Add interface to get IO rail power status Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
     [not found]   ` <1460473007-11535-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-12 18:06     ` kbuild test robot
2016-04-12 18:06       ` kbuild test robot
2016-04-12 18:13     ` Jon Hunter
2016-04-12 18:13       ` Jon Hunter
2016-04-12 14:56 ` [PATCH 4/7] soc/tegra: pmc: Add interface to set voltage of IO rails Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
2016-04-13  8:47   ` Jon Hunter
2016-04-13  8:47     ` Jon Hunter
2016-04-13  9:00     ` Laxman Dewangan
2016-04-13  9:00       ` Laxman Dewangan
2016-04-13  9:25       ` Jon Hunter
2016-04-13  9:25         ` Jon Hunter
     [not found]         ` <570E109D.6070805-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13  9:20           ` Laxman Dewangan
2016-04-13  9:20             ` Laxman Dewangan
2016-04-13  9:56             ` Jon Hunter
2016-04-13  9:56               ` Jon Hunter
     [not found]   ` <1460473007-11535-5-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15  7:54     ` Linus Walleij
2016-04-15  7:54       ` Linus Walleij
     [not found]       ` <CACRpkdbueJ=0+WtNefQ7GHoqU5HY7WFYjL2geFq4vkpTbZesZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15  8:00         ` Mark Brown
2016-04-15  8:00           ` Mark Brown
     [not found]           ` <20160415080027.GB3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-04-15  8:25             ` Laxman Dewangan
2016-04-15  8:25               ` Laxman Dewangan
     [not found]               ` <5710A583.2010102-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15  9:19                 ` Linus Walleij
2016-04-15  9:19                   ` Linus Walleij
2016-04-15 16:24   ` Stephen Warren
2016-04-15 16:21     ` Laxman Dewangan
2016-04-15 16:21       ` Laxman Dewangan
     [not found]       ` <57111524.60708-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:41         ` Stephen Warren
2016-04-15 16:41           ` Stephen Warren
     [not found]           ` <571119D5.3040309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-04-15 16:33             ` Laxman Dewangan
2016-04-15 16:33               ` Laxman Dewangan
2016-04-15 16:59               ` Stephen Warren
2016-04-12 14:56 ` [PATCH 5/7] soc/tegra: pmc: Register sub-devices of PMC Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
     [not found]   ` <1460473007-11535-6-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:31     ` Stephen Warren
2016-04-15 16:31       ` Stephen Warren
2016-04-12 14:56 ` [PATCH 6/7] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
2016-04-13  9:04   ` Jon Hunter
2016-04-13  9:04     ` Jon Hunter
     [not found]     ` <570E0BAE.8090404-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-13  9:08       ` Laxman Dewangan
2016-04-13  9:08         ` Laxman Dewangan
2016-04-13  9:31         ` Jon Hunter
2016-04-13  9:31           ` Jon Hunter
2016-04-15 14:16   ` Jon Hunter
2016-04-15 14:16     ` Jon Hunter
2016-04-15 14:12     ` Laxman Dewangan
2016-04-15 14:12       ` Laxman Dewangan
     [not found]       ` <5710F6CA.6060700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14         ` Jon Hunter
2016-04-15 15:14           ` Jon Hunter
     [not found]           ` <57110560.80004-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 15:14             ` Laxman Dewangan
2016-04-15 15:14               ` Laxman Dewangan
2016-04-15 15:45               ` Jon Hunter
2016-04-15 15:45                 ` Jon Hunter
2016-04-15 16:41                 ` Laxman Dewangan
2016-04-15 16:41                   ` Laxman Dewangan
2016-04-15 17:44                   ` Jon Hunter
2016-04-15 17:44                     ` Jon Hunter
     [not found]                     ` <5711288D.7060701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 17:49                       ` Laxman Dewangan
2016-04-15 17:49                         ` Laxman Dewangan
2016-04-15 18:30                         ` Jon Hunter
2016-04-15 18:30                           ` Jon Hunter
     [not found]                           ` <57113340.6090701-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 18:43                             ` Laxman Dewangan
2016-04-15 18:43                               ` Laxman Dewangan
2016-04-15 16:35   ` Stephen Warren
2016-04-15 16:31     ` Laxman Dewangan
2016-04-15 16:31       ` Laxman Dewangan
2016-04-12 14:56 ` [PATCH 7/7] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
2016-04-12 14:56   ` Laxman Dewangan
2016-04-15  8:08   ` Linus Walleij
2016-04-15  8:39     ` Laxman Dewangan
2016-04-15  9:25       ` Linus Walleij
2016-04-15  9:55         ` Laxman Dewangan
2016-04-15 11:15           ` Linus Walleij
     [not found]             ` <CACRpkdbr-9Z1JKMVmwNFyMq+Pg+3hT5c9rKZ1y4wZecnidW9Cg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-15 11:47               ` Laxman Dewangan
2016-04-15 11:47                 ` Laxman Dewangan
2016-04-15 14:03                 ` Linus Walleij
2016-04-15 13:59                   ` Laxman Dewangan
     [not found]                     ` <5710F3DC.7090906-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-19  9:49                       ` Laxman Dewangan
2016-04-19  9:49                         ` Laxman Dewangan
2016-04-26 13:32                 ` Laxman Dewangan
2016-04-26 15:31                   ` Stephen Warren
     [not found]       ` <5710A8A4.90309-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-04-15 16:38         ` Stephen Warren
2016-04-15 16:38           ` Stephen Warren

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