* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-02-26 19:18 ` Lucas Stach
0 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-02-26 19:18 UTC (permalink / raw)
To: Thierry Reding, Alexandre Courbot, Stephen Warren
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, ARM kernel mailing list
Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
to the mux settings on those pins to not be applied.
Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
which makes some more SD-cards work.
Signed-off-by: Lucas Stach <dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
---
arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3dede39..1daed40 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -255,14 +255,14 @@
};
sdmmc3_dat6_pd3 {
nvidia,pins = "sdmmc3_dat6_pd3";
- nvidia,function = "rsvd1";
+ nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc3_dat7_pd4 {
nvidia,pins = "sdmmc3_dat7_pd4";
- nvidia,function = "rsvd1";
+ nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -276,14 +276,14 @@
};
vi_vsync_pd6 {
nvidia,pins = "vi_vsync_pd6";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_hsync_pd7 {
nvidia,pins = "vi_hsync_pd7";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -801,7 +801,7 @@
};
hdmi_int_pn7 {
nvidia,pins = "hdmi_int_pn7";
- nvidia,function = "rsvd1";
+ nvidia,function = "hdmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -836,7 +836,7 @@
};
ulpi_data3_po4 {
nvidia,pins = "ulpi_data3_po4";
- nvidia,function = "rsvd1";
+ nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1102,21 +1102,21 @@
};
vi_d10_pt2 {
nvidia,pins = "vi_d10_pt2";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d11_pt3 {
nvidia,pins = "vi_d11_pt3";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d0_pt4 {
nvidia,pins = "vi_d0_pt4";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1146,7 +1146,7 @@
};
pu0 {
nvidia,pins = "pu0";
- nvidia,function = "rsvd1";
+ nvidia,function = "owr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1167,7 +1167,7 @@
};
pu3 {
nvidia,pins = "pu3";
- nvidia,function = "rsvd1";
+ nvidia,function = "pwm0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1188,7 +1188,7 @@
};
pu6 {
nvidia,pins = "pu6";
- nvidia,function = "rsvd1";
+ nvidia,function = "pwm3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1216,7 +1216,7 @@
};
pv3 {
nvidia,pins = "pv3";
- nvidia,function = "rsvd1";
+ nvidia,function = "clk_12m_out";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
@@ -1505,7 +1505,7 @@
};
pbb0 {
nvidia,pins = "pbb0";
- nvidia,function = "rsvd1";
+ nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1570,7 +1570,7 @@
};
pcc1 {
nvidia,pins = "pcc1";
- nvidia,function = "rsvd1";
+ nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1718,6 +1718,15 @@
nvidia,slew-rate-rising = <1>;
nvidia,slew-rate-falling = <1>;
};
+ sdio1 {
+ nvidia,pins = "drive_sdio1";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <1>;
+ nvidia,slew-rate-falling = <1>;
+ };
gpv {
nvidia,pins = "drive_gpv";
nvidia,pull-up-strength = <16>;
--
2.5.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-02-26 19:18 ` Lucas Stach
0 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-02-26 19:18 UTC (permalink / raw)
To: linux-arm-kernel
Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
to the mux settings on those pins to not be applied.
Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
which makes some more SD-cards work.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
---
arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3dede39..1daed40 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -255,14 +255,14 @@
};
sdmmc3_dat6_pd3 {
nvidia,pins = "sdmmc3_dat6_pd3";
- nvidia,function = "rsvd1";
+ nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc3_dat7_pd4 {
nvidia,pins = "sdmmc3_dat7_pd4";
- nvidia,function = "rsvd1";
+ nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -276,14 +276,14 @@
};
vi_vsync_pd6 {
nvidia,pins = "vi_vsync_pd6";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_hsync_pd7 {
nvidia,pins = "vi_hsync_pd7";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -801,7 +801,7 @@
};
hdmi_int_pn7 {
nvidia,pins = "hdmi_int_pn7";
- nvidia,function = "rsvd1";
+ nvidia,function = "hdmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -836,7 +836,7 @@
};
ulpi_data3_po4 {
nvidia,pins = "ulpi_data3_po4";
- nvidia,function = "rsvd1";
+ nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1102,21 +1102,21 @@
};
vi_d10_pt2 {
nvidia,pins = "vi_d10_pt2";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d11_pt3 {
nvidia,pins = "vi_d11_pt3";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d0_pt4 {
nvidia,pins = "vi_d0_pt4";
- nvidia,function = "rsvd1";
+ nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1146,7 +1146,7 @@
};
pu0 {
nvidia,pins = "pu0";
- nvidia,function = "rsvd1";
+ nvidia,function = "owr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1167,7 +1167,7 @@
};
pu3 {
nvidia,pins = "pu3";
- nvidia,function = "rsvd1";
+ nvidia,function = "pwm0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1188,7 +1188,7 @@
};
pu6 {
nvidia,pins = "pu6";
- nvidia,function = "rsvd1";
+ nvidia,function = "pwm3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1216,7 +1216,7 @@
};
pv3 {
nvidia,pins = "pv3";
- nvidia,function = "rsvd1";
+ nvidia,function = "clk_12m_out";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
@@ -1505,7 +1505,7 @@
};
pbb0 {
nvidia,pins = "pbb0";
- nvidia,function = "rsvd1";
+ nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1570,7 +1570,7 @@
};
pcc1 {
nvidia,pins = "pcc1";
- nvidia,function = "rsvd1";
+ nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1718,6 +1718,15 @@
nvidia,slew-rate-rising = <1>;
nvidia,slew-rate-falling = <1>;
};
+ sdio1 {
+ nvidia,pins = "drive_sdio1";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <1>;
+ nvidia,slew-rate-falling = <1>;
+ };
gpv {
nvidia,pins = "drive_gpv";
nvidia,pull-up-strength = <16>;
--
2.5.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-02-26 19:18 ` Lucas Stach
@ 2016-04-21 18:16 ` Lucas Stach
-1 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-04-21 18:16 UTC (permalink / raw)
To: Thierry Reding, Alexandre Courbot, Stephen Warren
Cc: linux-tegra, ARM kernel mailing list
Am Freitag, den 26.02.2016, 20:18 +0100 schrieb Lucas Stach:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which
> lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for
> SDIO1,
> which makes some more SD-cards work.
>
Just a gentle ping on this patch, as I haven't seen it being applied
anywhere.
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--
> ------------
> 1 file changed, 24 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra30-beaver.dts
> b/arch/arm/boot/dts/tegra30-beaver.dts
> index 3dede39..1daed40 100644
> --- a/arch/arm/boot/dts/tegra30-beaver.dts
> +++ b/arch/arm/boot/dts/tegra30-beaver.dts
> @@ -255,14 +255,14 @@
> };
> sdmmc3_dat6_pd3 {
> nvidia,pins = "sdmmc3_dat6_pd3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "spdif";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> };
> sdmmc3_dat7_pd4 {
> nvidia,pins = "sdmmc3_dat7_pd4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "spdif";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -276,14 +276,14 @@
> };
> vi_vsync_pd6 {
> nvidia,pins = "vi_vsync_pd6";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> };
> vi_hsync_pd7 {
> nvidia,pins = "vi_hsync_pd7";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -801,7 +801,7 @@
> };
> hdmi_int_pn7 {
> nvidia,pins = "hdmi_int_pn7";
> - nvidia,function = "rsvd1";
> + nvidia,function = "hdmi";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_ENABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -836,7 +836,7 @@
> };
> ulpi_data3_po4 {
> nvidia,pins = "ulpi_data3_po4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "uarta";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1102,21 +1102,21 @@
> };
> vi_d10_pt2 {
> nvidia,pins = "vi_d10_pt2";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> };
> vi_d11_pt3 {
> nvidia,pins = "vi_d11_pt3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> nvidia,pull = <TEGRA_PIN_PULL_UP>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> };
> vi_d0_pt4 {
> nvidia,pins = "vi_d0_pt4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1146,7 +1146,7 @@
> };
> pu0 {
> nvidia,pins = "pu0";
> - nvidia,function = "rsvd1";
> + nvidia,function = "owr";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1167,7 +1167,7 @@
> };
> pu3 {
> nvidia,pins = "pu3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "pwm0";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1188,7 +1188,7 @@
> };
> pu6 {
> nvidia,pins = "pu6";
> - nvidia,function = "rsvd1";
> + nvidia,function = "pwm3";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1216,7 +1216,7 @@
> };
> pv3 {
> nvidia,pins = "pv3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "clk_12m_out";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_DISABLE>;
> @@ -1505,7 +1505,7 @@
> };
> pbb0 {
> nvidia,pins = "pbb0";
> - nvidia,function = "rsvd1";
> + nvidia,function = "i2s4";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1570,7 +1570,7 @@
> };
> pcc1 {
> nvidia,pins = "pcc1";
> - nvidia,function = "rsvd1";
> + nvidia,function = "i2s4";
> nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1718,6 +1718,15 @@
> nvidia,slew-rate-rising = <1>;
> nvidia,slew-rate-falling = <1>;
> };
> + sdio1 {
> + nvidia,pins = "drive_sdio1";
> + nvidia,high-speed-mode =
> <TEGRA_PIN_DISABLE>;
> + nvidia,schmitt =
> <TEGRA_PIN_DISABLE>;
> + nvidia,pull-down-strength = <46>;
> + nvidia,pull-up-strength = <42>;
> + nvidia,slew-rate-rising = <1>;
> + nvidia,slew-rate-falling = <1>;
> + };
> gpv {
> nvidia,pins = "drive_gpv";
> nvidia,pull-up-strength = <16>;
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-04-21 18:16 ` Lucas Stach
0 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-04-21 18:16 UTC (permalink / raw)
To: linux-arm-kernel
Am Freitag, den 26.02.2016, 20:18 +0100 schrieb Lucas Stach:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which
> lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for
> SDIO1,
> which makes some more SD-cards work.
>
Just a gentle ping on this patch, as I haven't seen it being applied
anywhere.
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> ?arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--
> ------------
> ?1 file changed, 24 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra30-beaver.dts
> b/arch/arm/boot/dts/tegra30-beaver.dts
> index 3dede39..1daed40 100644
> --- a/arch/arm/boot/dts/tegra30-beaver.dts
> +++ b/arch/arm/boot/dts/tegra30-beaver.dts
> @@ -255,14 +255,14 @@
> ? };
> ? sdmmc3_dat6_pd3 {
> ? nvidia,pins = "sdmmc3_dat6_pd3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "spdif";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> ? };
> ? sdmmc3_dat7_pd4 {
> ? nvidia,pins = "sdmmc3_dat7_pd4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "spdif";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -276,14 +276,14 @@
> ? };
> ? vi_vsync_pd6 {
> ? nvidia,pins = "vi_vsync_pd6";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> ? };
> ? vi_hsync_pd7 {
> ? nvidia,pins = "vi_hsync_pd7";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -801,7 +801,7 @@
> ? };
> ? hdmi_int_pn7 {
> ? nvidia,pins = "hdmi_int_pn7";
> - nvidia,function = "rsvd1";
> + nvidia,function = "hdmi";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_ENABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -836,7 +836,7 @@
> ? };
> ? ulpi_data3_po4 {
> ? nvidia,pins = "ulpi_data3_po4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "uarta";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1102,21 +1102,21 @@
> ? };
> ? vi_d10_pt2 {
> ? nvidia,pins = "vi_d10_pt2";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> ? };
> ? vi_d11_pt3 {
> ? nvidia,pins = "vi_d11_pt3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> ? nvidia,pull = <TEGRA_PIN_PULL_UP>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> ? };
> ? vi_d0_pt4 {
> ? nvidia,pins = "vi_d0_pt4";
> - nvidia,function = "rsvd1";
> + nvidia,function = "ddr";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1146,7 +1146,7 @@
> ? };
> ? pu0 {
> ? nvidia,pins = "pu0";
> - nvidia,function = "rsvd1";
> + nvidia,function = "owr";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1167,7 +1167,7 @@
> ? };
> ? pu3 {
> ? nvidia,pins = "pu3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "pwm0";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1188,7 +1188,7 @@
> ? };
> ? pu6 {
> ? nvidia,pins = "pu6";
> - nvidia,function = "rsvd1";
> + nvidia,function = "pwm3";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1216,7 +1216,7 @@
> ? };
> ? pv3 {
> ? nvidia,pins = "pv3";
> - nvidia,function = "rsvd1";
> + nvidia,function = "clk_12m_out";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_DISABLE>;
> @@ -1505,7 +1505,7 @@
> ? };
> ? pbb0 {
> ? nvidia,pins = "pbb0";
> - nvidia,function = "rsvd1";
> + nvidia,function = "i2s4";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1570,7 +1570,7 @@
> ? };
> ? pcc1 {
> ? nvidia,pins = "pcc1";
> - nvidia,function = "rsvd1";
> + nvidia,function = "i2s4";
> ? nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> ? nvidia,tristate =
> <TEGRA_PIN_DISABLE>;
> ? nvidia,enable-input =
> <TEGRA_PIN_ENABLE>;
> @@ -1718,6 +1718,15 @@
> ? nvidia,slew-rate-rising = <1>;
> ? nvidia,slew-rate-falling = <1>;
> ? };
> + sdio1 {
> + nvidia,pins = "drive_sdio1";
> + nvidia,high-speed-mode =
> <TEGRA_PIN_DISABLE>;
> + nvidia,schmitt =
> <TEGRA_PIN_DISABLE>;
> + nvidia,pull-down-strength = <46>;
> + nvidia,pull-up-strength = <42>;
> + nvidia,slew-rate-rising = <1>;
> + nvidia,slew-rate-falling = <1>;
> + };
> ? gpv {
> ? nvidia,pins = "drive_gpv";
> ? nvidia,pull-up-strength = <16>;
^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <1456514310-27605-1-git-send-email-dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>]
* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-02-26 19:18 ` Lucas Stach
@ 2016-02-26 19:28 ` Stephen Warren
-1 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-02-26 19:28 UTC (permalink / raw)
To: Lucas Stach
Cc: Thierry Reding, Alexandre Courbot,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, ARM kernel mailing list
On 02/26/2016 12:18 PM, Lucas Stach wrote:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
> which makes some more SD-cards work.
I replied the following to V1, which I don't see resolved:
> I think it would be worth mentioning in the commit description where
> this[1] data came from.
[1] that was in response to the addition of the sdio1 drive settings.
Also, what is different in V2; is this actually V1 REPOST?
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-02-26 19:28 ` Stephen Warren
0 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-02-26 19:28 UTC (permalink / raw)
To: linux-arm-kernel
On 02/26/2016 12:18 PM, Lucas Stach wrote:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
> which makes some more SD-cards work.
I replied the following to V1, which I don't see resolved:
> I think it would be worth mentioning in the commit description where
> this[1] data came from.
[1] that was in response to the addition of the sdio1 drive settings.
Also, what is different in V2; is this actually V1 REPOST?
^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <56D0A748.6060104-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-02-26 19:28 ` Stephen Warren
@ 2016-02-26 19:36 ` Lucas Stach
-1 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-02-26 19:36 UTC (permalink / raw)
To: Stephen Warren
Cc: Thierry Reding, Alexandre Courbot,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, ARM kernel mailing list
Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:
> On 02/26/2016 12:18 PM, Lucas Stach wrote:
> > Update pinmux to get rid of invalid uses of the rsvd1 function,
> > which lead
> > to the mux settings on those pins to not be applied.
> >
> > Also add correct drive settings, derived from the Tegra3 TRM, for
Your comment from v1 is addressed here ^^^^^^^^^^^^^^^^^^^^^^^^
> > SDIO1,
> > which makes some more SD-cards work.
>
> I replied the following to V1, which I don't see resolved:
>
> > I think it would be worth mentioning in the commit description
> where
> > this[1] data came from.
>
> [1] that was in response to the addition of the sdio1 drive settings.
>
> Also, what is different in V2; is this actually V1 REPOST?
Other than the reworded commit message there is no change in v2.
Regards,
Lucas
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-02-26 19:36 ` Lucas Stach
0 siblings, 0 replies; 14+ messages in thread
From: Lucas Stach @ 2016-02-26 19:36 UTC (permalink / raw)
To: linux-arm-kernel
Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:
> On 02/26/2016 12:18 PM, Lucas Stach wrote:
> > Update pinmux to get rid of invalid uses of the rsvd1 function,
> > which lead
> > to the mux settings on those pins to not be applied.
> >
> > Also add correct drive settings, derived from the Tegra3 TRM, for
Your comment from v1 is addressed here ?^^^^^^^^^^^^^^^^^^^^^^^^
> > SDIO1,
> > which makes some more SD-cards work.
>
> I replied the following to V1, which I don't see resolved:
>
> ?> I think it would be worth mentioning in the commit description
> where?
> ?> this[1] data came from.
>
> [1] that was in response to the addition of the sdio1 drive settings.
>
> Also, what is different in V2; is this actually V1 REPOST?
Other than the reworded commit message there is no change in v2.
Regards,
Lucas
^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <1456515384.20487.2.camel-8ppwABl0HbeELgA04lAiVw@public.gmane.org>]
* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-02-26 19:36 ` Lucas Stach
@ 2016-02-26 19:53 ` Stephen Warren
-1 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-02-26 19:53 UTC (permalink / raw)
To: Lucas Stach
Cc: Thierry Reding, Alexandre Courbot,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, ARM kernel mailing list
On 02/26/2016 12:36 PM, Lucas Stach wrote:
> Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:
>> On 02/26/2016 12:18 PM, Lucas Stach wrote:
>>> Update pinmux to get rid of invalid uses of the rsvd1 function,
>>> which lead
>>> to the mux settings on those pins to not be applied.
>>>
>>> Also add correct drive settings, derived from the Tegra3 TRM, for
>
> Your comment from v1 is addressed here ^^^^^^^^^^^^^^^^^^^^^^^^
Oh right, sorry about that.
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-02-26 19:53 ` Stephen Warren
0 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-02-26 19:53 UTC (permalink / raw)
To: linux-arm-kernel
On 02/26/2016 12:36 PM, Lucas Stach wrote:
> Am Freitag, den 26.02.2016, 12:28 -0700 schrieb Stephen Warren:
>> On 02/26/2016 12:18 PM, Lucas Stach wrote:
>>> Update pinmux to get rid of invalid uses of the rsvd1 function,
>>> which lead
>>> to the mux settings on those pins to not be applied.
>>>
>>> Also add correct drive settings, derived from the Tegra3 TRM, for
>
> Your comment from v1 is addressed here ^^^^^^^^^^^^^^^^^^^^^^^^
Oh right, sorry about that.
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-02-26 19:18 ` Lucas Stach
@ 2016-04-22 11:46 ` Thierry Reding
-1 siblings, 0 replies; 14+ messages in thread
From: Thierry Reding @ 2016-04-22 11:46 UTC (permalink / raw)
To: Lucas Stach, Stephen Warren
Cc: Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
ARM kernel mailing list
[-- Attachment #1: Type: text/plain, Size: 709 bytes --]
On Fri, Feb 26, 2016 at 08:18:30PM +0100, Lucas Stach wrote:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
> which makes some more SD-cards work.
>
> Signed-off-by: Lucas Stach <dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
> ---
> arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
> 1 file changed, 24 insertions(+), 15 deletions(-)
Applied, thanks.
Stephen, you had looked at this before. If you're happy with it, would
you mind providing an Acked-by? I can apply it after the fact.
Thierry
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-04-22 11:46 ` Thierry Reding
0 siblings, 0 replies; 14+ messages in thread
From: Thierry Reding @ 2016-04-22 11:46 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 26, 2016 at 08:18:30PM +0100, Lucas Stach wrote:
> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
> to the mux settings on those pins to not be applied.
>
> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
> which makes some more SD-cards work.
>
> Signed-off-by: Lucas Stach <dev@lynxeye.de>
> ---
> arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
> 1 file changed, 24 insertions(+), 15 deletions(-)
Applied, thanks.
Stephen, you had looked at this before. If you're happy with it, would
you mind providing an Acked-by? I can apply it after the fact.
Thierry
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160422/c9a7b252/attachment.sig>
^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <20160422114642.GD9047-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>]
* Re: [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
2016-04-22 11:46 ` Thierry Reding
@ 2016-04-22 18:00 ` Stephen Warren
-1 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-04-22 18:00 UTC (permalink / raw)
To: Thierry Reding, Lucas Stach
Cc: Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
ARM kernel mailing list
On 04/22/2016 05:46 AM, Thierry Reding wrote:
> On Fri, Feb 26, 2016 at 08:18:30PM +0100, Lucas Stach wrote:
>> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
>> to the mux settings on those pins to not be applied.
>>
>> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
>> which makes some more SD-cards work.
>>
>> Signed-off-by: Lucas Stach <dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
>> ---
>> arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
>> 1 file changed, 24 insertions(+), 15 deletions(-)
>
> Applied, thanks.
>
> Stephen, you had looked at this before. If you're happy with it, would
> you mind providing an Acked-by? I can apply it after the fact.
Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
This appears to match a recent change in tegra-pinmux-scripts.git.
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] ARM: dts: tegra: correct Beaver pinmux
@ 2016-04-22 18:00 ` Stephen Warren
0 siblings, 0 replies; 14+ messages in thread
From: Stephen Warren @ 2016-04-22 18:00 UTC (permalink / raw)
To: linux-arm-kernel
On 04/22/2016 05:46 AM, Thierry Reding wrote:
> On Fri, Feb 26, 2016 at 08:18:30PM +0100, Lucas Stach wrote:
>> Update pinmux to get rid of invalid uses of the rsvd1 function, which lead
>> to the mux settings on those pins to not be applied.
>>
>> Also add correct drive settings, derived from the Tegra3 TRM, for SDIO1,
>> which makes some more SD-cards work.
>>
>> Signed-off-by: Lucas Stach <dev@lynxeye.de>
>> ---
>> arch/arm/boot/dts/tegra30-beaver.dts | 39 ++++++++++++++++++++++--------------
>> 1 file changed, 24 insertions(+), 15 deletions(-)
>
> Applied, thanks.
>
> Stephen, you had looked at this before. If you're happy with it, would
> you mind providing an Acked-by? I can apply it after the fact.
Acked-by: Stephen Warren <swarren@nvidia.com>
This appears to match a recent change in tegra-pinmux-scripts.git.
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2016-04-22 18:00 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-02-26 19:18 [PATCH v2] ARM: dts: tegra: correct Beaver pinmux Lucas Stach
2016-02-26 19:18 ` Lucas Stach
2016-04-21 18:16 ` Lucas Stach
2016-04-21 18:16 ` Lucas Stach
[not found] ` <1456514310-27605-1-git-send-email-dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
2016-02-26 19:28 ` Stephen Warren
2016-02-26 19:28 ` Stephen Warren
[not found] ` <56D0A748.6060104-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-02-26 19:36 ` Lucas Stach
2016-02-26 19:36 ` Lucas Stach
[not found] ` <1456515384.20487.2.camel-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
2016-02-26 19:53 ` Stephen Warren
2016-02-26 19:53 ` Stephen Warren
2016-04-22 11:46 ` Thierry Reding
2016-04-22 11:46 ` Thierry Reding
[not found] ` <20160422114642.GD9047-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-04-22 18:00 ` Stephen Warren
2016-04-22 18:00 ` Stephen Warren
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.